ARCHIVE INFORMATION. RF Power Field Effect Transistor N- Channel Enhancement- Mode Lateral MOSFET MRF21120R6. Freescale Semiconductor.

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1 Technical Data RF Power Field Effect Transistor N- Channel Enhancement- Mode Lateral MOSFET Designed for W- CDMA base station applications with frequencies from 2110 to 2170 MHz. Suitable for FM, TDMA, CDMA and multicarrier amplifier applications. To be used in Class AB for PCN-PCS/cellular radio and WLL applications. W-CDMA -45 dbc, 5 MHz Offset, 15 DTCH, 1 Perch Output Power 14 Watts (Avg.) Power Gain 11.5 db Efficiency 16% Capable of Handling 10:1 28 Vdc, 2140 MHz, 120 Watts CW Output Power Features Internally Matched for Ease of Use High Gain, High Efficiency and High Linearity Integrated ESD Protection Designed for Maximum Gain and Insertion Phase Flatness Excellent Thermal Stability Characterized with Series Equivalent Large- Signal Impedance Parameters RoHS Compliant In Tape and Reel. R6 Suffix = 150 Units per 56 mm, 13 inch Reel. Table 1. Maximum Ratings Rating Symbol Value Unit Drain-Source Voltage V DSS -0.5, 65 Vdc Gate-Source Voltage V GS -0.5, 15 Vdc Total Device T C = 25 C Derate above 25 C Document Number: MRF21120 Rev. 11, 5/ MHz, 120 W, 28 V LATERAL N- CHANNEL RF POWER MOSFET CASE 375D-05, STYLE 1 NI P D Storage Temperature Range T stg - 65 to 150 C Case Operating Temperature T C 150 C Operating Junction Temperature T J 200 C W W/ C Table 2. Thermal Characteristics Characteristic Symbol Value Unit Thermal Resistance, Junction to Case R θjc 0.45 C/W Table 3. ESD Protection Characteristics Test Conditions Class Human Body Model Machine Model 1 (Minimum) M3 (Minimum), Inc., 2006, All rights reserved. 1

2 Table 4. Electrical Characteristics (T C = 25 C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Off Characteristics (1) Drain- Source Breakdown Voltage (V GS = 0 Vdc, I D = 20 μadc) Gate- Source Leakage Current (V GS = 5 Vdc, V DS = 0 Vdc ) Zero Gate Voltage Drain Leakage Current (V DS = 28 Vdc, V GS = 0 Vdc) On Characteristics Forward Transconductance (V DS = 10 Vdc, I D = 2 Adc) V (BR)DSS 65 Vdc I GSS 1 μadc I DSS 10 μadc g fs 4.8 S Gate Threshold Voltage (1) (V DS = 10 V, I D = 200 μa) Gate Quiescent Voltage (3) (V DS = 28 V, I D = 1000 ma) Drain-Source On-Voltage (1) (V GS = 10 V, I D = 2 A) Dynamic Characteristics (1, 2) Reverse Transfer Capacitance (V DS = 28 Vdc, V GS = 0, f = 1 MHz) Functional Tests (3) (In Freescale Test Fixture, 50 ohm system) Common- Source Amplifier Power Gain f1 = MHz, f2 = MHz) Drain Efficiency f1 = MHz, f2 = MHz) Intermodulation Distortion f1 = MHz, f2 = MHz) Input Return Loss f1 = MHz, f2 = MHz) Common- Source Amplifier Power Gain f1 = MHz, f2 = MHz) Common- Source Amplifier Power Gain f1 = MHz, f2 = MHz) V GS(th) Vdc V GS(Q) Vdc V DS(on) Vdc C rss 2.8 pf G ps db η % IMD db IRL db G ps 11.5 db G ps 11.5 db Drain Efficiency f1 = MHz, f2 = MHz) Intermodulation Distortion f1 = MHz, f2 = MHz) η 34.5 % IMD -31 db Input Return Loss f1 = MHz, f2 = MHz) 1. Each side of device measured separately. 2. Part internally matched both on input and output. 3. Device measured in push- pull configuration. IRL -12 db (continued) 2

3 Table 4. Electrical Characteristics (T C = 25 C unless otherwise noted) (continued) Characteristic Symbol Min Typ Max Unit Functional Tests (In Freescale Test Fixture, 50 ohm system) (1) (continued) Power Output, 1 db Compression Point (V DD = 28 Vdc, CW, I DQ = 1000 ma, f1 = MHz) Common- Source Amplifier Power Gain (V DD = 28 Vdc, P out = 120 W CW, I DQ = 1000 ma, f1 = MHz) Drain Efficiency (V DD = 28 Vdc, P out = 120 W CW, I DQ = 1000 ma, f1 = MHz) 1. Device measured in push- pull configuration. P1dB 120 W G ps 10.5 db η 42 % 3

4 C31 C32 C33 C34 V DD C35 RF INPUT Z1 COAX1 Z2 L1 COAX2 V GG V GG Z4 Z5 Z6 Z7 C19 R1 Z8 C1 Z9 R2 B1 R3 C2 C17 C16 C14 Z10 Z12 C3 Z14 Z16 Z18 Z20 Z22 R4 C25 C24 C23 C21 B1, B2 Ferrite Beads, Fair Rite C1, C2, C pf Variable Capacitors, Johanson Gigatrim C3, C4, C9, C10 10 pf Chip Capacitors, ATC C pf Variable Capacitor, Johanson Gigatrim C6, C7 2.0 pf Chip Capacitors, ATC C8 0.5 pf Chip Capacitor, ATC C pf Chip Capacitor, ATC C13, C20, C29, C pf Chip Capacitors, ATC C14, C21, C28, C38 91 pf Chip Capacitors, ATC C15, C22, C27, C34, C36, C42 22 μf, 35 V Tantalum Surface Mount Chip Capacitors, Kemet C16, C23, C33, C μf Chip Capacitors, ATC C17, C24, C32, C pf Chip Capacitors, ATC C19, C μf Chip Capacitors, ATC C30, C μf, 35 V Tantalum Surface Mount Chip Capacitors, Kemet C31, C μf, 50 V Electrolytic Capacitors, Sprague C35, C μf, 63 V Electrolytic Capacitors, Sprague Coax1, Coax2 25 Ω Semi Rigid Coax, 70 mil OD, 1.05 Long Coax3, Coax4 50 Ω Semi Rigid Coax, 85 mil OD, 1.05 Long L1, L5 5.0 nh Minispring Inductors, Coilcraft L2 8.0 nh Minispring Inductor, Coilcraft L3, L nh Microspring Inductors, Coilcraft R1, R2 1 kω, 1/4 W Fixed Metal Film Resistors, Dale R3, R4 270 Ω, 1/8 W Fixed Film Chip Resistors, Dale R5, R6 1.2 kω, 1/8 W Fixed Film Chip Resistors, Dale Z x Microstrip L2 C15 R5 C13 Z11 Z13 C4 Z15 Z17 Z19 Z21 Z23 B2 R6 C22 C20 C7 Z24 DUT Z25 C6 C30 C29 Z26 Z27 C37 C39 C40 L3 C28 C27 Z28 Z30 Z32 Z34 C9 Z36 L4 C8 C41 C42 C11 Z29 Z31 Z33 Z35 C10 Z37 C36 C38 Z40 Z41 C12 C43 RF OUTPUT C5 Z38 Z39 Z42 C44 COAX3 COAX4 V DD Z x Microstrip Z4, Z x Microstrip Z6, Z x Microstrip Z8, Z x Microstrip Z10, Z x Microstrip Z12, Z x Microstrip Z14, Z x Microstrip Z16, Z x Microstrip Z18, Z x Microstrip Z20, Z x Microstrip Z22, Z x Microstrip Z24, Z x Microstrip Z26, Z x Microstrip Z28, Z x Microstrip Z30, Z x Microstrip Z32, Z x Microstrip Z34, Z x Microstrip Z36, Z x Microstrip Z38, Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Board Material 0.03 Teflon, ε r = 2.55 Copper Clad, 2 oz. Cu Connectors N-Type Panel Mount, Stripline L5 Figure MHz Broadband Test Circuit Schematic 4

5 C34 C35 V GG C19 B1 R3 C17 R5 C K 649 C16 C14 C13 C7 C K 105 C30 L K 649 C K 649 C28 C27 C32 C33 V DD L1 C1 C2 R1 R2 L2 R4 B2 V GG C25 C3 C4 R6 C23 C24 C K 649 C22 C21 Figure MHz Broadband Test Circuit Component Layout C6 C37 C39 C8 L4 C38 C40 C42 C36 C9 C10 C41 C43 Freescale has begun the transition of marking Printed Circuit Boards (PCBs) with the signature/logo. PCBs may have either Motorola or Freescale markings during the transition period. These changes will have no impact on form, fit or function of the current product K K K 649 C44 C11 V DD C12 L5 C5 5

6 TYPICAL CHARACTERISTICS G ps, POWER GAIN (db) G ps, POWER GAIN (db) Gps, POWER GAIN (db) ma 1500 ma 1300 ma 1100 ma 1000 ma 850 ma 600 ma P out, OUTPUT POWER (WATTS) PEP Figure 3. Power Gain versus Output Power G ps 8 VSWR V DD = 28 Vdc, I DQ = 1000 ma Two Tone, 100 khz Tone Spacing ACPR DOWN f, FREQUENCY (MHz) Figure 5. Class AB Broadband Circuit Performance ACPR UP η IMD G ps η V DD = 28 Vdc I DQ = 1000 ma f = 2170 MHz P out, OUTPUT POWER (WATTS) AVG. V DD = 28 Vdc f1 = MHz f2 = MHz η, EFFICIENCY (%) IMD, INTERMODULATION DISTORTION (dbc) η, EFFICIENCY (%) ACPR (db) IMD, INTERMODULATION DISTORTION (dbc) VSWR G ps, POWER GAIN (db) ma c11 Center 2.17 GHz 1500 ma 1300 ma 1000 ma 1800 ma 1100 ma P out, OUTPUT POWER (WATTS) PEP c11 c0 Figure GHz W-CDMA Mask at 14 Watts (Avg.), 5 MHz Offset, 15 DTCH, 1 Perch P out, OUTPUT POWER (WATTS) PEP 850 ma V DD = 28 Vdc f1 = MHz f2 = MHz Figure 4. Intermodulation Distortion versus Output Power MARKER 1 [T1] RBW 30 khz RF Att 10 db Ref Lv dbm VBW 1 MHz 5 dbm GHz SWT 2 s Unit dbm 1 [T1] A dbm G ps cu1 c0 cu1 1.5 MHz Span 15 MHz η 9 0 V DD = 28 Vdc, I DQ = 1000 ma f = MHz, f2 = MHz IMD 1 CH PWR ACR UP ACR LOW GHz 2.95 dbm db db RM η, EFFICIENCY (%) IMD, INTERMODULATION DISTORTION (dbc) Figure 7. Power Gain, Efficiency, ACPR versus Output Power (W- CDMA) Figure 8. Power Gain, Efficiency, IMD versus Output Power 6

7 f MHz Z source f = 2110 MHz f = 2170 MHz Z source Ω j j j2.5 Z o = 10 Ω f = 2170 MHz f = 2110 MHz V DD = 28 V, I DQ = 1000 ma, P out = 120 W PEP Z load Ω Z load j j j2.5 Z source = Test circuit impedance as measured from gate to gate, balanced configuration. Z load = Test circuit impedance as measured from drain to drain, balanced configuration. Input Matching Network Device Under Test Output Matching Network Z source Z load Figure 9. Series Equivalent Source and Load Impedance 7

8 NOTES 8

9 NOTES 9

10 NOTES 10

11 PACKAGE DIMENSIONS A A G 4 L 1 2 2X Q B bbb M T A M B M NOTES: 1. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M CONTROLLING DIMENSION: INCH. 3. DIMENSION H IS MEASURED (0.762) AWAY FROM PACKAGE BODY. 4. RECOMMENDED BOLT CENTER DIMENSION OF 1.52 (38.61) BASED ON M3 SCREW. 4X K E aaa 3 4 4X D M T A M B M ccc M T A M B M N (LID) PIN 5 M (INSULATOR) bbb M T A M B M T SEATING PLANE B (FLANGE) C H ccc M T A M R (LID) S (INSULATOR) bbb M T A M CASE 375D-05 ISSUE E NI-1230 B M B M F INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D E F G BSC BSC H K L BSC BSC M N Q R S aaa REF 0.33 REF bbb REF 0.25 REF ccc REF 0.51 REF STYLE 1: PIN 1. DRAIN 2. DRAIN 3. GATE 4. GATE 5. SOURCE 11

12 How to Reach Us: Home Page: E- mail: USA/Europe or Locations Not Listed: Technical Information Center, CH N. Alma School Road Chandler, Arizona or Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen Muenchen, Germany (English) (English) (German) (French) support@freescale.com Japan: Japan Ltd. Headquarters ARCO Tower 15F 1-8-1, Shimo-Meguro, Meguro-ku, Tokyo Japan or support.japan@freescale.com Asia/Pacific: Hong Kong Ltd. Technical Information Center 2 Dai King Street Tai Po Industrial Estate Tai Po, N.T., Hong Kong support.asia@freescale.com For Literature Requests Only: Literature Distribution Center P.O. Box 5405 Denver, Colorado or Fax: LDCForFreescaleSemiconductor@hibbertgroup.com Information in this document is provided solely to enable system and software implementers to use products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. reserves the right to make changes without further notice to any products herein. makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters that may be provided in data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals, must be validated for each customer application by customer s technical experts. does not convey any license under its patent rights nor the rights of others. products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the product could create a situation where personal injury or death may occur. Should Buyer purchase or use products for any such unintended or unauthorized application, Buyer shall indemnify and hold and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part. Freescale and the Freescale logo are trademarks of, Inc. All other product or service names are the property of their respective owners., Inc. 2006, All rights reserved. Document Number: MRF Rev. 11, 5/2006

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