Tutorial 2 Test Techniques for RFIC and Embedded Passives

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1 Tutorial 2 Test Techniques for RFIC and Embedded Passives Bruce C. Kim, Ph.D. The University of Alabama, Tuscaloosa, U.S.A. 13 th Korea Test Conference, Seoul June 27,

2 Outline Introduction to RF communication system Test Technique Concepts RF measurements SoC testing RF passive circuit testing Built-in Self Test (BIST) Summary 2

3 RF Testing Expensive, labor intensive and require experience. 3

4 RF Basics 4

5 Communications System J. Kelly and M. Engelhardt, Advanced Production Testing of RF, SoC, and SiP Devices, Boston: Artech House,

6 Components in RF Systems Radio frequency Duplexer Low noise amplifier (LNA) Power amplifier (PA) RF mixer Local oscillator Filter Intermediate frequency Variable gain amplifier (VGA) Modulator Demodulator Filter Mixed-signal Digital to analog converter (DAC) Analog to digital converter (ADC) Digital B. Razavi, RF Microelectronics, Upper Saddle River, New Jersey: Prentice Hall PTR, Digital signal processor (DSP) 6

7 RF Testing Classifications RF Testing RFIC Testing RF Load Board Testing RF Embedded Passives Defect Testing Test Level System Level Board Level Component Level Functional Testing Functional Testing Performance Specifications Test Automation Parametric Variations/Processrelated Defects Testing and Diagnosis Test Type System Performance and IC Design Specifications Automatic Test Program Generation Opens, Shorts, Nearopens and Near-shorts Goal Loop-back DfT for Transceiver Testing (A. Chatterjee, G. Srinivasan) Loop-back Transceiver Testing using embedded sensors (A. Chatterjee, S. Bhattacharya) RF-BIST (J. Dabrowski) B. Kim Delayed RF test using spectral signal analysis (S. Ozev) RADPro (RF Analyzer and Diagnostic Program Generation Tool (B. Kim, S. Kannan) RF Power Sensor Testing (B. Kim, S. Kannan) Multi-tone Dither Testing (B. Kim, S. Kannan) 7

8 Low Noise Amplifier (LNA) Amplifies received RF signal Typical characteristics: Noise figure 2dB IP3 10dBm Gain 15dB Input and output impedance 50Ω Reverse isolation 20dB Stability factor > 1 Technologies: Bipolar CMOS B. Razavi, RF Microelectronics, Upper Saddle River, New Jersey: Prentice Hall PTR,

9 Power Amplifier (PA) Feeds RF signal to antenna for transmission Typical characteristics: Output power +20 to +30 dbm Efficiency 30% to 60% IMD 30dBc Supply voltage 3.8 to 5.8 V Gain 20 to 30 db Output harmonics 50 to 70 dbc Power control On-off or 1-dB steps Stability factor > 1 Technologies: GaAs SiGe B. Razavi, RF Microelectronics, Upper Saddle River, New Jersey: Prentice Hall PTR,

10 Up/Down Frequency Converters (Mixers) Translates frequency by adding or subtracting local oscillator (LO) frequency Typical characteristics: Noise figure 12dB IP3 +5dBm Gain 10dB Input impedance 50Ω Port to port isolation 10-20dB Technologies: Bipolar MOS B. Razavi, RF Microelectronics, Upper Saddle River, New Jersey: Prentice Hall PTR,

11 Types of Mixers Passive Mixer Active Mixer J. Kelly and M. Engelhardt, Advanced Production Testing of RF, SoC, and SiP Devices, Boston: Artech House,

12 Phase Splitters Splits input signal into two same frequency outputs that differ in phase by 90 degrees. Used for image rejection. J. Kelly and M. Engelhardt, Advanced Production Testing of RF, SoC, and SiP Devices, Boston: Artech House,

13 System-on-Chip (SoC) All components of a system are implemented on the same VLSI chip. Requires same technology (usually CMOS) used for all components. Component not implemented on presentday SoC: Antenna 13

14 System-in-Package (SiP) Several chips or SOC are included in a package. Routing within SIP may be provided via a semiconductor substrate. RF communications system may contain: SiP containing SoC consisting of CMOS digital and mixed-signal components (DSP, ADC, DAC) CMOS LNA and mixers CMOS DDS Filters Power amplifier (PA) Antenna 14

15 Testing Concepts 15

16 Test Concepts Definition: Having designed and fabricated a device, testing must determine whether or not the device is free from any manufacturing defect. Testing is distinctly different from verification, which checks the correctness of the design. Forms of testing: Production testing Characterization testing 16

17 Production Testing Applied to every manufactured device Major considerations Reduce cost; minimize test time per device. Maximize quality; reduce defect level (DL), defined as fraction of bad devices passing test. Time-to-market 17

18 Production Testing Equipment Performed using Automatic Test Equipment. Has built-in instrumentation and programming capability to test ICs. 18

19 Production Test Methodology D. Lupea, et al., RF-BIST: Loopback Spectral Signature Analysis, Proc. Design, Automation and Test in Europe Conf.,

20 ATE Features Binning: Tested DUTs are grouped as Passing the entire test Failing any of the tests Failing because of dc test Failing because of RF Test Failing speed (maximum clock frequency) test Multisite testing: Testing of several DUTs is parallelized to reduce the test cost. Test time for a typical device: 1 2 seconds. Testing cost of a device: 3 5 cents. 20

21 Characterization Testing Performed at the beginning of production phase. Objective: To verify the design, manufacturability, and test program. Method: Few devices tested very thoroughly Failures are often diagnosed Tests are more elaborate than the production tests Test time (and testing cost) not a consideration Test program is verified and corrected in necessary ATE system and additional laboratory setup may be used 21

22 RF Testing Basic Specifications Scattering parameters (S-parameters) Frequency and gain measurements Power measurements Power efficiency measurements Linearity Noise Figure 22

23 S-Parameter Measurements An RF function is a two-port device with Characteristic impedance (Z 0 ): Z 0 = 50Ω for wireless communications devices Z 0 = 75Ω for cable TV devices Gain and frequency characteristics S-Parameters of an RF device S 11 : input return loss or input reflection coefficient S 22 : output return loss or output reflection coefficient S 21 : gain or forward transmission coefficient S 12 : isolation or reverse transmission coefficient S-Parameters are complex numbers and can be expressed in decibels as 20 log S ij 23

24 S-Parameter of RF Device S 11 measures the input match and S 22 determines the output match. J. Kelly and M. Engelhardt, Advanced Production Testing of RF, SoC, and SiP Devices, Boston: Artech House,

25 Power Measurements Receiver Minimum detectable RF power Maximum allowed input power Power levels of interfering tones Transmitter Maximum RF power output Changes in RF power when automatic gain control is used RF power distribution over a frequency band Power-added efficiency (PAE) Power unit: dbm, relative to 1mW Power in dbm = 10 log (power in watts/0.001 watts) 25

26 Power Spectrum Measurements Spur measurements Harmonic measurements Adjacent channel interference 26

Spur Measurements Spur is a spurious or unintended frequency in the output of an RF device. Example: leakage of reference frequency used in the phase detector of PLL.

27 Spur Measurements Spur is a spurious or unintended frequency in the output of an RF device. Example: leakage of reference frequency used in the phase detector of PLL. A spur can violate the channel interference standard of a communication system. Complete power spectrum measured in characterizing phase to determine which interfering frequencies should be checked during production testing. D. Lupea, et al., RF-BIST: Loopback Spectral Signature Analysis, Proc. Design, Automation and Test in Europe Conf.,

28 Harmonic Measurements Multiples of the carrier frequency are called harmonics. Harmonics are generated due to nonlinearity in semiconductor devices and clipping (saturation) in amplifiers. Harmonics may interfere with other signals and must be measured to verify that a manufactured device meets the specification. 28

29 Adjacent Channel Power Ratio Ratio of average power in the adjacent frequency channel to the average power in the transmitted frequency channel. Also known as adjacent channel leakage ratio (ACLR). A measure of transmitter performance. 29

30 AGC Characteristics to be Verified Gain errors and missing levels Overshoots and undershoots settling time Finite (non-zero) transition times Varying gain steps nonlinearity; DNL (differential nonlinearity) and INL (integral nonlinearity) similar to ADC and DAC 30

31 RF BIST 31

32 Advantages of BIST Reduce complexity of Testing Good for production, circuit characterization and on-chip compensation Measurements with hardware implementation 32

33 Built-in Self Test Develop Built-In Self-Test (BIST) approach using direct digital synthesizer (DDS) for functionality testing of analog circuitry in mixed-signal systems Provides BIST-based measurement of Amplifier linearity (IIP3) Gain and frequency response Implemented in hardware IIP3, gain, and freq. response measured 33

34 SoC BIST for Transceiver Reference - J. Dabrowski, BiST Model for IC RF-Transceiver Front-End, Proc. 18 th IEEE International Symp. on Defect and Fault Tolerance in VLSI Systems,

35 SoC Transceiver BIST Test implemented at baseband. Loopback between A/D and D/A converters. DSP implemented with digital BIST. Test amplifier (TA) implemented on chip; is disabled during normal operation. A test procedure: Test DSP using digital BIST. Apply RF BIST: Pseudorandom bit sequence generated by DSP Up converted by transmitter chain and applied to receiver through TA Down converted signal compared to input bit sequence by DSP to analyze bit error rate (BER) BER correlated to relevant characteristics of SOC components Advantage: Low tester cost. Disadvantage: Poor diagnosis. 35

36 RF BIST for LNA B. Kim, J. Ryu, I. Sylla, Programmable RF BIST Technique for Low Noise Amplifiers, Microelectronics Journal: Circuits and Systems, invited paper. 36

37 RF BIST Gain Results 37

38 Programmable RF BIST v L LNA S3 PC v in R s =50 Ω S2 v L 1 CMB S1 Z L =50 Ω v T BIST V T 1 V T2 A/D D SP LNA Under Test Used for GSM, Bluetooth, IEEE802.11g D N External Board B. Kim, J. Ryu, I. Sylla, Programmable RF BIST Technique for Low Noise Amplifiers, Microelectronics Journal: Circuits and Systems, invited paper. 38

39 BIST Architecture BIST-based IP3 measurement Reduce circuit by repeating test sequence BIST-based Gain & Frequency Responses F. Obaldia, et al., On-Chip Test Mechanism for Transceiver Power Amplifier and Oscillator Frequency, US Patent No A1,

40 Test Technique for RF Embedded Passives 40

41 RF Passive Circuit Testing RF load boards are complex Multi sites Hundreds of passives, Relays, OPAMPS, discrete transistors, SMA connectors, jumper wires Embedded RF circuits made of copper traces RF Power Sensor Testing. Multi-tone Dither Testing. 41

42 Device Interface Board (DIB) Provides test input stimulus to the Device Under Test (DUT). Two types of DIBs RF DIB consists of analog and RF circuits with multiple component types (embedded passives, capacitors, resistors, diodes, filters, baluns and ICs). High-Voltage DIB consists of analog circuits with high voltage rating and protection circuits. 42

43 Typical RF DIB 43

44 Automatic Test Program Generation Tool Automate the troubleshooting process. Reducing labor cost and time to market HV ICs. RADPro Test Translator Automatic Test Equipment High-Voltage or RF or Mixed Signal DIB 44

45 RADPro: RF Analyzer and Diagnostic Program Inputs are netlist and Bill of Materials. Uses unique RF circuit schematic information and tester resources. SPICE and ADS simulations are run for testable circuits. Output is a pseudocode consisting of test instructions. 45

46 Software Architecture Netlist, Bill of Materials (BOM), Package File Pin Map File and Resource Constraints Library of Passive RF Components Components Model Library PARSER Fault Inducer ETS Channel Type Generation Module Build Circuit Module Divide Board Module Relay Path Module Test Generation Module ADS and SPICE Simulation Output Pseudocode 46

47 Divide Board Module DIB is divided into testable sub-circuits. Sub-circuits are based on availability of terminals for stimulating and measuring test signals. Use of partition algorithm. 47

48 Floating Ground Test Capability Pogo pins H6 G6 High Side Force High Sense High K_SP2BT_S1 100 Ohms R 100 DUT Pin 1 F6 E6 Force Low Sense Low K_SP2PH_S1 DUT Pin 2 Low Side 48

49 Pseudocode ETS DIBs Eagle Test System testers perform differential testing. Floating ground facilitates differential testing. Performs high voltage testing. *****POWER TO GROUND ONLY TEST***** CONDITION(VERIFY COMPONENT = JP19-1_2) FCMV(forced current = 1e-4 A, force high pin = CH-J1-I16, sense high pin = CH-J1-H9, type = force high) FCMV(forced current = 1e-4 A, force low pin = LowPin_Num3, sense low pin = LowPin_Ref3, type = force low) COMPARE_LIMITS(lower limit = 0.06 V, upper limit = 1.99 V, nominal value = V, tested pwr node = +3P3V_MB) 49

50 Test Generation Module Divide Board Module Analog-Digital Circuits RF Testable sub-circuits ADS Model Files Bill of Materials SPICE Netlist Generation Generation of AEL Command Netlist Batch Simulation File Generation ADS /SPICE Simulation Module 50

51 ADS/SPICE Simulation Module Testable circuits under fault free and fault induced conditions. SPICE for analog circuits. Force Voltage Measure Current (FVMC). Force Current Measure Voltage (FCMV). Force Current Measure Voltage with Delay Time (FCMVDT). ADS for RF circuits. Force Power Measure Voltage (FPMV). Multi-tone Dither Testing. 51

52 Fault Modeling Built model libraries in ADS and SPICE for testable circuits. Fault models built for discrete passive components. Opens and short fault model developed for embedded passive RF components. 52

53 Balun Fault Model Case Study Position 1 Position 2 53

54 Look-up Table Store results from simulation of fault free and fault induced testable circuits Match with ATE measurement results to diagnose the RF DIBs. Name Power Gain (db) Fault Free -40 Open at Position 1-45 Open at Position 2-52 Short at Position 1-54 Short at Position

55 RF Circuit Diagnosis Fault Model Fault Inducer Testable Circuits from Divide Board Module RF Power Sensor Multi-tone Dither Test Fault Dictionary 55

56 RF Power Sensor Testing Identify process related defects for embedded RF circuits. Power loss is measured across the RF path. Process related defects result in power degradation at DUT terminal. RF Trace SMA component DUT Socket Power Detector Chip Load Board Reference RADPro: Automatic RF Analyzer and Diagnostic Program Generation Tool, S. Kannan, B. Kim, G. Srinivasan, F. Taenzler, R. Antley, C. Force, and F. Mohammed 56

57 Test Setup for Power Sensor DIB with RF Power Sensor Reference RADPro: Automatic RF Analyzer and Diagnostic Program Generation Tool, S. Kannan, B. Kim, G. Srinivasan, F. Taenzler, R. Antley, C. Force, and F. Mohammed 57

58 Circuit Under Test Printed LQ Balun J20 C328 L Ohm Trace C332 PS 1 Test Signal Input 50 Ohm Trace GND 15 pf L1 C340 1 pf R Ω C pf 15 pf 15 pf C pf L17 22nH L18 22nH 70.7 Ohm Trace C333 PS 2 Reference RADPro: Automatic RF Analyzer and Diagnostic Program Generation Tool, S. Kannan, B. Kim, G. Srinivasan, F. Taenzler, R. Antley, C. Force, and F. Mohammed 58

59 Experimental Results 1.5 GHz 2.0 GHz 2.5 GHz Type of Fault Power Sensor 1 Power Sensor 2 Power Sensor 1 Power Sensor 2 Power Sensor 1 Power Sensor 2 Fault Free Open common point(c340) Open L2 side of Balun Open LC filter one side (L17 and C327) Shorted outputs (70 Ohm Trace) Open Capacitor (C344) Shorted L1 side of Balun Shorted L1 and L2 side Balun

60 Experimental Validation Power Sensor Results Differential Voltage, V GHz PS1 2.5 GHz PS2-0.1 Open L2 side of Balun Shorted outputs (70 Ohm Trace) Shorted L1 side of Balun Shorted L1 and L2 side Balun Reference RADPro: Automatic RF Analyzer and Diagnostic Program Generation Tool, S. Kannan, B. Kim, G. Srinivasan, F. Taenzler, R. Antley, C. Force, and F. Mohammed 60

61 Multi-tone Dither Test Modulation of RF source signal with multitone signal to generate the test signal. Gaussian Noise is added to the multi-tone signal. RF Carrier Signal Modulation RF Circuit Multitone Signal with Noise (AWG) Reference RADPro: Automatic RF Analyzer and Diagnostic Program Generation Tool, S. Kannan, B. Kim, G. Srinivasan, F. Taenzler, R. Antley, C. Force, and F. Mohammed 61

62 Test Stimulus Frequency Domain Reference RADPro: Automatic RF Analyzer and Diagnostic Program Generation Tool, S. Kannan, B. Kim, G. Srinivasan, F. Taenzler, R. Antley, C. Force, and F. Mohammed 62

63 Multi-tone Signal Measurement Mathematical representation of multi-tone signal. m( t) = N 1 n= 0 m n e jn ωt Real valued multi-tone signal is derived from N 1 m ( t) = mn cos(( ωo + n ω) t + n= 0 arg{ m Peak-to-average ratio of complex multi-tone signal P. A. R( db) n }) 1 = max { m( t)} lim τ τ m 2 ( t) dt t τ 2τ 63

64 Circuit Under Test 50 Ω trace at input and output ports 50 Ohm Trace C1 50 Ohm Trace Port 1 1 pf Port 2 R1 R2 50 Ω 50 Ω Term 1 50 Ω Reference RADPro: Automatic RF Analyzer and Diagnostic Program Generation Tool, S. Kannan, B. Kim, G. Srinivasan, F. Taenzler, R. Antley, C. Force, and F. Mohammed 64

65 Output Power Spectrum Power, db Frequency, GHz Fault Free Open Defect Short Defect Reference RADPro: Automatic RF Analyzer and Diagnostic Program Generation Tool, S. Kannan, B. Kim, G. Srinivasan, F. Taenzler, R. Antley, C. Force, and F. Mohammed 65

66 Simulation Results 50 Ω trace at input and output ports Differential PAR between defect free and open defect measured for varying test frequencies and number of tones # of Tones 1 GHz 5 GHz 500 MHz 100 MHz 1 MHz

67 Hardware Validation Dither Testing Test sample 20 cm long resistive trace Compare results with RF power sensor testing. Input and output short faults induced P.A.R, db Reference RADPro: Automatic RF Analyzer and Diagnostic Program Generation Tool, S. Kannan, B. Kim, G. Srinivasan, F. Taenzler, R. Antley, C. Force, and F. Mohammed 0 long through line input short output short 67

68 Opens Test 1 cm long interconnect GHz 1 GHz 500 MHz 100 MHz 1 MHz Differential P.A.R, db Number of Tones Reference Embedded RF Circuit Diagnostic Technique with Multi-Tone Dither, S. Kannan, B. Kim, G. Srinivasan, F. Taenzler, R. Antley, C. Force. 68

69 Fault Coverage % Open - Process Defect 20% Open - Process Defect 50% Open - Process Defect 90% Open - Process Defect 200 Number of Tones Sensitivity of Fault Detection % Reference Embedded RF Circuit Diagnostic Technique with Multi-Tone Dither, S. Kannan, B. Kim, G. Srinivasan, F. Taenzler, R. Antley, C. Force. 69

70 Summary Discussed basics of RF communication system, components and technologies involved. Introduced RF test concepts such as RF measurements, and SoC testing. RF passive circuit testing using two novel test techniques such as RF power sensor technique and multi-tone dither testing BIST for RF SoCs, basic architecture and advantages. 70

Analog Circuit Test. Analog circuits Analog circuit test methods Specification-based testing Direct measurement DSP-based testing

Analog Circuit Test. Analog circuits Analog circuit test methods Specification-based testing Direct measurement DSP-based testing Analog Circuit Test Analog circuits Analog circuit test methods Specification-based testing Direct measurement DSP-based testing Fault model based testing IEEE 1149.4 analog test bus standard Summary References