Self Calibrated Image Reject Mixer

Transcription

1 Self Calibrated Image Reject Mixer Project name: Self Calibrated Image Reject Mixer. Design number: Design password: Student names: Mostafa Elmala. Area: mm X mm. Technology: Technology is SCN4ME_SUBM, lambda =.um. Fabrication restricted to TSMC only. Fabricated on run T14A (TSMC_035) as T14AAE. Advisor name: Dr. Sherif Embabi. Parts received: 5 parts, with 0 packaged in PTQFP64A, and 5 unpackaged. Parts tested: 5 packaged in PTQFP64A Parts functional: 4 Equipment used in testing: Spectrum analyzer, Network analyzer, Signal generators, and Noise source.

2 Mosis Proposal Self Calibrated Image Reject Mixer Introduction: Image reject mixer is a well-known structure of a mixer that can pass the signal of interest and reject the image signal. A typical structure of such a mixer is shown in Fig. 1. The choice of the first and second local oscillators is arbitrary according to receiver system specifications. Due to mismatches between the two signal paths of the mixer, the image reject ratio will be finite to around db for 1 to 5 degree phase mismatch or 0. to 0.6 db gain mismatch. This will put a restriction on the system specification by attenuating the image signal using an off-chip image reject filter preceding the mixer stage. This hampers complete receiver integration on-chip. A C RF IN a1 a3 A1 θ1 A θ ( A 1 + ) sin( ω 1t + ) ( A + ) sin( ωt ) IF OUT A1 θ1 A θ ( A 1 ) cos( ω1t ) ( A ) cos( ω t + ) a a4 B D Fig. 1. Typical image reject mixer with mismatch modeling. Our project proposal is to calibrate for the phase and gain mismatches using a calibrating system as shown in Fig.. Such calibration will make it possible to achieve very large

3 image reject ratio. This means that the image reject filter can be removed, or at least, reduce its system requirements such that it can be implemented on-chip. RF IN a1 a1 a a3 a4 a V θ Calibrating System V θ V a3 a4 τ LO τ IF OUT Fig.. Image reject receiver mixer with phase and gain calibration. The economic advantages of such design are obvious. More on-chip integration can be done in CMOS technology, which has the advantage of being scaleable and, more importantly, low cost. This can lead to a design of a single chip radio receiver. I) Project Description: The goal of this research project is to implement a self-calibrated image reject mixer portion of a receiver in TSMC 0.35µ process. The mixer will be tailored for a GSM system with a 1.8GHz RF and 00MHz IF frequencies. The parts of the mixer to be implemented consists of: 1- Weaver image reject mixer architecture. - Phase and gain mismatches generation system. 3- Variable phase and gain circuit.

4 II) Simulation plan: Simulation of the proposed design was successfully done. Layout will begin soon. III) Test plans: A number of test surface mount PCB s will be made. The whole design will be tested and evaluated in a one month period. We have all the required RF equipment for testing in our lab. IV) Project size. We estimate to use m x m of the TSMC 0.35µ die (40 pins package). Note: Using 0.35µ process is extremely important to achieve this high frequency operation in CMOS.

5 Test Report Test Setup: The general test setup used to measure a differential-input differential-output circuit is illustrated in Fig. 1. A ballun is used at the input to perform the single-end to differential conversion. Also, the reverse operation at the output is performed using another ballun. This setup is useful in measuring the gain of the device under test (DUT). RF Source Ballun Vi+ Circuit Under Test Vo+ Vi- Vo- Ballun Spectrum Analyzer DUT Fig. 1. General measurement test setup. Network analyzer can be also used for matching, frequency response, gain, group delay, and S-parameter measurements as shown in the setup shown in Fig.. The network analyzer has to be first calibrated for the frequency range of interest and power range. Network Analyzer DUT

6 Fig.. Test setup for S-parameters measurements. To measure the IP3, two RF tones are combined and then applied to the DUT input as shown in Fig. 3. Their powers are swept while the output powers of the fundamental and third inter-modulation components are monitored by the spectrum analyzer. RF Source1 RF Source RF Combiner Ballun Vi+ Circuit Under Test DUT Vo+ Vi- Vo- Ballun Spectrum Analyzer Fig. 3. Test setup for IP3 measurements. To measure the noise figure of the DUT, a spectrum analyzer and a noise source are used as shown in the setup of Fig 4. The pre-amplifier is used to reduce the effect of the noise contribution of the spectrum analyzer on the accuracy of measurements. Noise Source DUT PreAmp Spectrum Analyzer Fig. 4. Test setup for noise figure measurement.

7 Measurements: The mm chip die micrograph is shown in Fig. 5. The circuit has been tested with a 3V supply. The first and second LO frequencies are 1.6GHz and 00MHz, respectively. The choice of the IF frequency is optional, as the output is not sensitive to it. The desired RF signal is around 1.8GHz, while its image signal is around 1.4GHz. IRR performance was measured by applying a desired tone and an image tone of equal power and measuring the difference between their powers at the output. The photo of the PCB used in testing the receiver is shown in Fig. 6. RF Multipliers IF LNA Multipliers Variable Delay-Gain Circuit Figure 5. Die photo of the self-calibrated Weaver receiver.

8 Fig. 6. PCB used in testing the image-reject receiver. Typical phase and gain mismatches limit the achievable IRR to 6dB without calibration, as shown in Fig. 7. This measurement was taken using a spectrum analyzer, and the two signals are slightly shifted for measurement purpose. After enabling on-line calibration, the same test was repeated as shown in Fig. 8, where IRR improved to 59dB. Thus the improvement in IRR is in the order of 33dB. Fig. 9 shows the IRR performance as a function of LO 1 frequency, for a fixed IF output frequency. The decrease in IRR for frequencies away from the calibration point (LO 1 = 1.6GHz) is due to the DC offset of the amplifiers in the calibration loops and other non-ideal effects.

9 Fig. 7. Output spectrum (signal and image tones) without calibration. Fig. 8. Output spectrum with on-line calibration.

10 IRR (db) First LO Frequency (MHz) Fig. 9. Measured IRR as a function of LO 1 frequency. The dynamic range of the input RF signal can vary widely. On-line calibration is valid for RF input power below -5dBm at the LNA input. Above this value, the IRR decreases rapidly. If the calibration is to be done only one time and the correction signals are to be stored digitally, then the IRR will not depend on the input power level. The measured input 1dB compression point is -15dBm. The receiver consumes 160mW during on-line calibration, and 95mW during normal receiving. A summary of the measurements of the fabricated image-reject receiver is shown in Table 7.6.

11 Table 7.6. Summary of the self-calibrated Weaver receiver measurements. Parameter Measurement LO 1 frequency 1.6GHz LO frequency 00MHz RF frequency Around 1.8GHz Image frequency Around 1.4GHz IRR (before calibration) 6dB IRR (after calibration) 59dB Input 1dB compression point -15dBm Supply voltage 3V Power consumption 95mW