Effects of Mismatch on CMOS Monolithic Mixers Image Rejection
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1 Effects of Mismatch on CMOS Monolithic Mixers Image Rejection Fernando Azevedo, M. João Rosário, J. Costa Freire Instituto Superior de Engenharia de Lisboa, Instituto Superior Técnico,,3 Instituto de Telecomunicações, Lisboa Portugal Av. Rovisco Pais, 096 Lisboa, Portugal Tel: ; Fax: Abstract Image rejection ratio in CMOS double balanced mixers is strongly dependent on the balance between its branches. The influence of the mismatches is analyzed theoretically at the system and circuit level. Guidelines that show the maximum acceptable mismatch to meet a given image rejection ratio specification and experimental results are presented. Keywords CMOS RFIC, mixers, frequency conversion, microwave mixer, image-rejection mixer, wireless communications. I. INTRODUCTION For current PCS systems to have low cost terminals, the IC technology must be standard CMOS. One very important key-part in transceiver design that allows eliminating the off-chip discrete components, to fully integration, is the mixer. In the last few years some authors proposed several architecture solutions where one of them stands out, the wide-band intermediate frequency double conversion system []. The wide-band intermediate frequency (IF) architecture converts all the radio frequency (RF) spectrum passing trough the input RF filter directly to base band (BB) as in the case of direct conversion. No band pass filtering is performed at IF. However in contrast to direct conversion [], the translation takes place in two steps, using two local oscillators (LO) and two sets of mixers. This provides the following main advantages: no oscillator operates at the RF input frequency, and the tuning of the receiver can be accomplished using the second low frequency LO. The double balanced mixer presented in fig. is an image rejection converter that uses six single mixers to implement the above referred architecture. Each single mixer can be easily implemented with CMOS Gilbert cells as it is shown in fig.. If the branches I (in-phase) and Q (quadrature) in each conversion step of fig. are perfectly matched and the local oscillators are applied in quadrature the image is fully rejected on both I and Q outputs. Cancellation of AM LO noise and spurious responses, and port to port isolation is also obtained with this topology. Several unbalances and offsets that may be present in the double-balanced mixer of Fig. are described as well as a theoretical analysis, at the system level, of their influence on image rejection ratio (IRR). Finally, guidelines for the maximum mismatch permissible to meet a given IRR specification based on system analysis and circuit simulation results are developed and applied to the design of a monolithic CMOS mixer for wireless applications. II. THE IDEAL IMAGE REJECTION MIXER For a better understanding of the image rejection principle used in the circuit of Fig. a frequency domain interpretation for an input signal that is composed by the RF component and its image (IM) was presented in []. The conversion takes place in two steps, using two sets of -flo RF/IM 3 flo Fig.. IF I LO I LO I LO Q IF Q IF I LO Q IF Q BB I BB Q BB Q BB I BB 3I BB 3Q BB I local oscillators ( st and nd LOs) and two sets of mixers ( IF and BB). The first step is to mix the signal with two local oscillators, in-phase LO I and quadrature LO Q, respectively. As a result, at IF spectrum, there is a relationship between the phases of the components generated by input RF and its IM at both IF outputs (I and Q). This relationship allows rejecting image frequency component at the next stages (BB mixers). The up converted terms obtained in the first mixing (IF mixers) are removed with simple low pass filters as shown in []. The second stage converts IF to BB where, once again, up converted terms are removed with simple low pass filters. Before the last filtering, the resulting four base band signals are added (I, Q) and subtracted (Q, I) in pairs to simultaneously cancel BB Q Wide band IF double frequency converter /0/$ IEEE PIMRC 00
2 the IM component and, in a constructively way, obtain the RF component at both I and Q outputs. III. NON IDEAL MIXER SYSTEM ANALYSIS Although the wide-band IF mixer has advantages with respect to high integration, certain non-idealities limit the overall receiver performances, as with conventional image rejection mixers [3]. respectively. As the branches BB I and BB Q are symmetrical we can analyze only one of them. By definition, the image rejection ratio (IRR) is given by the ratio between the output power obtained by the RF signal down conversion (ω BB = ω RF - ω LO - ω LO ) and the output power obtained by the IM signal down conversion (ω BB = ω LO - ω IM - ω LO ). MI IFI LPFI MI IFI BBI RF/IM cos(ω LO.t) cos(ω LO.t) LPF BBI V DD MQ (+ A) IFQ LPFQ IFQ MQ (+ A) BBQ Vd+ RL RL Vd- sin(ω LO.t+ φ) Κ sin(ω LO.t+ φ) Κ M M M3 M Fig. 3. Half mixer (BB I branch) block diagram. VBias M5 M6 From the circuit of fig.3, the in-phase components of the base band signal are, for the RF signal, IBB RF (t): M7 M8 IBias Fig.. CMOS Gilbert cell used to implement single mixers. Because of the phase mismatch between I and Q signals of both first and second LOs and unbalanced gains of the different signal paths, the four BB signals (I, Q, I and Q - fig.) magnitudes and phases will differ from ideal and the image rejection will be not effective. These errors are due to asymmetries in the layout and/or physical structure of the mixer and LOs. To study the influence of these asymmetries, a simplified version of the mixer presented in fig. has been used. Fig. 3 presents the block diagram of fig. BB I path where blocks modeling the above referred asymmetries were introduced on the quadrature branch: φ and φ are the phase deviation of the first and second LOs from quadrature, respectively; A and A are the gain difference (%) between the first and the second set of mixers, respectively; and K and K are dc offsets at IF and BB paths, IBBRF(t) = cos( ωbbt) + ( + A) ( + A) cos( ωbbt ( φ + φ)) K and for the IM signal, IBB IM (t): () IBBIM (t) = cos( ωbbt) ( + A) ( + A) () cos( ωbbt + ( φ φ)) K As it can be noticed, the offset introduced by the first mixer ( K ) has been canceled. The offset introduced by the second mixer ( K ) has the same effect on both outputs, accordingly it can be easily canceled by signal processing. The unbalance on the mixers gain appears in the output as the product of the deviations (+ A )(+ A ) meaning that the worst case happens when both have the same signal. Accordingly, the IRR can be written as < IBB IRR = < IBB RF IM (t) > (t) > (3)
3 IRR [db] φ =0º + A=.00 + A=.0 + A=,05 (+ A)=, φ [º] Fig.. Image rejection as function LO phase mismatch for different values of gain mismatch. Introducing () and () in (3) the IRR of the mixer of fig.3 is given by + ( + A) + ( + A) cos( φ + φ) IRR = () + ( + A) ( + A) cos( φ φ) where we have assumed a total gain mismatch A= A + A + A. A. Fig. 5. Image rejection as function of both LOs phase mismatch. In fig. the IRR variation with φ for several values of A with φ =0º is presented. As an example, we can conclude from this graphic that if an IRR of 0dB is wanted, total gain mismatches lower than % is compulsory. However, if the gain mismatch is %, the oscillators must be ideal. Fig. 5 presents a 3-dimension graphic of IRR as a function of φ and φ for a given A. From this graphic we can conclude that a IRR better than 30dB can only be obtained with a gain mismatch of 0.% if both oscillators have a phase error lower than º. V DD R POL R POL3 R POL R POL5 R Ref R Ref R C R C R C R C R Ref3 R Ref R C3 R C3 R Ref5 R Ref6 R C5 R C5 VLOi+ VLOi- VRF+ VBBq+ VBBq- GilbC C GilbC3 GilbC5 C VRF- VBBi+ C VLOq+ C VBBi- VLOq- GilbC GilbC GilbC6 VPOL VPOL VBIAS VLOi+ VLOi- VLOq+ VLOq- R POL Fig. 6. Double conversion image rejection mixer
4 IV. CIRCUIT DESIGN AND ANALYSIS With a 0.6µm CMOS standard technology [] a double conversion image rejection was designed and measured for a RF frequency of.89ghz with a first and second LOs of.7ghz and 90MHz, respectively. The complete mixer circuit diagram is shown in fig. 6. The mixer was optimized for maximum conversion gain and image rejection. Each of the 6 Gilbert cells (fig. ) is biased with a 3.3V power supply. The low pass filter used to remove the up converted terms of IF uses the resistive load of the mixer (R and R ) in conjunction with a small capacitance (C ). As the output is balanced the capacitor is connected between the two output branches of the cell. The same procedure was used to filter the base-band signal but with a higher capacitance (C ). To implement the output combiners the similar outputs of cell 5 and 6 are connected to sum the currents and the outputs of cell 3 are connected with the opposite branches of cell to subtract the currents and obtain the image cancellation. The circuit requires no inductors. IRR [db] IRR[dB] A=.05 φ =0º φ [deg] (a) 38 φ 37 =0 φ =0 φ = φ = 36 φ = φ =- 35 φ = φ = (b) + A Fig. 8. IRR circuit simulation for P LO = P LO = 7dBm, P RF = -3dBm, f RF =.89GHz, f LO =.7GHz, f LO = 90MHz. Fig 7. Mixer layout. Fig. 7 shows the complete mixer layout for fabrication. The die area is 0.6mm, including bond pads and gate protection. Fig 8 presents the simulation of the full circuit assuming a total gain mismatching up to 0% and both oscillators out of phase up to ±5º. These results are in agreement with the theoretical study of section III (differences lower than db). We notice that for higher gain mismatch the LO phase asymmetries are less important and when both LOs sets have similar out of phase ( φ φ ) the IRR is higher. This result is in agreement with equation (). V. EXPERIMENTAL RESULTS Experimental results confirmed the promised simulated values in what concerns image rejection (IRR), conversion gain (G C ) and power consumption (P DD ). The circuit was measured over several bias and LO power conditions. The results shown in table I were taken with a 3.3V power supply, f RF =.88GHz, f LO =.7GHz and a second LO f LO =90MHz. With a -3dBm input RF power, and +7dBm LO power (P LO =P LO ) conversion gain G C =6dB and image-rejection IIR=3dB were measured. Figure 9 shows also conversion gain as function of RF input power From figure 9 P in-db = -6dBm is obtained. Other mixer characteristics are presented in table I.
5 Table I IC Mixer Performances Silicon technology: CMOS 0,6µm (AMS) Active Area: 0,mm Total area (including pad s): 0,6mm Power supply: 3,3V Total current: 7,mA RF frequency: 900MHz Image Rejection: 3dB Conversion gain: 6dB Input db compression point: -6dBm BB I and BB Q output signals power versus RF input power are presented in fig. 9. A perfect quadrature of the output signals was obtained. REFERENCES [] J. Rudell et al., "A.9-GHz Wide-Band IF Double Conversion CMOS Receiver for Cordless Telephone Applications," IEEE Journal of Solid-State Circuits., vol. 3, no., pp , December 997. [] K. Anvary et al., "Performance of a direct conversion receiver with pi/-dqpsk modulated signal," st IEEE Vehicular Technology Conf., pp. 8-87, New York. [3] W. Baumberger, "A single chip image rejecting receiver for the.ghz band using commercial GaAs MESFET technology", IEEE Journal of Solid-State Circuits., vol. 9, pp. -9, October 99. [] AMS Austria Mikro Systems International AG, "0.6µm CMOS Design Rules", P BBi [dbm] Gc [db] -5 PBBi Experim ental PBBiSim ulated Gc Experim ental Gc Sim ulated P RFc [dbm] -5 Fig.9 Conversion Gain and BB output power versus RF input power (simulated and experimental results). VI. CONCLUSION A theoretical study at system level of the unbalance influence on the Image Rejection Ratio of a wide band IF double conversion mixer was presented. The simulated results were supported by circuit simulation of a CMOS mixer designed for a standard 0.6µm CMOS technology. Other asymmetries, like those associated with the filters and self-mixing due to non-ideal port isolation where also studied. However, their influence on IRR is much lower than the gain and LO asymmetries presented in this study. A MMIC was fabricated and tested and the IRR was in the predicted range, assuming the foundry fabrication dispersion data. The circuit is fully integrated in a low cost standard CMOS process with an active area of 0,µm, allowing the complete integration of a transceiver for wireless communications.
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