Review of Power Electronic Device Models

Transcription

1 Review of Power Electronic Device Models September, 2014 <Your Name> EEsof EDA

2 Power Electronics: Diverse Application Space Power Device Models Page 2

3 Diverse Material Systems and Device Technologies Silicon SiC GaN Towards High Voltage Breakdown field (V/µm) Mobility (cm²/v.s) T max ( C) 50 Material Properties of Silicon, Silicon Carbide, and Gallium Nitride Enabling Various Power Electronics Applications * Towards High Current and High Frequency Thermal conductivity (W cm -1 K -1 ) Saturation velocity (10 7 cm/s) MOSFET IGBT HEMT Si SiC * P. Martin, HSP: A Surface-Potential-Based Compact Model of AlGaN/GaN HEMTs Power Transistors, Compact Model Coalition (CMC) Quarterly Meeting, Dec. 2013, Washington, D.C., U.S.A. 4 5 Towards High Power GaN Various Device Architectures Power Device Models Page 3

4 Datasheets and Behavioral Models Datasheets Device ratings (ex. maximum voltage, current, power, temperature, etc.) Key static characteristics Key dynamic characteristics Output/transfer curves Other circuit characteristics (ex. switching energy, delays, etc.) Thermal/mechanical characteristics Behavioral models Usually built based on and reflects datasheet information Usually valid for specific conditions Power Device Models Page 4

5 Needs for More Advanced Models Wider and more continuous coverage: bias conditions, operating temperature, various load conditions More efficient circuit design and optimization Electro-thermal simulation to account for self-heating Consideration of other device characteristics (ex., noise) Consideration of unique device-level phenomena (ex., dynamic R ON, drain lag) Analysis of process variations and corners Predictive ability for application-driven process improvement Power Device Models Page 5

6 Outline Power Device Models Page 6 Device models for silicon HV MOS transistors, silicon IGBTs, SiC MOSFETs, and SiC IGBTs Device models for GaN HEMTs Summary

7 Silicon High-Voltage MOSFET Symmetric high-voltage MOSFET or asymmetric laterally double-diffused MOS (LDMOS) transistors V D = 3,6,9,12V Cross-section of an LDMOS Transistor * Output I-V Characteristics * Total Gate Capacitance * * W. Yao, et all., SP-HV: A scalable surface-potential-based compact model for LDMOS transistors, IEEE T-ED, vol. 59, no. 3, Mar. 2012, pp Power Device Models Page 7

8 Silicon HV/LDMOS Models Sub-circuit based approaches Surface-Potential-Based Approach in HiSIM_HV HiSIM_HV: CMC industry standard model for HV/LD MOS Major Recent Improvements in HiSIM_HV Typical Sub-Circuit Topology for LDMOS Models * * E. Seebacher, et al., High voltage MOSFET modeling, in Compact Modeling: Principles, Techniques and Applications, G. Gildenblat, Ed. New York: Springer-Verlag, 2010, ch. 4, pp H.J. Mattausch, et al., The Second-Generation of HiSIM_HV Compact Models for High-Voltage MOSFETs, IEEE T-ED, vol. 60, no. 2, Feb. 2013, pp Power Device Models Page 8

9 Silicon Insulated-Gate Bipolar Transistor (IGBT) Emitter Gate Collector Cross-Section of One-Half of a Symmetric IGBT Cell * * A.R. Hefner, Device Models, Circuit Simulation, and Computer-Controlled Measurements for the IGBT, Proc. IEEE Workshop Computers in Power Electronics, Aug. 1990, pp Power Device Models Page 9

10 Silicon IGBT Physics-based Models Formulation of the Hefner Model * Square-law MOST I-V Formulation of HiSIM-IGBT Model HiSIM2 s surface-potential based approach * A.R. Hefner, Device Models, Circuit Simulation, and Computer-Controlled Measurements for the IGBT, Proc. IEEE Workshop Computers in Power Electronics, Aug. 1990, pp M. Miyake, et al., HiSIM-IGBT: A Compact Si-IGBT Model for Power Electronic Circuit Design, IEEE T-ED, vol. 60, no. 2, Feb. 2013, pp Power Device Models Page 10

11 SiC MOSFET Models University of Arkansas model * Based on the MOSFET portion of the Hefner IGBT model Two parallel MOSFETs to account for corner conduction Bias-dependent gate-drain overlap capacitance Temperature dependent material properties of SiC implemented The Angelov model Empirical fitting by accurately capturing key characteristics SiC-specific numerical function used in I-V formulation Cross-Section of a SiC DiMOSFET * * T.R. McNutt, et al., Silicon Carbide Power MOSFET Model and Parameter Extraction Sequence, IEEE T-PE, vol. 22, no. 2, Mar. 2007, pp I. Angelov, Compact, Equivalent Circuit Models for GaN, SiC, GaAs and CMOS FET, MOS-AK, Baltimore, MD, Power Device Models Page 11

12 SiC IGBT Model University of Arkansas model Based on the Hefner model Adopts the enhancements of UA SiC MOSFET model Updated SiC mobility high-field degradation model a) HiSIM-SiC-IGBT model Based on HiSIM-IGBT model for silicon Updated model parameters to SiC material properties b) Detailed treatment of base carrier distribution including the punch-through effect for improved turn-off behavior modeling * S.H. Ryu, et al., Ultra High Voltage (>12 kv), High Performance 4H-SiC IGBTs, Proc. IEEE IS-PSDIC, June 2012, Bruges, Belgium, pp M. Saadeh, et al., A unified silicon/silicon carbide IGBTmodel, in Proc. IEEE Appl. Power Electron. Conf. Expo., 2012, pp M. Miyake, et al., Modeling of SiC IGBT Turn-off Behavior Valid for Over 5-kV Circuit Simulation, IEEE T-ED, vol. 60, no. 2, Feb. 2013, pp Cross-Section of a) SiC P-IGBT, and b) SiC N- IGBT * Power Device Models Page 12

13 Outline Power Device Models Page 13 Device models for silicon HV MOS transistors, silicon IGBTs, SiC MOSFETs, and SiC IGBTs Device models for GaN HEMTs Candidate models for CMC standardization DynaFET model Summary

14 GaN HEMT Model Standardization Effort in CMC Compact Model Coalition* an industry body that standardizes and promotes SPICE models for semiconductor devices as well as compiled modeling interface Ex., standard models for silicon MOSFETs, BJTs, resistors, varactors, junction diodes Dedicated workgroup for GaN HEMT model standardization launched in Year 2011 Three-phase standardization process Phase I: completed - Solicitation of models and presentation to CMC Phase II: on-going - Shortlisted candidate models being examined against fundamental requirements and being fitted to measurement data for CMC evaluation Phase III: TBD - Evaluation on runtime, convergence, operability, etc. Balloting for standardization * Compact Model Coalition, Power Device Models Page 14

15 Candidate Models Requirements for the core model As exact, complete, and simple a representation of physical GaN HEMT behavior as possible Extensibility of the model from GaN to all III-V FET/HEMT structures would be an added benefit but is not a strict requirement Physically correct in all operating regions No unphysical behavior As computationally efficient as possible Model should be charge based and not capacitance based, and charge conserving Candidate models entering Phase II evaluation Angelov-GaN model (Chalmers Univ.); COMON model (URV); HSP model (Leti); MVSG-HV model (MIT); Power Device Models Page 15

16 Angelov-GaN Model Extended from the Angelov model an empirical equivalent circuit based model for GaAs HEMT Continues to use inflection points as model parameters New math function for I-V formulation New RC delay circuit in the equivalent circuit for knee walkout Charge based mode in addition to conventional capacitance only approach.. Illustration of Using Inflection Points as Model Parameters in the Angelov-GaN Model I. Angelov, Compact, Equivalent Circuit Models for GaN, SiC, GaAs and CMOS FET, MOS-AK, Baltimore, MD, Power Device Models Page 16

17 Surface Potential Based Modeling Approach Poisson equation Schrodinger equation Surface potential Quasi Fermi level Mobile charge Continuity equation Transport model Secondary effects & parasitics Self-heating, dynamic trapping/de-trapping, etc. Access resistance, noise, tunneling current, etc. Both the COMON * model and the HSP model are based on the SP approach Channel current I V Terminal charges (Q V) Secondary effects Parasitics Full model * S. Khandelwal, et al., "A robust surface-potential-based compact model for GaN HEMT IC design," IEEE Trans. Electron Devices, vol. 60, no. 10, pp , P. Martin, et al., A Compact Model of AlGaN/GaN HEMTs Power Transistors Based on a Surface-Potential Approach, Proc. Int. Conf. MIXDES, June, 2013, Gdynia, Poland, pp Power Device Models Page 17

18 MIT Virtual Source GaN (MVSG) High-Voltage Model Inspired by the ballistic transport model over the virtual source Morphed for the drift-diffusion transport model I D W = v sat Q inv.s + Q inv,d 2 F Vsat Threshold voltage-based formulation of mobile charges Q ixo = C g nφ t ln 1 + exp V G V T αφ t F f nφ t Illustration of Carrier Injection over the Virtual Source and Corresponding Drain Current Formulation * * U. Radhakrishna, "MIT Unified VS GaNFET (MVSG) Model, " CMC Quarterly Meeting, Dec. 2013, Washington, D.C. Power Device Models Page 18

19 Outline Power Device Models Page 19 Device models for silicon HV MOS transistors, silicon IGBTs, SiC MOSFETs, and SiC IGBTs Device models for GaN HEMTs Candidate models for CMC standardization DynaFET model Summary

20 Characterization and Modeling Challenges of GaN HEMTs Measuring the DUT over the entire range of operation Determining stimulus signals to elicit the relevant dynamic responses & extraction methods to model independent mechanisms Ex. trapping/de-trapping processes for drain lag Large-signal fitting often a separated process from DC/small-signal model extraction Design inefficiency Multiple model cards often required for the same circuit during different circuit analysis (ex., DC, small signal, and large-signal) Different model cards often required just for different DC bias or operating frequency Power Device Models Page 20

21 DynaFET Modeling Flow NVNA data + ANN modeling technology for advanced III-V FET simulation NVNA IC-CAP ADS Synchronized Bias Supplies ID( Vgs, Vds, Tj, 1, 2, Vgs, Vds) Vgs Vds Tj 1 2 Vgs Vds NVNA-based device characterization system based on large-signal waveforms Advanced model extraction and ANN training SW module Natively implemented nonlinear component in Keysight ADS J. Xu, et al., Dynamic FET Model DynaFET - for GaN Transistors from NVNA Active Source Injection Measurements, Proc. IEEE IMS, Tampa, FL, June, 2014 Power Device Models Page 21

22 Key Elements of DynaFET Model Technology Large-signal NVNA waveform data used in conjunction with DC and S-parameter measurements for model extraction One single time-domain model valid for DC, small-signal, and large-signal over a broad frequency range, various bias points, and all load conditions Artificial neutral networks used for Q-V and I-V formulations Accurate fitting and infinitely differentiable Robust and fast model computation during simulation Self-heating and gate-lag/drain lag models included Dynamic behavior of GaN HEMT accurately captured DynaFET Core Model where I G, I D, Q G, and Q D are Formulated Using ANNs J. Xu, et al., Dynamic FET Model DynaFET - for GaN Transistors from NVNA Active Source Injection Measurements, Proc. IEEE IMS, Tampa, FL, June, G V gs I G dq G dt S dq D dt I D D + V ds Power Device Models Page 22

23 Large-Signal NVNA Waveform Data Acquisition Synchronized Bias Supplies Keysight E5270B or 4142B Controlled by an automated large-signal data acquisition software application implemented on top of the PNA-X NVNA PA Bias T Bias T PA A 11 power NVNA measurements performed at various: (1) DC biases (2) A11 power (3) A21 power (4) A21 phase (5) Ambient temperatures bias Ambient temperatures bias A 21 power A 21 phase Time, nsec Time, nsec Time, nsec Time, nsec J. Xu, et al., Dynamic FET Model DynaFET - for GaN Transistors from NVNA Active Source Injection Measurements, Proc. IEEE IMS, Tampa, FL, June, T.S. Nielsen, et al., Doherty Power Amplifier Design in Gallium Nitride Technology Using a Nonlinear Vector Network Analyzer and X-Parameters, Proc. IEEE CSICS, Power Device Models Page 23

24 Artificial Neural Networks y 1 = f 1 (x 1, x 2, x 3 ) y 1 y 2 y 2 = f 2 (x 1, x 2, x 3 ) (Ex. I D, I G ) Outputs y j = S V jk Z k k Hidden Neuron V jk Z 1 Z 2 Z 3 Z 4 Hidden Neuron Output Z k = tanh( S W ki x i ) W ki Parameters w = [W ki, V jk ] x 1 x 2 x 3 (Ex. T 0, V ds, V gs ) Universal Approx. Thm: Can fit any nonlinear function of many variables The model computation is very fast Infinitely differentiable Can be trained on non-gridded data in any number of dimensions Inputs Power Device Models Page 24

25 Gate-Lag/Drain-Lag Models 1 emit f RF 1 capture (t) 1 Min(V gs (t)) 2 (t) Max(V ds (t)) 4 40 V gs (t) ts(vgsint_q[2,::]) ts(vgsint_q[1,::]) ts(vgsint_q[0,::]) ts(vgsint[2,::]-vsint[2,::]) ts(vgsint[1,::]-vsint[1,::]) ts(vgsint[0,::]-vsint[0,::]) 1 (t) (t) ts(vdsint_q[2,::]) ts(vdsint_q[1,::]) ts(vdsint_q[0,::]) ts(vdsint[2,::]-vsint[2,::]) ts(vdsint[1,::]-vsint[1,::]) ts(vdsint[0,::]-vsint[0,::]) V ds (t) time, nsec time, nsec *J. Xu, et al., Large-signal FET Model with Multiple Time Scale Dynamics from Nonlinear Vector Network Analyzer Data, IEEE MTT-S Int. MWS Digest, May, 2010, pp Power Device Models Page 25

26 DynaFET Model Extraction I (t) I (V (t), V (t), T (t), 1 (t), (t), V drain D gs ds j 2 gs (t), V ds (t)) Terminal Voltages Auxiliary Variables NVNA Waveforms Terminal Voltages (V gs, V ds ) I Constitutive Relation Identification / Train Artificial Neural Networks (ANNs) (t) I (V (t), V (t), T (t), 1 (t), (t), V (t), V drain D gs ds j 2 gs ds (t)) Natively Compiled Model in ADS T j Auxiliary Variable Generation T I( t) V ( t) R 0 Min( V ( t)), Max( V ( t)) V 1 gs 2 gs Ave(V gs (t)), V ds th Ave(V ds ds (t)) Auxiliary Variables T V j gs For model extraction Auxiliary variables fixed at their steady-state large-signal values In simulation Auxiliary variables vary in time according to the coupled equivalent circuits 1 2 Vds I D ( Vgs, Vds, Tj,, 2, V Vgs Vds Tj 1 2 V gs, V 1 gs ds V ds ) ANNs used to model the detailed, general, multi-variate coupling Accurate and general No additional assumptions (e.g., backgating/virtual gate) Power Device Models Page 26

27 Outline Power Device Models Page 27 Device models for silicon HV MOS transistors, silicon IGBTs, SiC MOSFETs, and SiC IGBTs Device models for GaN HEMTs Summary

28 Summary Design efficiency and time-to-market in power electronics requires advanced device models as the industry keeps growing and becomes more competitive Better fitting accuracy Global coverage over operating conditions and simulation analyses Scalability over device geometry Support for electro-thermal simulation, etc. Power device modeling is actively researched for all types of material and device architectures. Industry standardization of GaN HEMT models is pursued through concerted effort by CMC DynaFET model provides a general, accurate modeling solution with excellent results for linear and nonlinear simulation for GaN HEMTs enabled by NVNA data and ANN technology Power Device Models Page 28

29 Extra slides Power Device Models Page 29

30 Drain Lag in GaN HEMT Degradation of drain current caused by increase of the drain voltage of the quiescent point, usually referred to as current collapse or knee walkout Id (ma) Id (ma) knee walkout Quiescent Bias Point [-0.2, 4] Vds (V) Pulsed I-V Measurements with Two Different Quiescent Points Vds (V) [-0.8, 6] Power Device Models Page 30

31 Measurement Space Raytheon 6x60 mm GaN HFET NVNA Measurements Experiment design covers entire operating range; Well beyond static data DC 1-Tone, 16GHz 50ohm load 20V, 54mA J. Xu, et al., Dynamic FET Model DynaFET - for GaN Transistors from NVNA Active Source Injection Measurements, Proc. IEEE IMS, Tampa, FL, June, Copyright Keysight Technologies, 2014 Page 31