SD MR. 150 W 50 V moisture resistant HF/VHF DMOS transistor. Datasheet. Features. Description

Transcription

1 Datasheet 15 W 5 V moisture resistant HF/VHF DMOS transistor M174MR epoxy sealed 4 1. Drain 2. Source 3. Gate 4. Source Features Gold metallization Excellent thermal stability Common source push-pull configuration P OUT = 15 W min. with 14 db 175 MHz Thermally enhanced packing for lower junction temperatures G FS and V GS sort marked on unit Moisture resistant package specifically designed to operate in extreme environments Description The SD MR is a gold metallized N-channel MOS field-effect RF power transistor. Electrically identical to the standard SD2931 MOSFET, it is used for 5 V DC large signal applications up to 23 MHz. The device is mechanically compatible with the SD2931 but offers better thermal capability (25% lower thermal resistance), representing the best-in-class in transistors for ISM applications, where reliability and ruggedness are critical factors. The SD MR benefits from the latest generation of environmentally designed packing, ruggedized against cyclic high moisture operation and severe storage conditions. Product status SD MR Product summary Order code Marking Package Packing SD MR SD MR M174 Plastic tray DS Rev 4 - February 218 For further information contact your local STMicroelectronics sales office.

2 Electrical data 1 Electrical data 1.1 Maximum ratings T CASE = 25 C Table 1. Absolute maximum ratings Symbol Parameter Value Unit V (BR)DSS Drain source voltage 125 V V DGR Drain-gate voltage (R GS = 1 MΩ) 125 V V GS Gate-source voltage ±4 V I D Drain current 2 A P DISS Power dissipation 389 W T J Max. operating junction temperature 2 C T STG Storage temperature -65 to +15 C 1.2 Thermal data Table 2. Thermal data Symbol Parameter Value Unit R thjc Junction-to-case thermal resistance.45 C/W DS Rev 4 page 2/16

3 Electrical characteristics 2 Electrical characteristics T CASE = 25 C Table 3. Static Symbol Test conditions Min. Typ. Max. Unit V (BR)DSS V GS = V I DS = 1 ma 125 V I DSS V GS = V V DS = 5 V 2 V GS = V V DS = 5 V 5 µa I GSS V GS = 2 V V DS = V 25 na V GS(Q) (1) V DS = 1 V I D = 25 ma See table below V V DS(ON) V GS = 1 V I D = 1 A 3. V G FS (1) V DS = 1 V I D = 5 A See table below mho C ISS V GS = V V DS = 5 V f = 1 MHz 48 pf C OSS V GS = V V DS = 5 V f = 1 MHz 19 pf C RSS V GS = V V DS = 5 V f = 1 MHz 18 pf 1. V GS(Q) and G FS sorted with alpha/numeric code marked on unit. Table 4. V GS and G FS sorts Code V GS G FS I J K Table 5. Dynamic Symbol Test conditions Min. Typ. Max. Unit P OUT V DD = 5 V I DQ = 25 ma f = 175 MHz 15 W G PS V DD = 5 V I DQ = 25 ma P OUT = 15 W f = 175 MHz db η D V DD = 5 V I DQ = 25 ma P OUT = 15 W f = 175 MHz % Load mismatch V DD = 5 V I DQ = 25 ma P OUT = 15 W f = 175 MHz all phase angles 1:1 VSWR DS Rev 4 page 3/16

4 Transient thermal impedance 3 Transient thermal impedance Thermal impedance -ZTHJ - C ( C/W) Figure 3. Transient thermal impedance Single - repetitive pulse E- 4 1.E-3 1.E-2 1.E-1 1.E+ 1.E+1 Rectangular power pulse width (s) single pulse 1% 2% 3% 4% 5% 6% 7% 8% 9% AM928V1 DS Rev 4 page 4/16

5 Transient thermal impedance Figure 4. Transient thermal impedance model Dissi pa ted Powe r_wa tts R1 R=.23 Ohm C C1 C=.2978 F R R2 R=.72 Ohm C C2 C= F R R3 R=.2 Ohm C C3 C= F R R4 R=.155 Ohm C C4 C= F AM9281V1 DS Rev 4 page 5/16

6 Typical performance 4 Typical performance Figure 5. Capacitance vs. drain voltage Figure 6. Drain current vs. gate voltage 1 2 Tc=-2 C f =1MHz 15 Tc=+25 C 1 Cis s 1 Coss 1 5 VDS = 1 V Tc=+8 C Crs s VDS, DRAIN-SOURCE VOLTAGE (V) VGS, GATE-SOURCE VOLTAGE (V) Figure 7. Gate-source voltage vs. case temperature Figure 8. Maximum thermal resistance vs. case temperature T C, CASE TEMPERATURE ( C) T C, CASE TEMPERATURE ( C) Figure 9. Safe operating area DS Rev 4 page 6/16

7 Typical performance (175 MHz) 4.1 Typical performance (175 MHz) Figure 1. Output power vs. input power Figure 11. Output power vs. input power at different Tc Vdd= 5V Vdd= 4V f= 175MHz Idq= 25mA P IN, INPUT POWER (W) Tc =-2 C Tc =+25 C Tc =+8 C 9 6 Vdd= 5V Idq= 25mA 3 f= 175MHz P IN, INPUT POWER (W) Figure 12. Power gain vs. output power Figure 13. Efficiency vs. output power Vdd=5V Idq=25mA f=175mhz 4 3 Vdd=5V Idq=25mA f=175mhz P OUT, INPUT POWER (W) P OUT, INPUT POWER (W) Figure 14. Output power vs. supply voltage Figure 15. Drain current vs. gate-source voltage Pin =1W Tc=-2 C Tc=+25 C 18 Pin =5W Pin =2.5W 1 Tc=+8 C Idq= 25mA f= 175MHz V DD, DRAIN VOLTAGE (V) V GS, GATE-SOURCE VOLTAGE (V) DS Rev 4 page 7/16

8 Typical performance (175 MHz) Test circuit (175 MHz) Figure MHz test circuit schematic (production test circuit) V G +5V Table MHz test circuit part list Component T1 T2 FB1 FB2, FB3 FB4 L1 Description 4:1 transformer, 25 Ω flexible coax.9 OD 6 long 1:4 transformer, 25 Ω semi-rigid coax.141 OD 6 long Toroid X 2,.5 OD.312 ID 85 µ 2 turns VK2 Shield bead, 1 OD.5 ID 85 µ 3 turns 1/4 wave choke, 5 Ω semi-rigid coax.141 OD 12 long PCB.62 woven fiberglass, 1 oz. copper, 2 sides, εr = 2.55 R1, R3 47 Ω 1 W chip resistor R2 R4 R5 36 Ω 1/2 W resistor 2 kω 1 turn potentiometer 56 Ω 1 W resistor C1, C11 47 pf ATC chip cap C2 43 pf ATC chip cap C3, C8, C9 Arco 44, pf C4 C5 C6 C7 C1 Arco 423, 16-1 pf 12 pf ATC chip cap.1 µf ATC chip cap 3 pf ATC chip cap 91 pf ATC chip cap C12, C15 12 pf ATC chip cap C13, C14,C16, C17.1 µf / 5 V chip cap C18 1 µf 63 V electrolytic capacitor DS Rev 4 page 8/16

9 Typical performance (175 MHz) Figure MHz test circuit photomaster 4 inches Figure MHz test circuit DS Rev 4 page 9/16

10 Typical performance (3 MHz) 4.2 Typical performance (3 MHz) Figure 19. Output power vs. input power Figure 2. Power gain vs. output power V d d = 5 V Pout (W) Vdd = 4 V Gp (db) P in (W ) f = 3 MH z ID Q = 2 5 m A P ou t (W ) f = 3 M H z VD D = 5 V ID Q = 25 m A Figure 21. Efficiency vs. output power Figure 22. Output power vs. supply voltage P in =.3 1 W 5 16 Pin =.22 W Nd (%) f = 3 M H z V D D = 5 V ID Q = 2 5 m A Pout (W) P in =.13 W P o u t (W ) 4 2 f = 3 M Hz ID Q = 25 m A Vdd (V) Figure 23. Output power vs. gate-source voltage T = + 25 C T = -2 C Pout (W) 1 8 T = + 8 C VD D = 5 V ID Q = 25 ma f = 3 M H z P in = C o n s tan t VG S (V) DS Rev 4 page 1/16

11 Typical performance (3 MHz) Test circuit (3 MHz) Figure MHz test circuit schematic (production test circuit) V G+ +5V Table 7. 3 MHz test circuit part list Component T1 T2 FB1 FB2 FB3 RFC1 Description 9:1 transformer, 25 Ω flexible coax with extra shield.9 OD 15 long 1:4 transformer, 5 Ω flexible coax.225 OD 15 long Toroid 1.7 OD.3 ID 22 µ 4 turns Surface mount EMI shield bead Toroid 1.7 OD.3 ID 22 µ 3 turns Toroid.5 OD.3 ID 125 µ 4 turns 12 awg wire PCB.62 woven fiberglass, 1 oz. copper, 2 sides, εr = 2.55 R1, R3 1 kohm 1 W chip resistor R2 C1, C4, C6, C7, C8, C9, C11, C12,C13 68 ohm 3 W wirewound resistor.1 μf ATC chip cap C2, C3 75 pf ATC chip cap C5 C1 C14 47 pf ATC chip cap 1 μf 63 V electrolytic capacitor 1 μf 63 V electrolytic capacitor DS Rev 4 page 11/16

12 Marking, packing and shipping specifications 5 Marking, packing and shipping specifications Table 8. Packing and shipping specifications Order code Packing Pieces per tray Dry pack humidity V GS and G FS code Lot code SD MR Plastic tray 25 < 1% Not mixed Not mixed Figure 25. SD MR marking layout GFS code SD MR Table 9. Marking specifications Symbol X CZ xxx VY MAR CZ y yy Description V GS and G FS sort Assembly plant Last 3 digits of diffusion lot Diffusion plant Country of origin Test and finishing plant Assembly year Assembly week DS Rev 4 page 12/16

13 Package information 6 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: ECOPACK is an ST trademark. 6.1 M174MR package information Figure 26. M174MR package outline 4xA.1/2.54 x45 2xøM 2xC 2xB 4xH PIN 5 (THERMAL BASE) 4X SEATING PLANED rev. A Table 1. M174 package mechanical data Dim. mm Min. Typ. Max. A B 3.18 C D E 3.18 F G H.8.18 I J K 8. L M DS Rev 4 page 13/16

14 Revision history Date Revision Changes 2-Feb Initial release Table 11. Document revision history 1-Sep Document promoted from preliminary data to full datasheet. Formatting and minor text changes. 11-Nov Updated Table 2: "Absolute maximum ratings". 7-Feb Updated marking in cover page and Figure 25. SD MR marking layout. Minor text changes. DS Rev 4 page 14/16

15 Contents Contents 1 Electrical data Maximum ratings Thermal data Electrical characteristics Transient thermal impedance Typical performance Typical performance (175 MHz) Test circuit (175 MHz) Typical performance (3 MHz) Test circuit (3 MHz) Marking, packing and shipping specifications Package information M174MR package information...13 Revision history...14 Contents...15 Disclaimer...16 DS Rev 4 page 15/16

16 IMPORTANT NOTICE PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 218 STMicroelectronics All rights reserved DS Rev 4 page 16/16