N-channel 60 V, Ω typ., 20 A STripFET F7 Power MOSFET in a PowerFLAT 3.3x3.3 package. Features. Description. AM15810v1

Transcription

1 N-channel 60 V, Ω typ., 20 A STripFET F7 Power MOSFET in a PowerFLAT 3.3x3.3 package Datasheet - production data Features Order code V DS R DS(on) max I D STL20N6F7 60 V Ω 20 A PowerFLAT 3.3x3.3 HV Figure 1: Internal schematic diagram D(5, 6, 7, 8) G(4) Among the lowest R DS(on) on the market Excellent figure of merit (FoM) Low C rss /C iss ratio for EMI immunity High avalanche ruggedness Applications Switching applications Description This N-channel Power MOSFET utilizes STripFET F7 technology with an enhanced trench gate structure that results in very low onstate resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. S(1, 2, 3) AM15810v1 Table 1: Device summary Order code Marking Package Packing STL20N6F7 20N6F PowerFLAT 3.3x3.3 Tape and reel June 2015 DocID Rev 3 1/13 This is information on a product in full production.

2 Contents STL20N6F7 Contents 1 Electrical ratings Electrical characteristics Electrical characteristics Test circuits Package mechanical data PowerFLAT 3.3x3.3 package information Revision history /13 DocID Rev 3

3 Electrical ratings 1 Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit V DS Drain-source voltage 60 V V GS Gate-source voltage ± 20 V I D (1) I D (1) I DM (1)(2) I D (3) I D (3) I DM (2)(3) P TOT (1) P TOT (3) T stg T j Drain current (continuous) at T C = 25 C 100 A Drain current (continuous) at T C = 100 C 61 A Drain current (pulsed) 400 A Drain current (continuous) at T pcb = 25 C 20 A Drain current (continuous) at T pcb = 100 C 12 A Drain current (pulsed) 80 A Total dissipation at T C = 25 C 78 W Total dissipation at T pcb = 25 C 3 W Storage temperature Operating junction temperature Notes: (1) This value is rated according to Rthj-c. (2) Pulse width limited by safe operating area. (3) This value is rated according to Rthj-pcb. -55 to 150 C Table 3: Thermal data Symbol Parameter Value Unit R thj-pcb (1) Thermal resistance junction-pcb max C/W R thj-case Thermal resistance junction-case max. 1.6 C/W Notes: (1) When mounted on FR-4 board of 1 inch², 2oz Cu, t < 10 sec. DocID Rev 3 3/13

4 Electrical characteristics STL20N6F7 2 Electrical characteristics (T C = 25 C unless otherwise specified) Table 4: On /off states Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)DSS I DSS I GSS V GS(th) R DS(on) Drain-source breakdown voltage Zero gate voltage drain current Gate-body leakage current Gate threshold voltage Static drain-source on-resistance I D = 1 ma, V GS = 0 V 60 V V GS = 0 V V DS = 60 V 1 µa V GS = 20 V, V DS = na V DS = V GS, I D = 250 μa 2 4 V V GS = 10 V, I D = 10 A Ω Table 5: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit C iss Input capacitance pf C oss Output capacitance V DS = 25 V, f = 1 MHz, pf C rss Reverse transfer V GS = 0 V capacitance pf Q g Total gate charge nc Q gs Gate-source charge V DD = 30 V, I D = 20 A, V GS = 10 V nc Q gd Gate-drain charge nc Table 6: Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit t d(on) Turn-on delay time ns t r Rise time V DD = 30 V, I D = 10 A, ns t d(off) Turn-off delay time R G = 4.7 Ω, V GS = 10 V ns t f Fall time ns Table 7: Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit V SD (1) t rr Q rr I RRM Forward on voltage I SD = 20 A, V GS = V Reverse recovery time Reverse recovery charge Reverse recovery current I D = 20 A, di/dt = 100 A/µs V DD = 48 V Notes: (1) Pulsed: pulse duration = 300 µs, duty cycle 1.5% ns - 36 nc A 4/13 DocID Rev 3

5 Electrical characteristics 2.1 Electrical characteristics Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance DocID Rev 3 5/13

6 Electrical characteristics Figure 8: Capacitance variations STL20N6F7 Figure 9: Normalized gate threshold voltage vs temperature Figure 10: Normalized on-resistance vs temperature Figure 11: Normalized V(BR)DSS vs temperature Figure 12: Source-drain diode forward characteristics 6/13 DocID Rev 3

7 Test circuits 3 Test circuits Figure 13: Switching times test circuit for resistive load Figure 14: Gate charge test circuit Figure 15: Test circuit for inductive load switching and diode recovery times Figure 16: Unclamped inductive load test circuit Figure 17: Unclamped inductive waveform Figure 18: Switching time waveform DocID Rev 3 7/13

8 Package mechanical data STL20N6F7 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: ECOPACK is an ST trademark. 8/13 DocID Rev 3

9 Package mechanical data 4.1 PowerFLAT 3.3x3.3 package information Figure 19: PowerFLAT 3.3x3.3 HV package outline BOTTOM VIEW SIDE VIEW TOP VIEW _A DocID Rev 3 9/13

10 Package mechanical data STL20N6F7 Table 8: PowerFLAT 3.3x3.3 HV package mechanical data mm Dim. Min. Typ. Max. A b c D D D e E E E H K L L L2 0.5 ϑ /13 DocID Rev 3

11 Figure 20: PowerFLAT 3.3x3.3 HV recommended footprint Package mechanical data _footprint DocID Rev 3 11/13

12 Revision history STL20N6F7 5 Revision history Table 9: Document revision history Date Revision Changes 28-Jan First release. 03-Feb Updated Table 2: "Absolute maximum ratings" 10-Jun In Section 2 Electrical characteristics: - updated Table 5: Dynamic - updated Table 6: Switching times - updated Table 7: Source-drain diode Added Section 2.1 Electrical characteristics (curves) 12/13 DocID Rev 3

13 IMPORTANT NOTICE PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document STMicroelectronics All rights reserved DocID Rev 3 13/13