STP16N65M2, STU16N65M2

Transcription

1 STP16N65M2, STU16N65M2 N-channel 650 V, 0.32 Ω typ., 11 A MDmesh M2 Power MOSFETs in TO-220 and IPAK packages Features Datasheet production data Order code V T Jmax R DS(on) max I D STP16N65M2 710 V 0.36 Ω 11 A STU16N65M2 710 V 0.36 Ω 11 A Extremely low gate charge Excellent output capacitance (C oss ) profile 100% avalanche tested Zener-protected Applications Figure 1. Internal schematic diagram, TAB Switching applications Description These devices are N-channel Power MOSFETs developed using MDmesh M2 technology. Thanks to their strip layout and improved vertical structure, the devices exhibit low on-resistance and optimized switching characteristics, rendering them suitable for the most demanding high efficiency converters. AM15572v1 Table 1. Device summary Order codes Marking Package Packaging STP16N65M2 16N65M2 TO-220 Tube STU16N65M2 16N65M2 IPAK Tube October 2014 DocID Rev 1 1/16 This is information on a product in full production.

2 Contents STP16N65M2, STU16N65M2 Contents 1 Electrical ratings Electrical characteristics Electrical characteristics (curves) Test circuits Package mechanical data TO-220, STP16N65M IPAK, STU16N65M Revision history /16 DocID Rev 1

3 STP16N65M2, STU16N65M2 Electrical ratings 1 Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit V GS Gate-source voltage ± 25 V I D Drain current (continuous) at T C = 25 C 11 A I D Drain current (continuous) at T C = 100 C 6.9 A I (1) DM Drain current (pulsed) 44 A P TOT Total dissipation at T C = 25 C 110 W dv/dt (2) Peak diode recovery voltage slope 15 V/ns dv/dt (3) MOSFET dv/dt ruggedness 50 V/ns T stg Storage temperature T j Max. operating junction temperature - 55 to 150 C 1. Pulse width limited by safe operating area. 2. I SD 11 A, di/dt 400 A/µs; V DS peak < V (BR)DSS, V DD =400 V. 3. V DS 520 V Table 3. Thermal data Symbol Parameter TO-220 Value IPAK Unit R thj-case Thermal resistance junction-case max 1.14 C/W R thj-amb Thermal resistance junction-amb max (1) C/W 1. When mounted on 1 inch² FR-4, 2 Oz copper board Table 4. Avalanche characteristics Symbol Parameter Value Unit I AR E AS Avalanche current, repetitive or not repetitive (pulse width limited by T jmax ) Single pulse avalanche energy (starting T j =25 C, I D = I AR ; V DD =50) 1.9 A 360 mj DocID Rev 1 3/16 16

4 Electrical characteristics STP16N65M2, STU16N65M2 2 Electrical characteristics (T C = 25 C unless otherwise specified) Table 5. On /off states Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)DSS I DSS Drain-source breakdown voltage Zero gate voltage drain current V GS = 0, I D = 1 ma 650 V V GS = 0, V DS = 650 V 1 µa V GS = 0, V DS = 650 V, T C =125 C 100 µa I GSS Gate-body leakage current V DS = 0, V GS = ± 25 V ±10 µa V GS(th) Gate threshold voltage V DS = V GS, I D = 250 µa V R DS(on) Static drain-source on-resistance V GS = 10 V, I D = 5.5 A Ω Table 6. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit C iss Input capacitance pf C oss Output capacitance V GS = 0, V DS = 100 V, pf C rss f = 1 MHz Reverse transfer capacitance pf (1) Equivalent output C oss eq. capacitance V GS = 0, V DS = 0 to 520 V pf R G Intrinsic gate resistance f = 1 MHz open drain Ω Q g Total gate charge nc Q gs Gate-source charge V DD = 520 V, I D = 11 A, V GS = 10 V (see Figure 17) nc Q gd Gate-drain charge nc 1. C oss eq. is defined as a constant equivalent capacitance giving the same charging time as C oss when V DS increases from 0 to 80% V DSS 4/16 DocID Rev 1

5 STP16N65M2, STU16N65M2 Electrical characteristics Table 7. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit t d(on) Turn-on delay time ns t r Rise time V DD = 325 V, I D = 5.5 A, ns t d(off) Turn-off delay time R G = 4.7 Ω, V GS = 10 V (see Figure 16 and 21) ns t f Fall time ns Table 8. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit I SD Source-drain current - 11 A I (1) SDM Source-drain current (pulsed) - 44 A V (2) SD Forward on voltage V GS = 0, I SD = 11 A V t rr Reverse recovery time ns Q rr Reverse recovery charge I SD = 11 A, di/dt = 100 A/µs V DD = 60 V (see Figure 18) µc I RRM Reverse recovery current A t rr Reverse recovery time I SD = 11 A, di/dt = 100 A/µs ns Q rr Reverse recovery charge V DD = 60 V, T j =150 C µc I RRM Reverse recovery current (see Figure 18) A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% DocID Rev 1 5/16 16

6 Electrical characteristics STP16N65M2, STU16N65M2 2.1 Electrical characteristics (curves) Figure 2. Safe operating area for TO-220 Figure 3. Thermal impedance for TO-220 Figure 4. Safe operating area for IPAK Figure 5. Thermal impedance for IPAK ID (A) GIPD FSR 10 Operation in this area is Limited by max RDS(on) 10µs 100µs 1 1ms Tj=150 C Tc=25 C Single pulse 10ms VDS(V) Figure 6. Output characteristics Figure 7. Transfer characteristics 6/16 DocID Rev 1

7 STP16N65M2, STU16N65M2 Electrical characteristics Figure 8. Normalized gate threshold voltage vs. temperature Figure 9. Normalized V (BR)DSS vs. temperature VGS(th) (norm) 1.1 ID = 250 µa GIPD FSR V(BR)DSS (norm) 1.08 ID= 1mA GIPD FSR Tj( C) Figure 10. Static drain-source on-resistance Tj( C) Figure 11. Normalized on-resistance vs. temperature RDS(on) (norm) GIPD FSR 2.2 VGS= 10V Figure 12. Gate charge vs. gate-source voltage Tj( C) Figure 13. Capacitance variations DocID Rev 1 7/16 16

8 Electrical characteristics STP16N65M2, STU16N65M2 Figure 14. Output capacitance stored energy Figure 15. Source-drain diode forward characteristics 8/16 DocID Rev 1

9 STP16N65M2, STU16N65M2 Test circuits 3 Test circuits Figure 16. Switching times test circuit for resistive load Figure 17. Gate charge test circuit VDD VGS VD RG RL D.U.T μf 3.3 μf VDD Vi=20V=VGMAX 2200 μf 12V IG=CONST 2.7kΩ 47kΩ 100Ω 100nF D.U.T. 1kΩ VG PW 47kΩ PW 1kΩ AM01468v1 AM01469v1 Figure 18. Test circuit for inductive load switching and diode recovery times Figure 19. Unclamped inductive load test circuit G 25 Ω D S A D.U.T. B A FAST DIODE B A B D L=100μH μf μf VDD VD ID L 2200 μf 3.3 μf VDD G RG S Vi D.U.T. AM01470v1 Pw AM01471v1 Figure 20. Unclamped inductive waveform Figure 21. Switching time waveform ton toff tdon tr tdoff tf 0 90% 10% VDS 10% 90% VGS 90% 0 10% AM01473v1 DocID Rev 1 9/16 16

10 Package mechanical data STP16N65M2, STU16N65M2 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: ECOPACK is an ST trademark. 10/16 DocID Rev 1

11 STP16N65M2, STU16N65M2 Package mechanical data 4.1 TO-220, STP16N65M2 Figure 22. TO-220 type A drawing DocID Rev 1 11/16 16

12 Package mechanical data STP16N65M2, STU16N65M2 Table 9. TO-220 type A mechanical data Dim. mm Min. Typ. Max. A b b c D D E e e F H J L L L L øp Q /16 DocID Rev 1

13 STP16N65M2, STU16N65M2 Package mechanical data 4.2 IPAK, STU16N65M2 Figure 23. IPAK (TO-251) type A drawing _L DocID Rev 1 13/16 16

14 Package mechanical data STP16N65M2, STU16N65M2 Table 10. IPAK (TO-251) type A mechanical data DIM mm. min. typ. max. A A b b b B c c D E e 2.28 e H L L L V /16 DocID Rev 1

15 STP16N65M2, STU16N65M2 Revision history 5 Revision history Table 11. Document revision history Date Revision Changes 24-Oct First release. DocID Rev 1 15/16 16

16 STP16N65M2, STU16N65M2 IMPORTANT NOTICE PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document STMicroelectronics All rights reserved 16/16 DocID Rev 1