N-channel 100 V, Ω typ., 110 A, STripFET F7 Power MOSFET in a H 2 PAK-2 package. Features. Description. Table 1.

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1 N-channel 100 V, Ω typ., 110 A, STripFET F7 Power MOSFET in a H 2 PAK-2 package Features Datasheet production data Order code V DS R DS(on)max I D P TOT STH150N10F V Ω 110 A 250 W TAB H PAK-2 3 Among the lowest R DS(on) on the market Excellent figure of merit (FoM) Low C rss /C iss ratio for EMI immunity High avalanche ruggedness Applications Switching applications Description Figure 1. Internal schematic diagram This N-channel Power MOSFET utilizes STripFET F7 technology with an enhanced trench gate structure that results in very low onstate resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. Table 1. Device summary Order code Marking Package Packaging STH150N10F N10F7 H 2 PAK-2 Tape and reel September 2016 DocID Rev 3 1/16

2 Contents STH150N10F7-2 Contents 1 Electrical ratings Electrical characteristics Electrical characteristics (curves) Test circuits Package information Packing information Revision history /16 DocID Rev 3

3 Electrical ratings 1 Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit V DS Drain-source voltage 100 V V GS Gate- source voltage ±20 V I D Drain current (continuous) at T C = 25 C 110 A I D Drain current (continuous) at T C = 100 C 110 A (1) I DM Drain current (pulsed) T C = 25 C 440 A P TOT Total dissipation at T C = 25 C 250 W E (2) AS Single pulse avalanche energy 495 mj T J Operating junction temperature range C -55 to 175 T stg Storage temperature range C 1. Pulse width is limited by safe operating area 2. Starting T j = 25 C, I D = 30 A, V DD = 50 V Table 3. Thermal data Symbol Parameter Value Unit R thj-case Thermal resistance junction-case max 0.6 C/W R (1) thj-pcb Thermal resistance junction-pcb max 35 C/W 1. When mounted on 1 inch² FR-4 board, 2 oz Cu DocID Rev 3 3/16 16

4 Electrical characteristics STH150N10F7-2 2 Electrical characteristics (T C = 25 C unless otherwise specified) Table 4. On /off states Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)DSS I DSS Drain-source breakdown voltage Zero gate voltage drain current 1. Defined by design, not subject to production test. V GS = 0 V, I D = 250 µa 100 V V GS = 0 V, V DS = 100 V 1 µa V GS = 0 V, V DS = 100 V, T C =125 C (1) 100 µa I GSS Gate-body leakage current V DS = 0 V, V GS = +20 V 100 na V GS(th) Gate threshold voltage V DS = V GS, I D = 250 µa V R DS(on) Static drain-source onresistance V GS = 10 V, I D = 55 A Ω Table 5. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit C iss Input capacitance pf C oss Output capacitance V DS = 50 V, f = 1 MHz, pf C rss V GS = 0 V Reverse transfer capacitance pf Q g Total gate charge V DD = 50 V, I D =110 A, nc Q gs Gate-source charge V GS = 10 V nc Q gd Gate-drain charge (see Figure 14) nc Table 6. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit t d(on) Turn-on delay time ns V DD = 50 V, I D = 55 A, t r Rise time ns R G = 4.7 Ω, V GS = 10 V t d(off) Turn-off delay time ns (see Figure 13) t f Fall time ns 4/16 DocID Rev 3

5 Electrical characteristics Table 7. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit I SD Source-drain current A I (1) SDM Source-drain current (pulsed) A V (2) SD Forward on voltage I SD = 110 A, V GS = V t rr Reverse recovery time I SD = 110 A, di/dt = 100 A/µs - 70 ns Q rr Reverse recovery charge V DD = 80 V, T J =150 C nc I RRM Reverse recovery current (see Figure 15) A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%. DocID Rev 3 5/16 16

6 Electrical characteristics STH150N10F Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance ID (A) AM18051v1 K δ=0.5 AM18052v Operation in this area is Limited by max RDS(on) Tj=175 C Tc=25 C Single pulse VDS(V) Figure 4. Output characteristics 100µs 1ms 10ms c 0.01 Single pulse tp(s) 10-3 Figure 5. Transfer characteristics ID (A) V VGS=10V 7V AM18042v1 ID (A) VDS=4V AM18043v V 5V VDS(V) Figure 6. Gate charge vs gate-source voltage VGS(V) Figure 7. Static drain-source on-resistance VGS (V) VDD=50V ID=110A AM18044v1 RDS(on) (mω) VGS=10V AM18053v Qg(nC) ID(A) 6/16 DocID Rev 3

7 Electrical characteristics Figure 8. Capacitance variations C (pf) Coss 0 Crss VDS(V) Figure 10. Normalized on-resistance vs temperature AM18046v1 Ciss Figure 9. Normalized gate threshold voltage vs temperature VGS(th) (norm) ID=250µA AM18047v TJ( C) Figure 11. Normalized V DS vs temperature RDS(on) (norm) 2 ID=55A AM18048v1 VDS (norm) 1.04 ID=1mA AM18049v TJ( C) TJ( C) Figure 12. Source-drain diode forward characteristics VSD (V) 1 TJ=-55 C AM18055v TJ=25 C TJ=175 C ISD(A) DocID Rev 3 7/16 16

8 Test circuits STH150N10F7-2 3 Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit VDD VGS VD RG RL D.U.T μf 3.3 μf VDD Vi=20V=VGMAX 2200 μf 12V IG=CONST 2.7kΩ 47kΩ 100Ω 100nF D.U.T. 1kΩ VG PW 47kΩ PW 1kΩ AM01468v1 AM01469v1 Figure 15. Test circuit for inductive load switching and diode recovery times Figure 16. Unclamped inductive load test circuit G 25 Ω D S A D.U.T. B A FAST DIODE B A B D L=100μH μf μf VDD VD ID L 2200 μf 3.3 μf VDD G RG S Vi D.U.T. AM01470v1 Pw AM01471v1 Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform V(BR)DSS ton toff VD tdon tr tdoff tf ID IDM 0 90% 10% VDS 10% 90% VDD VDD VGS 90% AM01472v1 0 10% AM01473v1 8/16 DocID Rev 3

9 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: ECOPACK is an ST trademark. DocID Rev 3 9/16 16

10 Package information STH150N10F7-2 Figure 19. H²PAK-2 package outline 10/16 DocID Rev 3

11 Package information Table 8. H²PAK-2 package mechanical data Dim. mm Min. Typ. Max. A A C e E F H H L L L L L M R V 0 8 DocID Rev 3 11/16 16

12 Package information STH150N10F7-2 Figure 20. H²PAK-2 recommended footprint (dimensions are in mm) _5 12/16 DocID Rev 3

13 Packing information 5 Packing information Figure 21. Tape 10 pitches cumulative tolerance on tape +/- 0.2 mm T Top cover tape P0 D P2 E K0 B0 F W A0 P1 D1 User direction of feed R User direction of feed Bending radius AM08852v2 DocID Rev 3 13/16 16

14 Packing information STH150N10F7-2 REEL DIMENSIONS Figure 22. Reel 40mm min. T Access hole At sl ot location D B C A N Full radius Tape slot in core for tape start 25 mm min. width G measured at hub AM08851v2 Table 9. H²PAK-2 tape and reel mechanical data Tape Reel Dim. mm mm Dim. Min. Max. Min. Max. A A 330 B B 1.5 D C D D 20.2 E G F N 100 K T 30.4 P P Base qty 1000 P Bulk qty 1000 R 50 T W /16 DocID Rev 3

15 Revision history 6 Revision history Table 10. Document revision history Date Revision Changes 31-Jan Aug Sep First release. The part number previously included in datasheet DocID Updated title, features and description in cover page. Updated Figure 3: Thermal impedance. Updated Section 4: Package information. Minor text changes. DocID Rev 3 15/16 16

16 IMPORTANT NOTICE PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document STMicroelectronics All rights reserved 16/16 DocID Rev 3

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