TO ± ± ± ± 0.2. Description Symbol Characteristics Unit Remarks VDS 600 V VDSX 600 V VGS=-30V
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1 FMPNS Super J-MOS series N-Channel enhancement mode power MOSFET Features Low on-state resistance Low switching loss easy to use (more controllabe switching dv/dt by Rg) Applications UPS Server Telecom Power conditioner system Power supply Outline Drawings [mm] TO-.±.. ± ± ±..±.. ±.. ±. ±..min. CONNECTION GATE DRAIN SOURCE.±..±. PRE-SOLDER. +..7±. JEDEC : TO-AB DIMENSIONS ARE IN MILLIMETERS. Equivalent circuit schematic Drain(D) Gate(G) Source(S) Maximum Ratings and Characteristics Absolute Maximum Ratings at TC= C (unless otherwise specified) Description Symbol Characteristics Unit Remarks Drain-Source Voltage VDS V VDSX V VGS=-V Continuous Drain Current ID ± A Tc= C Note* ±. A Tc= C Note* Pulsed Drain Current IDP ± A Gate-Source Voltage VGS ± V Repetitive and Non-Repetitive Maximum Avalanche Current IAR. A Note * Non-Repetitive Maximum Avalanche Energy EAS 7. mj Note * Maximum Drain-Source dv/dt dvds/dt kv/μs VDS V Peak Diode Recovery dv/dt dv/dt kv/μs Note * Peak Diode Recovery -di/dt -di/dt A/μs Note * Maximum Power Dissipation PD. Ta= C W TC= C Operating and Storage Temperature range Tch C Tstg - to + C Note * : Limited by maximum channel temperature. Note * : Tch C, See Fig. and Fig. Note * : Starting Tch= C, IAS=A, L=mH, VDD=V, RG=Ω, See Fig. and Fig. EAS limited by maximum channel temperature and avalanche current. Note * : IF -ID, -di/dt=a/μs, VDD V, Tch C. Note * : IF -ID, dv/dt=kv/μs, VDD V, Tch C.
2 FMPNS Electrical Characteristics at TC= C (unless otherwise specified) Static Ratings Description Symbol Conditions min. typ. max. Unit Drain-Source Breakdown Voltage Gate Threshold Voltage BVDSS VGS(th) ID=μA VGS=V ID=μA VDS=VGS - - V.. V Zero Gate Voltage Drain Current IDSS VDS=V VGS=V Tch= C - - μa VDS= VGS=V Tch= C - - Gate-Source Leakage Current IGSS VGS= ± V VDS=V - na Drain-Source On-State Resistance RDS(on) ID=A VGS=V -..9 Ω Gate resistance RG f=mhz, open drain Ω Forward Transconductance gfs ID=A VDS=V S Input Capacitance Ciss VDS=V Output Capacitance Coss VGS=V - - Reverse Transfer Capacitance Crss f=mhz Effective output capacitance, VGS=V Co(er) energy related (Note *) VDS= pf VGS=V Effective output capacitance, Co(tr) VDS= time related (Note *7) ID=constant - - td(on) - - Turn-On Time VDD=V, VGS=V tr - - ID=A, RG=7Ω td(off) - - Turn-Off Time See Fig. and Fig. tf - - ns Total Gate Charge QG VDD=, ID=A Gate-Source Charge QGS -. - VGS=V Gate-Drain Charge QGD - - See Fig. Drain-Source crossover Charge QSW nc Avalanche Capability IAV L=.mH, Tch= C See Fig. and Fig A Diode Forward On-Voltage VSD IF=A, VGS=V Tch= C -.9. V Reverse Recovery Time trr IF=A, VGS=V 7 - ns Reverse Recovery Charge Qrr VDD=V -di/dt=a/μs -. - μc Peak Reverse Recovery Current Irp Tch= C See Fig. - - A Note * : Co(er) is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from to 8% BVDSS. Note *7 : Co(tr) is a fixed capacitance that gives the same charging times as Coss while VDS is rising from to 8% BVDSS. Thermal Characteristics Description Symbol min. typ. max. Unit Channel to Case Rth(ch-c).8 C/W Channel to Ambient Rth(ch-a) C/W
3 FMPNS Allowable Power Dissipation PD= f(tc) Safe Operating Area ID=f(VDS): Duty=(Single pulse), TC= C t= µs µs µs PD [W] 8 - Power loss waveform : Squarewaveform ms P D t 7 TC [ C] Typical Output Characteristics ID=f(VDS): 8µs pulse test, Tch= C - - Typical Output Characteristics ID=f(VDS): 8µs pulse test, Tch= C V V V V.V V V.V.V V V VGS=.V.V VGS=V..V Typical Drain-Source on-state Resistance RDS(on)= f(id): 8µs pulse test, Tch= C V.V V.V V. Typical Drain-Source on-state Resistance RDS(on)= f(id): 8µs pulse test, Tch= C V.V V...V RDS(on) [ Ω ].. VGS=V RDS(on) [ Ω ]..8. V V VGS=V......
4 FMPNS. Drain-Source On-state Resistance RDS(on)= f(tch): ID=A, VGS=V Gate Threshold Voltage vs. Tch VGS(th)= f(tch): VDS= VGS, ID= µa.. RDS(on) [ Ω ]. max. VGS(th) [V] typ.. typ Tch [ C] Typical Transfer Characteristic ID= f(vgs): 8µs pulse test, VDS=V Tch [ C] Typical Transconductance gfs= f(id):8µs pulse test, VDS=V Tch= ID[A] Tch= gfs [S].. E VGS[V] Typical Forward Characteristics of Reverse Diode IF= f(vsd): 8µs pulse test.. Typical Capacitance C= f(vds): VGS=V, f=mhz Ciss IF [A] Tch= C [pf] Coss Crss VSD [V] - - -
5 FMPNS Typical Coss stored energy Typical Switching Characteristics vs. ID Tch= t= f(id): Vdd=V, VGS=V/V, RG=7Ω, L=uH 8 tr Eoss [uj] t [ns] td(off) tf td(on) Typical Gate Charge Characteristics VGS= f(qg): ID=A, Vdd=, Tch= C Maximum Avalanche Energy vs. startingtch E(AV)= f(starting Tch): VCC=V, I(AV)<=.A I AS=A 8 VGS [V] EAV [mj] I AS=A I AS=.A Qg [nc] 7 starting Tch [ C] Transient Thermal Impedance Zth(ch-c)= f(t): D= Zth(ch-c) [ /W] t [sec]
6 FMPNS Outview: TO- Package.± ±..±..±.. ±. ±.. ±.. ±..min. PRE-SOLDER ±..±..7±. CONNECTION GATE DRAIN SOURCE Marking JEDEC : TO-AB DIMENSIONS ARE IN MILLIMETERS. Country of origin mark. " " (Blank): Japan P : Philippines Trademark NS YMNNN Type name Date code & Lot No. Y: Last digit of year M: Month code ~9 and O,N,D NNN: Lot. serial number Under bar of date code : means lead-free mark * The font (font type,size) and the trademark-size might be actually different.
7 FMPNS WARNING. This Catalog contains the product specifications, characteristics, data, materials, and structures as of February. The contents are subject to change without notice for specification changes or other reasons. When using a product listed in this Catalog, be sur to obtain the latest specifications.. All applications described in this Catalog exemplify the use of Fuji's products for your reference only. No right or license, either express or implied, under any patent, copyright, trade secret or other intellectual property right owned by Fuji Electric Co., Ltd. is (or shall be deemed) granted. Fuji Electric Co., Ltd. makes no representation or warranty, whether express or implied, relating to the infringement or alleged infringement of other's intellectual property rights which may arise from the use of the applications described herein.. Although Fuji Electric Co., Ltd. is enhancing product quality and reliability, a small percentage of semiconductor products may become faulty. When using Fuji Electric semiconductor products in your equipment, you are requested to take adequate safety measures to prevent the equipment from causing a physical injury, fire, or other problem if any of the products become faulty. It is recommended to make your design failsafe, flame retardant, and free of malfunction.. The products introduced in this Catalog are intended for use in the following electronic and electrical equipment which has normal reliability requirements. Computers OA equipment Communications equipment (terminal devices) Measurement equipment Machine tools Audiovisual equipment Electrical home appliances Personal equipment Industrial robots etc.. If you need to use a product in this Catalog for equipment requiring higher reliability than normal, such as for the equipment listed below, it is imperative to contact Fuji Electric Co., Ltd. to obtain prior approval. When using these products for such equipment, take adequate measures such as a backup system to prevent the equipment from malfunctioning even if a Fuji's product incorporated in the equipment becomes faulty. Transportation equipment (mounted on cars and ships) Trunk communications equipment Traffic-signal control equipment Gas leakage detectors with an auto-shut-off feature Emergency equipment for responding to disasters and anti-burglary devices Safety devices Medical equipment. Do not use products in this Catalog for the equipment requiring strict reliability such as the following and equivalents to strategic equipment (without limitation). Space equipment Aeronautic equipment Nuclear control equipment Submarine repeater equipment 7. Copyright 99- by Fuji Electric Co., Ltd. All rights reserved. No part of this Catalog may be reproduced in any form or by any means without the express permission of Fuji Electric Co., Ltd. 8. If you have any question about any portion in this Catalog, ask Fuji Electric Co., Ltd. or its sales agents before using the product. Neither Fuji Electric Co., Ltd. nor its agents shall be liable for any injury caused by any use of the products not in accordance with instructions set forth herein. 7
TO-3P. φ3.2± max 10 ± 0.2 3± ± ±0.2
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General Description These N-Channel enhancement mode power field effect transistors are planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance,
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DESCRIPTION is the N-Channel enhancement mode power field effect transistors are using trench DMOS technology. This advanced trench technology devices are well suited for high efficiency fast switching
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