RF transmitting transistor and power amplifier fundamentals. Transmitting transistor design. Philips Semiconductors

Transcription

1 Philis Smiconductors owr amlifir fundamntals Transmitting transistor dsign 1 TRANSMITTING TRANSISTOR DESIGN 1.1 Di tchnology and dsign A transmitting transistor has to dlivr high owr at high frquncy (>1 MHz). This mans that a larg transistor di with a fin structur is rquird. Biolar and MOS transistors ar suital, s anl, and Philis Smiconductors ortfolio includs oth tys. Thir rlativ mrits ar summarizd latr in this sction. First, howvr, lt s look at th asic ascts of dsign that contriut to th rliaility and high-rformanc of a modrn RF transmitting transistor. TRANSISTOR FABRICATION As is wll-known, most transistors ar faricatd from silicon wafrs (5" dia. or largr, and aout 0.25 mm thick) in a multi-stag atch rocss that involvs rcis, localizd doing of an itaxial layr grown on th silicon sustrat to form th diffrnt transistor rgions. Th main rocss sts for faricating iolar transistors ar shown hr as a rmindr. MOS transistors ar faricatd using similar tchniqus. Though smiconductor manufacturrs hav many rocsss availal to mt diffrnt commrcial and tchnical scifications, thy all ar asd on th rincils outlind low. 1. Silicon wafr 2. Oxidiz to form oxid layr 3. Aly hotosnsitiv layr 4. Exos through high-rsolution mask 5. Dvlo hotosnsitiv layr 6. Etch as window through oxid layr 7. Rmov rmaining hotosnsitiv layr 8. Diffus or ion-imlant th as 9. Oxidiz as window 10. Exos mittr window 11. Etch mittr window through oxid layr 12. Rmov rmaining hotosnsitiv layr 13. Diffus or ion-imlant th mittr 14. Crat mtallization window 15. Mtalliz as and mittr rgions 16. Polish and mtalliz ottom (collctor). handook, full agwidth mask mask Silicon oxid Bas Emittr Photosnsitiv layr Bas diffusion Emittr diffusion Mtallization 16 Collctor MGM Mar 23 1

2 Philis Smiconductors owr amlifir fundamntals Transmitting transistor dsign Biolar transistor dis THE COLLECTOR (SUBSTRATE MATERIAL) All of Philis rsnt iolar tys ar NPN silicon lanar itaxial transistors, s Figs 1-1 and 1-2. Th asic itaxial matrial consists of a highly dod n-sustrat (100 to 200 µm thick) with a rathr high ohmic n-layr (i-layr) dositd on to. Th rsistivity of this layr dtrmins th collctor-as rakdown voltag of th dvic (V (BR)CBO ). Most Philis transistors intndd for oration at a suly voltag of 28 V hav a guarantd rakdown voltag of 65 V (and a tyical valu of aout 80 V). Th rquird rsistivity of th i-layr for this rakdown voltag is 1.6 to 2.0 Ωcm, th xact valu having a vry small tolranc. handook, halfag A scond imortant dsign aramtr is th i-layr thicknss, which must thickr than th collctor dltion layr thicknss at rakdown to rvnt rvrs scond rakdown whn th as currnt is ngativ. This occurs whn th collctor voltag is highr than th collctor-mittr rakdown voltag with on as, V (BR)CEO. Normally, this voltag is aout half th collctor-as rakdown voltag mntiond arlir. Whn th collctor voltag is twn ths two collctor rakdown voltags (V (BR)CBO and V (BR)CEO ), th situation is as shown in Fig.1-3. handook, halfag as mittr as,,,,,, s Fig.1-5 Fig.1-2 MGM658 Layout of a tyical iolar transmitting transistor di. as + mittr as contact n i-layr handook, halfagas mittr + as n sustrat collctor MGM001 Fig.1-1 collctor MGM655 Cross-sction of a iolar transmitting transistor. Fig.1-3 Whn th collctor voltag is twn V (BR)CBO and V (BR)CEO, vry high currnt dnsitis ar formd undr th mittr. Th arrows indicat th dirction of lctron currnt Mar 23 2

3 Philis Smiconductors owr amlifir fundamntals Transmitting transistor dsign As Fig.1-3 shows, th collctor currnt is concntratd in th middl of th mittr which can lad to vry high currnt dnsitis. Th as is ngativ along th dg of th mittr and ositiv nath it. If this situation continus for a long tim, it will vntually dstroy th transistor. This ffct can rducd y making th i-layr somwhat thickr than strictly ncssary, th chosn thicknss ing a comromis twn th transistor s RF rformanc and its aility to withstand crtain forms of outut mismatching THE EMITTER AND BASE Th mittr of an RF owr transistor must dimnsiond such that th transistor can dlivr th rquird outut owr with all rformanc-dgrading ffcts such as caacitancs minimizd. To achiv this, oth th mittr ara and rihry ar imortant aramtrs, caus of mittr-crowding, s Fig.1-4. Th as (lctron) currnt maks th as ositiv along th dg of th mittr ut ngativ in th middl. This mans that collctor currnt only flows at th dg of th mittr, so th otntial outut owr is mainly dtrmind y th mittr rihry. Undr normal orating conditions, only 1 to 2 µm of th dg of th mittr is activ; th rst of th mittr mrly introducs arasitic caacitanc. A ractical choic for mittr width is 2to4µm. For a 2 to 4 µm wid mittr, a good dsign rul of thum is that vry watt of outut owr rquirs aout 2 mm of mittr rihry. A narrowr mittr can imrov som charactristics, ut rquirs mor mittr rihry r watt. Of cours, it is not vry ractical to mak on xtrmly long, narrow mittr, so transistor dsignrs us an intrdigitatd structur as shown in Fig.1-5. In this structur, th mittr is slit into svral aralll arts ( fingrs ) with th as contacts in twn. Th fingr itch is mainly dtrmind y th maximum frquncy of oration - th highr th frquncy, th smallr th itch. Th mittr fingrs ar normally connctd at on nd y mtallization. As a rsult, thr is a voltag dro along ach fingr. This must not xcd 25 to 30 mv at maximum collctor currnt othrwis art of th fingr will cut off nar th othr nd. Slitting th mittr into many sctions is thus rquird for ractical rasons and for good oration. This is also tru to som xtnt for th as, ut for diffrnt rasons. In fact, if th rquird outut owr is low, say 2 to 3 W, a singl as ara is acctal. At highr owrs, it is ncssary to slit th as ara into svral arts as this: Rducs th thrmal rsistanc of th di Incrass th as rihry, imroving th distriution of dissiation at rakdown sinc collctor rakdown occurs first along th dgs of th as aras Allows mor as and mittr onding ads to includd, which rducs th mittr lad inductanc, incrasing th owr gain. In addition, slitting th as ara rducs th currnt through ach onding wir. Th rfrrd distanc twn succssiv as aras is aroximatly twic th di thicknss, say aout 300 µm, to otain a low thrmal rsistanc. A disadvantag of slitting th as is highr arasitic caacitancs. handook, halfagas Fig mittr collctor Emittr crowding ffct. Th arrows indicat th dirction of lctron currnt in normal oration. Not, to rvnt confusion, th as currnt has also n drawn as an lctron currnt. + as n MGM Mar 23 3

4 Philis Smiconductors owr amlifir fundamntals Transmitting transistor dsign handook, halfag allast rsistor MGM657 Fig.1-5 Intrdigitatd as-mittr structur EMITTER BALLAST RESISTORS For lctrical ruggdnss, a uilt-in mittr allast rsistor is virtually a ncssity. This is crtainly th cas whn class-a or class-ab oration can xctd. In class-a for instanc, without such an mittr rsistor, th collctor currnt can com rstrictd to a small ara in th middl of th di whr th tmratur is highst. This causs a larg incras in th thrmal rsistanc which can dstroy th transistor at a much-rducd DC owr. To rvnt this ffct, ach mittr fingr or grou of two fingrs, is rovidd with an mittr rsistor. Good currnt distriution is otaind if th total mittr rsistanc is such that th voltag dro across it is aroximatly 200 to 300 mv at th normal DC collctor currnt. Emittr rsistors can mad as a + -diffusion sid th as aras (Fig.1-6a) or as a dod olysilicon layr on to of th oxid (Fig.1-6), th lattr roducing lss arasitic caacitanc. Th tmratur cofficint (t.c.) of a diffusd mittr rsistanc is ositiv, and at ractical orating tmraturs (~125 C), th rsistanc incrass y aroximatly 0.1%/K. Th t.c. of a olysilicon rsistor is much smallr Mar 23 4

5 Philis Smiconductors owr amlifir fundamntals Transmitting transistor dsign DIFFUSION AND IMPLANTATION PROCESSES Th first transmitting transistors wr mad using diffusion rocsss. Nowadays, ion imlantation followd y tmratur tratmnt is th rfrrd manufacturing rocss as it rovids surior rroduciility and sharr (i.. ttr dfind) doing transitions. Th scific imlantation rocss usd dnds rimarily on th maximum frquncy of oration rquird. For th highst frquncy transistors, xtrmly shallow imlantations ar usd, giving a thin as and a high f T. Th rsulting h FE, usually aout 50, is aml for RF oration Vrtical DMOS transistor dis THE DRAIN (SUBSTRATE MATERIAL) Philis RF owr MOS transistors ar all silicon n-channl nhancmnt tys, (s Fig.1-7). Th considrations for and dimnsioning of th itaxial matrial ar rincially th sam as thos for iolar transistors (Sction ). handook, full agwidth SiO 2 TiPtAu SiO 2 TiPtAu Polysilicon,, (a) n n + () n MGM004 Fig.1-6 Emittr rsistanc formd (a) y a + -diffusion sid th as aras, and () as a dod olysilicon layr on to of th oxid. handook, full agwidth mtallization,,, n+ gat gat sourc,,,,,,, n+ n+ n+ channl rgion n n+,,,,,,,,,,,,,,,, drain MGM005 Fig.1-7 Cross-sction of a vrtical DMOS transmitting transistor. Th lngth of th gat (th channl lngth) is in th lan of th ar; th channl width is into th lan of th ar Mar 23 5

6 Philis Smiconductors owr amlifir fundamntals Transmitting transistor dsign THE SOURCE AND GATE Th configuration of sourc and gat in most MOS transmitting transistors is similar to th intrdigitatd mittr and as of a iolar transistor, s Fig.1-9. Th RF outut owr that such a dvic can dlivr dnds of cours on th maximum drain currnt (I DSX ) which, in turn, is dirctly roortional to th width of th gat (aroximatly qual to th channl width ). To facilitat comarison with iolar transistors, th sourc rihry (virtually th sam as th total channl width) is usd. Dimnsioning is thn vry similar to that of a iolar transistor, namly 2 to 3 mm of sourc rihry r watt of outut owr. An quivalnt to th mittr allast rsistors of a iolar transistor is not rquird. This is caus th tmratur cofficint of th drain currnt as a function of th gat voltag is ngativ at high drain currnts, roviding automatic rotction against thrmal runaway, s Fig handook, halfag I D (A) 8 4 Fig.1-8 T j = 25 C 125 C MGM V 20 GS (V) At high drain currnts, th ngativ tmratur cofficint of th drain currnt vs. gat voltag rotcts against thrmal runaway. handook, halfag s g s MGM659 Fig.1-9 Intrdigitatd sourc and gat arrangmnt of a tyical MOS transmitting transistor di. Di siz: 1 1 mm Mar 23 6

7 Philis Smiconductors owr amlifir fundamntals Transmitting transistor dsign THE CHANNEL REGION As for iolar dvics, th rocss usd to manufactur a MOS transistor is dndnt on th intndd maximum orating frquncy. A ky aramtr is th lngth of th channl, l ch, (gat) caus it dtrmins th cut-off frquncy, f T : f T whr: G fs V sat = = πC is 4πl ch G fs is th forward transconductanc C is is th inut caacitanc V sat is th saturation vlocity (for silicon: 10 7 cm/s) and l ch is th channl (gat) lngth COMPARISON OF VDMOS AND BIPOLAR TRANSISTORS Both Philis iolar and MOS tys can rovid xcllnt rformanc. At high frquncis ( 1 GHz and aov), iolar transistors usually rovid th st all-round rformanc. At lowr frquncis, VDMOS dvics can outrform iolar tys,.g. on owr gain, and will likly catur an incrasing art of th rsnt iolar markt as rformanc continus to imrov. Tal 1-1 VDMOS and iolar dvics comard ADVANTAGES OF VDMOS Simlr iasing circuit. This is rimarily du to a MOS transistor s high inut imdanc, and th low and ngativ tmratur cofficint at high drain currnts. Lowr nois. This is scially imortant in dulx quimnt and whr many transcivrs ar orating nar to ach othr and at similar frquncis.in on tst, an imrovmnt of 7 db was masurd at 75 MHz in similar widand amlifirs. Highr owr gain (u to 5 db highr) than comaral iolar tys at lowr frquncis. This is mainly du to th high transconductanc and low fdack caacitanc. Siml control of th outut owr. Th outut owr can controlld down to almost zro simly y rducing th DC gat-sourc voltag. Surior thrmal staility owing to th ngativ tmratur cofficint of th drain currnt at high lvls, this is also why th currnt distriution ovr th whol activ ara of a VDMOS dvic is so good. Surior load mismatch tolranc - Anothr nfit of th surior thrmal staility of a VDMOSFET. Lowr high-ordr (7th and highr) intrmodulation roducts du to th smoothr charactristics of MOS dvics. DISADVANTAGES OF VDMOS Th gat is snsitiv to lctrostatic chargs so ESD rotction masurs must takn. Highr outut owr slum (rduction of outut owr at high tmratur). Not, this is rimarily causd y dcrasing transconductanc Mar 23 7

8 Philis Smiconductors owr amlifir fundamntals Transmitting transistor dsign Latral DMOS (LDMOS) transistor dis LDMOS tchnology is a rlativly rcnt dvlomnt. Unlik VDMOS which can usd u to aout 1 GHz, LDMOS, lik iolar, is suital for us at highr frquncis owing to its lowr fdack caacitanc and sourc inductanc than VDMOS. Howvr, dnding on th articular rformanc and cost rquirmnts, VDMOS, LDMOS or iolar can rovid th st solution THE SOURCE (SUBSTRATE MATERIAL) Philis LDMOS transistors ar all silicon n-channl nhancmnt tys, (s Fig.1-11). Th sustrat is highly dod -matrial, whras th itaxial layr is lightly dod - -matrial THE DRAIN AND GATE Th configuration of drain and gat is fairly similar to th intrdigitatd mittr and as of a iolar transistor, s Fig Not howvr that all rgions, (gat, sourc and drain) ar mtallizd on to of th di. Th gat and drain ar connctd to onding ads, and th sourc is groundd to th sustrat y mans of a via-diffusion through th i-layr. Th nfit of this dsign is that a singl mtal intrconnct can usd. Not, th to sourc mtallization is solly for intrconncting th + and rgions; th transistor s sourc lctrod is connctd to th ottom (sustrat) mtallization. As for a VDMOS dvic, th RF outut owr that an LDMOS dvic can dlivr dnds on th maximum drain currnt (I DSX ) which is dirctly roortional to th width of th gat (aroximatly qual to th channl width ). And, an quivalnt to th mittr allast rsistors of a iolar transistor is again not rquird, s Sction THE CHANNEL REGION As with VDMOS, a ky aramtr of an LDMOS transistor is th lngth of th channl, l ch (gat) caus it dtrmins th cut-off frquncy, f T (dfind as for VDMOS in Sction ). handook, halfag Fig.1-10 d g Intrdigitatd drain, sourc and gat arrangmnt of a tyical LDMOS transmitting transistor di. Di siz: mm 2. d MGM660 handook, full agwidth gat sourc gat drain gat,,,,,,,,,,,,,,,, + wll n wll n drain xtnsion channl rgion + i-layr + sustrat Fig.1-11 sourc MGM007 Cross-sction of an LDMOS transmitting transistor. Th lngth of th gat (th channl lngth) is in th lan of th ar; th channl width is into th lan of th ar Mar 23 8

9 Philis Smiconductors owr amlifir fundamntals Transmitting transistor dsign COMPARISON OF LDMOS AND BIPOLAR TRANSISTORS Both Philis LDMOS and iolar transistors can rovid xcllnt rformanc in a varity of alications. Nvrthlss, thr ar som diffrncs. For xaml, th latral structur of an LDMOS transistor mans it has Tal 1-2 LDMOS and iolar dvics comard ADVANTAGES OF LDMOS Simlr iasing circuit. This is rimarily du to a MOS transistor s high inut imdanc, and th low and ngativ tmratur cofficint at high drain currnts. Highr owr gain than comaral iolar tys. This is du to th low sourc inductanc and low fdack caacitanc. Siml control of th outut owr. Th outut owr can controlld down to almost zro simly y rducing th DC gat-sourc voltag. Surior thrmal staility owing to th ngativ tmratur cofficint of th drain currnt at high lvls. This is also why th currnt distriution ovr th whol activ ara of an LDMOS dvic is so good. Surior load mismatch tolranc - anothr nfit of th surior thrmal staility of an LDMOSFET. Lowr high-ordr (7th and highr) intrmodulation roducts du to th smoothr charactristics of MOS dvics. 1.2 Transistor quivalnt circuit At this oint, it is usful to introduc a asic quivalnt circuit of a iolar RF transmitting transistor, and a fw siml xrssions that indicat th haviour of owr gain, inut and load imdanc undr diffrnt conditions. This will assist th undrstanding of th following sction on intrnal matching. Figur 1-12 shows a siml quivalnt circuit of an RF transistor with load circuit. Not, th mittr inductanc, L E, affcts transistor rformanc significantly as w shall s rsntly Main lmnts Th collctor-to-as fdack caacitanc consists of two arts (s Fig.1-1, transistor cross-sction): An intrinsic art C BCi : th caacitanc of th rvrs iasd collctor-to-as junction in th rgions low th mittr An xtrinsic art C BC : th caacitanc of th sam junction yond th mittr. C BC also includs arasitic caacitancs introducd y th as mtallization. a vry low fdack caacitanc comard with a iolar transistor. And as owr gain is dirctly rlatd to th fdack caacitanc and sourc (or mittr) inductanc, this mans an LDMOS transistor has highr owr gain. Furthrmor, an LDMOS transistor has surior intrmodulation distortion rformanc ovr a larg dynamic rang. DISADVANTAGES OF LDMOS Th gat is snsitiv to lctrostatic chargs, so ESD rotction masurs must takn. Highr outut owr slum (rduction of outut owr at high tmratur). Not, this is rimarily causd y dcrasing transconductanc. Th sum of ths caacitancs, C BCt, is ulishd in data shts as C r : C r = C BCi + C BC R B rrsnts th sris rsistanc of th as layr, and R E is th mittr allast rsistanc. C BE rrsnts th total forward iasd as-mittr caacitanc which is mainly dtrmind y th diffusion caacitanc, and which varis dirctly with th mittr currnt. This caacitanc is normally shuntd y a rsistor, omittd hr, sinc at high frquncy oration, virtually all currnt flows into C BE. Th collctor is trminatd y a load rsistanc R L shuntd y an inductanc L L which rsonats with th total collctor-to-as caacitanc. Aroximat xrssions for ths circuit lmnts ar: 2 1 V L L = and ω 2 R L = C C 2P L BC 1998 Mar 23 9

10 Philis Smiconductors owr amlifir fundamntals Transmitting transistor dsign At high frquncis, th collctor currnt, i c, is roortional to th as-mittr currnt, i, and lags th lattr y 90 : ω T i c i jω Clarly, th high frquncy common-mittr currnt gain, h f, is aroximatly ω T /ω. To simlify th following aroximations, it has n assumd that: For maximum owr, th collctor circuit is in rsonanc, i.. v c and i c ar in antihas Th as otntial is vry small comard to th collctor voltag All collctor arasitics ar art of th load circuit. handook, halfag C BC Inut imdanc With ths assumtions, th inut imdanc, Z in, can aroximatd y: 1 Z in = ω T C BCt R L ( 1 + ω T C BCi R L )R B + ω T L E + R E + jωl E R jω E ω T C BE Not that mittr inductanc ffctivly incrass th total inut rsistanc y ω T L E. Th mittr allast rsistanc R E aars as a sris caacitanc 1/R E ω T, dcrasing th total inut caacitanc. Basd on this xrssion, th total inut imdanc can rrsntd y a sris RLC quivalnt circuit, s Sction Powr gain Th owr gain, G, can aroximatd y: P in R B ' C BCi c P L P G L ω T 2 1 = = P in ω ω T C BCt R L C BE v ' v c i c R L ( 1 + ω T C BCi R L )R B + R E + ω T L E : Bas. c: Collctor. : Emittr. Fig.1-12 R E L E transistor MGM656 R L Siml quivalnt circuit of a iolar RF transmitting transistor. L L load Not that mittr inductanc L E rducs owr gain and is a ky rformanc-dtrmining factor in high-frquncy transistors. It dnds on onding wir and ackag inductancs. Othr imortant aramtrs affcting owr gain ar R E and ths ar dtrmind y th activ arts of th di dsign Larg-signal xrssions Th xrssions givn for Z in and G rlat to class-a amlifirs orating in th linar (i.. small-signal) rgion. For larg-signal oration, svral lmnts com non-linar. Th xrssions can howvr still usd for a first-ordr aroximation y sustituting avrag valus for th voltag and currnt dndnt lmnts. In addition for class-b and class-c oration, th conduction angl, which affcts th avrag valu of ω T, should takn into account Mar 23 10

11 Philis Smiconductors owr amlifir fundamntals Transmitting transistor dsign 1.3 Intrnal matching Imdanc matching is rquird to otimiz th rformanc of a transmitting transistor in th alication for which it was dsignd. Intrnal matching raiss imdancs and imrovs widand caaility. To assist dsignrs, many of Philis transmitting transistors alrady incororat intrnal matching circuitry, simlifying or rducing th xtrnal matching rquird Inut matching Figur 1-13 shows th quivalnt circuit of th inut imdanc of a iolar transmitting transistor without matching circuitry. At high frquncis, th caacitor has vry low ractanc and can nglctd in most cass. In a high-owr transistor, th rsistor coms vry small, tyically <1 Ω, as such a dvic can considrd as many small transistors in aralll Th inductor, which is normally 1 to 2 nh, has a rathr high ractanc in th UHF rgion, so th inut Q coms high, making widand matching difficult if not imossil, whil circuit losss incras significantly. To comnsat for ths ffcts, an additional caacitor is oftn faricatd insid th transistor such that th transistor quivalnt circuit is as shown in Fig This caacitor, togthr with th as and mittr inductancs, forms a first matching sction that raiss th inut imdanc to a mor acctal lvl. Th rsonant frquncy of th sction is st to somwhat aov th maximum orating frquncy for which th transistor is intndd. An additional advantag of this configuration is that it incrass th owr gain slightly at th high nd of th frquncy and, not only caus of rducd circuit losss, ut mainly caus th caacitor is, in ffct, connctd to a ta on th mittr lad inductanc, ovrcoming a major caus of rducd owr gain at high frquncis (mittr lad inductanc). A MOS caacitor is usd, and it can only usd in transistor ackags with two mittr ridgs : on, th normal lvatd ridg; th othr, an intgratd ridg on th ryllia disc to which th caacitor is soldrd. Th maximum rformanc imrovmnt is otaind with ackags having four mittr connctions (s Fig.1-15). Bttr still of cours ar ackags with intrnal mittr grounding. handook, halfag L R handook, halfag TRANSISTOR DIE c C MGM008 MGM009 Fig.1-13 Equivalnt circuit of th inut imdanc of a iolar transmitting transistor. For high-frquncy high-owr oration, matching circuitry is rquird. : as; : mittr. Fig.1-14 Equivalnt circuit of a iolar transmitting transistor with intrnal inut matching. Adding an intrnal caacitor imrovs widand matching Mar 23 11

12 Philis Smiconductors owr amlifir fundamntals Transmitting transistor dsign c lvatd mittr ridg handook, halfag L c R C transistor di MGM010 intgratd mittr ridg MOS caacitor Fig.1-15 Position of th MOS inut matching caacitor in a ackag with two mittr ridgs, and four mittr connctions. MGM661 Fig.1-16 Larg-signal quivalnt circuit of th outut of an RF owr transistor. L: collctor and mittr lad inductanc; C: ffctiv outut caacitanc; R: otimum load rsistanc. Not, R is th load rsistanc that roducs maximum outut. It is not a hysical rsistor in a transistor and its valu varis according to th alication Outut matching At th outut of a transistor, th situation is somwhat diffrnt, s Fig In widand matching circuits, it is dsiral to tun out (with inductiv shunt) th caacitor C somwhr in th frquncy and for which th transistor is intndd. In ractic, th st rsults ar otaind whn th rsonant frquncy is in th lowr art of th and. If an xtrnal shunt inductor wr usd for this uros, th rsult would a vry low inductiv ta, making furthr matching xtrmly difficult, scially at high owrs and frquncis. A ttr solution would to tun out th collctor caacitanc insid th transistor ackag. This is don in ractic in alancd (ush-ull) transistors y adding a mtallizd stri onto th ryllia or aluminium nitrid disc. In singl-ndd dvics, it is don y conncting on sid (th othr is groundd) of a MOS caacitor that rovids isolation to th collctor via onding wirs that form th rquird shunt inductanc, s Fig A disadvantag of this aroach in oth cass is that such a transistor is unsuital for us in frquncy ands lowr than th on for which it is intndd. This limitation is outwighd howvr y th highr load imdanc and lowr Q-factor, rsulting in lowr losss in th matching circuit and imrovd widand rformanc Mar 23 12

13 Philis Smiconductors owr amlifir fundamntals Transmitting transistor dsign handook, full agwidth c 1 c 2 mtallizd stri forming th collctor-collctor shunt inductanc c 1 transistor di MOS caacitors for 2-stag inut matching ush-ull () c 2 (a) onding wirs (4 ) forming th shunt inductanc c MOS caacitor isolating th shunt inductanc c transistor di MOS caacitors for 2-stag inut matching singl-ndd (d) MGM011 (c) Fig.1-17 Bonding arrangmnt of (a) a BLV861 intndd for us in ush-ull configuration (), and (c) onding arrangmnt of a BLV2045 intndd for singl-ndd configuration (d) Mar 23 13