C0 UNT 微波光电 TEL:0898 FIN+ VIF +IFOUT+ 8 FIN VIF +IFOUT IET VUP TCKT OCOUT OC OC 8 V V 9 V V 0 0 EN F 9 T CP 8 CLK CPU EFIN FU EFO

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1 UNT 微波光电 TEL:0898 FETUE Integrated ownconverter Integrated ual ynthesizer QM Compatibility ingle + V Power upply Operation Low Noise Figure: 8 d High Conversion Gain: d Low istortion: dc ThreeWire Interface mall ize 0 C to +8 C C0 CTV/TV/Video ownconverter with ual ynthesizer PELIMINY T HEET ev.0 PPLICTION et Top oxes CTV Video Tuners igital TV Tuners CTV ata Tuners Cable Modems 8 Package 8 Pin OP POUCT ECIPTION The C0 uses both Gas and i technology to provide the downconverter and dual synthesizer functions in a double conversion tuner gain block, local oscillator, balanced mixer, IF mplifier, and dual synthesizer. The specifications meet the requirements of CTV/TV/Video and Cable Modem ata applications. The C0 is supplied in a 8 lead OP package and requires a single + V supply voltage. The IC is well suited for applications where small size, low cost, low auxiliary parts count, and nocompromise performance is important. It provides for cost reduction by lowering the component and packaged IC count and decreasing the amount of laborintensive production alignment steps, while significantly improving performance and reliability. F F: / Prescaler 8 it F N C ounter F Phase etector F Charge Pump CP F IN+ V IF+IF OUT it F C ounter F IN Low Noise VG Mixer V IF+IF OUT+ EF IN EF OU T Oscillato r it F C ounter Phase plitter F U F: / Prescaler 8 it F N C ounter F Phase etector F Charge Pump CP U T CKT OC OUT Clock ata Enabl e it ata egistar Figure : ownconverter lock iagram Figure : ual ynthesizer lock iagram UNT 射频通信 TEL:0890 0/00

2 C0 UNT 微波光电 TEL:0898 FIN+ VIF +IFOUT+ 8 FIN VIF +IFOUT IET VUP TCKT OCOUT OC OC 8 V V 9 V V 0 0 EN F 9 T CP 8 CLK CPU EFIN FU EFOUT VYN Figure : Pinout UNT 射频通信 TEL:0890 PELIMINY T HEET ev.0 0/00

3 C0 UNT 微波光电 TEL:0898 PIN NME FIN+ FIN IET TCKT OC OC 8 V 9 V 0 EN T CLK EFI ECIPTION ownconverter ifferential FInput ownconverter ifferential FInput ownconverter Ground (Must be connected) ownconverter Gilbert Cell Current ource esistor Oscillator Input Port (Tank circuit connection) Oscillator Tank Circuit Ground (Not to be connected to any other circuit ground) ame as Pin N PIN NME 8 VIF+ IFOUT+ VIF+ IFOUT VUP OC OUT ynthesizer (equired) ynthesizer (equired) Table : Pin escription Ground Ground V 0 V Wire Interface Enable 9 F Wire Interface ata 8 P C Wire Interface Clock P C U Crystal eference Input F U ECIPTION ifferential IF mplifier Output, Inductively coupled to +V ifferential IF mplifier Output, Inductively coupled to +V ownconverter Ground (Must be connected) ownconverter upply ( +V ) Oscillator Output (Connected to ynthesizer F Input) ownconverter Ground (Must be connected) ownconverter Ground (Must be connected) ynthesizer (equired) ynthesizer (equired) Ground Ground ynthesizer ownconverter FInput ynthesizer ownconverter Charge Pump Output ynthesizer Upconverter Charge Pump Output ynthesizer FInput Upconverter EF OUT Crystal Output eference VYN ynthesizer upply ( +V ) UNT 射频通信 TEL:0890 PELIMINY T HEET ev.0 0/00

4 C0 UNT 微波光电 TEL:0898 ELECTICL CHCTEITIC Table : bsolute Minimum and Maximum atings PMETE MIN MX UNIT upply Voltage (pins, & 8) (pin ) Voltage on pins 0 through, through 9 with V = 0 V VC 0. VYN + 0. VC Input Voltages (pins, & ) 0 VC Input Power (pins & ) (pin ) (pins, & 9) dm torage Temperature + 0 C oldering Temperature 0 C oldering Time ec Thermal Impedance, θjc 0 C/ W tresses in excess of the absolute ratings may cause permanent damage. Functional operation is not implied under these conditions. Exposure to absolute ratings for extended periods of time may adversely affect reliability. Table : Operating anges PMETE MIN TYP MX UNIT () ownconverter Frequencies F Input (F) IF Output (IF) Local Oscillator (LO) ynthesizer Frequencies Upconverter ynthesizer (FU) ownconverter ynthesizer (F) eference Oscillator (EFI N) Phase etector upply Voltage: V pins,,, 8) MHz MHz ( VC mbient Operating Temperature: T C The device may be operated safely over these conditions; however, parametric performance is guaranteed only over the conditions defined in the electrical specifications. Notes: () Mixer operation is possible beyond these frequencies with slightly reduced performance. UNT 射频通信 TEL:0890 PELIMINY T HEET ev.0 0/00

5 C0 UNT 微波光电 TEL:0898 Table : Electrical pecifications ownconverter ection (T = C, V = + VC, FIN = 08 MHz, IFOUT = MHz) PMETE MIN TYP MX UNIT PMETE ) C onversion Gain Prescalar Input ensitivity () Upconverter: FU ( pin ) ownconverter: F pin 9) () ( MIN TYP MX UNIT dm eference Oscillator ensitivity (pin ) 0. Vpp () C harge Pump Output Current INK OUCE ( 8.. d ( ) Noise Figure 8 0 d ( ), ( ), () C ross Modulation 9 dc Order Intermodulation istortion ( dc rd ), (), () ( IM) rd Tone Order Input Intercept Point ( ), ), () ( IIP) ( 0 dm ( ) L O Phase Noise (@ 0 KHz Offset) dc/hz ( ) L O Output Power (pin ) dm IF Output LO ignals and Harmonics eats Within Output Channel Other eats from to 00 MHz Other purious upply Current 0 m m COMMENT (over operating frequency) Power Consumption 0 mw Notes: () Measured at 0 khz comparison frequency. () Measured at. khz comparison frequency. () CPU and CP = Vcc/. UNT 射频通信 TEL:0890 PELIMINY T HEET ev.0 0/ dm dc dm dm ( ), () I F upply Current (pin & 8) 0 m Osc, Phase plitter and Mixer upply Current (pin ) 0 m Power Consumption 900 mw Notes: () s measured in NIGIC test fixture. () Two tones: 08 and 09 MHz, 0 dm each, 09 MHz tone Mmodulated 99% at khz. () Two tones: 08 and 09 MHz, 0 dm each. () = 0 Ohms Table : Electrical pecifications ynthesizer ection (T = + C, V = + VC)

6 C0 UNT 微波光电 TEL:0898 Table : igital Interface pecifications (T = C, V = + VC, ref. Figure ) PMETE MIN TYP MX UNIT Logic High Input: VH ( pins 0,, ). 0 V Logic Low Input: VL ( pins 0,, ) 0. 8 V Logic Input Current Consumption (pins 0,, ) 0.0 m ata ata Clock Clock Clock Load to Clock et Up Time: t to Clock Hold Time: t Pulse Width High: t Pulse Width Low: t C 0 CH 0 CWH 0 CWL 0 to Load Enable etup Time: t Enable Pulse Width: t E 0 EW 0 ns ns ns ns ns ns ise Time: t 0 ns Fall Time: tf 0 ns T N0: M N9 N0 N9 C C : L CLOCK (0: M) (9) 0 (9 ) (8) (C ) (C : L) tcwl LE te O tc tch tcwh LE tew Figure : erial ata Input Timing UNT 射频通信 TEL:0890 PELIMINY T HEET ev.0 0/00

7 C0 UNT 微波光电 TEL:0898 PEFOMNCE T.0 Figure : Typical Upconverter Prescalar ensitivity vs. upply Voltage (T = + C, flo = 00 MHz) Figure : Typical Upconverter Prescalar ensitivity vs. Local Oscillator Frequency (T = + C, V = + V) Prescalar ensitivity (dm) Prescalar ensitivity (dm) upply Voltage (V) Figure : Typical ownconverter Prescalar ensitivity vs. upply Voltage (T = + C, flo = 000 MHz) LO Frequency (MHz) Figure 8: Typical ownconverter Prescalar ensitivity vs. Local Oscillator Frequency (T = + C, V = + V) Prescalar ensitivity (dm)..0. Prescalar ensitivity (dm) upply Voltage (V) Figure 9: Typical Local Oscillator Output Power vs. upply Voltage (T = + C, flo = 0 MHz) LO Frequency (MHz)..0 Output Power (dm) upply Voltage (V) UNT 射频通信 TEL:0890 PELIMINY T HEET ev.0 0/00

8 C0 UNT 微波光电 TEL:0898 LOGIC POGMMING ynthesizer egister Programming The C0 includes two PLL synthesizers. Each synthesizer contains programmable eference and Main dividers, which allow a wide range of local oscillator frequencies. The bit registers that control the dividers are programmed via a shared threewire bus, consisting of ata, Clock and Enable lines. The data word for each register is entered serially in order with the most significant bit (M) first and the least significant bit (L) last. The rising edge of the Clock pulse shifts each data value into the register. The Enable line must be low for the duration of the data entry, then set high to latch the data into the register. (ee Figure.) ELECT IT Table : egister elect its ETINTION EGITE FO EIL T 0 0 eference ivider egister for PLL 0 Main ivider egister for PLL 0 eference ivider egister for PLL Main ivider egister for PLL egister elect its The two least significant bits of each register are register select bits that determine which register is programmed during a particular data entry cycle. Table indicates the register select bit settings used to program each of the available registers. eference ivider Programming The reference divider register for each synthesizer consists of fifteen divider bits, five program mode bits and the two register select bits, as shown in Table 8. The fifteen divider bits allow a divide ratio from to, inclusive, as shown in Table 9. M Table 8: eference ivider egisters L Program Mode eference ivider ivide atio, elect Table 9: eference ivider Counter its IVIE TIO Notes: ivide ratios less than are prohibited. UNT 射频通信 TEL: PELIMINY T HEET ev.0 0/00

9 C0 UNT 微波光电 TEL:0898 Main ivider Programming The main divider register for each synthesizer Table. Note that there are some limitations on consists of seven counter bits, eleven counter the ranges of the values for each counter. bits, two program mode bits and the two register select bits, as shown in Table 0. The main divider Pulse wallow Function divide ratio, N, is determined by the values in the The VCO output frequency for the local oscillator is and counters. The eleven Counter bits and computed using the following equation; the allowed values are shown in Table, and the seven variables are defined in Table : Counter bits and allowed values are shown in fvco = N x foc/, where N = [(P x ) + ] M Table 0: Main ivider egisters L Program Mode Counter Counter elect C C Table : Main ivider Counter its VLUE OF COUNTE Notes: >, ivide ratios less than are prohibited. Table : Main ivider Counter its VLUE OF COUNTE V f VCO Table : Variable efinitions EFINITION esired output frequency of external voltage controlled oscillator (VCO) Notes: >, < P f ivide ratio of counter ( to 0) ivide ratio of counter (0 < < P, < ) OC Frequency oscillator of external reference crystal or ivide ratio of counter ( to ) P Preset modulus of prescalar (P = ) UNT 射频通信 TEL:0890 PELIMINY T HEET ev.0 9 0/00

10 C0 UNT 微波光电 TEL:0898 Programmable Modes Each register contains bits set aside for programming current function. They can be set either high or low different modes of operation in the synthesizers. without affecting synthesizer performance. Currently, the only programmable mode is the polarity of the phase detector in each of the synthesizers. it etting Phase etector Polarity in each reference divider register controls this Table shows how bit of each reference divider feature. its through in the reference divider register controls the polarity of the phase detector registers and bits C and C in the main divider associated with each PLL. The correct setting is registers are reserved for future use, and have no determined by using Table and Figure 0. Table : Phase etector Polarity it Figure 0: VCO Characteristics 0 0 PLL Phase etector Polarity () 0 PLL Phase etector Polarity Table : Phase etector Polarity election PHE ETECTO POLITY VCO CHCTEITIC (EE FIGUE ) VCO OUTPUT FEQUENCY () 0 N egative curve () P ositive curve () VCO INPUT VOLTGE ynthesizer Programming Example The following example for programming the two synthesizers in the C0 details the calculations used to determine the required value of each bit in all four registers: equirements esired CTV input channel: HHH 99. MHz picture carrier (0 MHz digital channel center frequency) (econd) IF picture carrier output frequency:. MHz ( MHz digital channel center frequency) First IF frequency: 08. MHz Phase detector comparison frequency for down converter (also tuning increment):. KHz Phase detector comparison frequency for up converter: 0 KHz Crystal reference oscillator frequency: MHz Calculation of eference ivider Values The value for each reference divider is calculated by dividing the reference oscillator frequency by the desired phase detector comparison frequency: = foc / fp For the down converter, the MHz crystal oscillator frequency and the. KHz phase detector comparison frequency are used to yield PLL = MHz /. KHz =, and so the bit values for the down converter counter are PLL = UNT 射频通信 TEL: PELIMINY T HEET ev.0 0/00

11 C0 UNT 微波光电 TEL:0898 For the up converter, the MHz crystal oscillator frequency and the 0 KHz phase detector comparison frequency are used to yield PLL = MHz / 0 KHz =, and so the bit values for the up converter counter are PLL = Calculation of Main ivider Values The values for the and counters are determined by the desired VCO output frequency for the local oscillator and the phase detector comparison frequency: M N = f VCO / f P = trunc(n / P) = N ( x P) The down converter local oscillator frequency will be 08. MHz. MHz = 0 MHz in this example. The main divider ratio for the down converter, then, is NPLL = 0 MHz /. KHz =. ince P = in the C0, PLL = trunc( / ) = 0, and PLL = (0 x ) =. These results give bit values of PLL = and PLL = for the and counters. The up converter local oscillator frequency will be 99. MHz MHz = 8 MHz in this example. Therefore, NPLL = 8 MHz / 0 KHz = 8, PLL = trunc(8 / ) = 99, and PLL = 8 (99 x ) =. These results give bit values of PLL = and PLL = for the and counters. Phase etector Polarity ssuming the VCO for the up converter has a negative slope, the phase detector polarity for PLL should be negative, and PLL =. If the VCO for the down converter has a positive slope, the phase detector polarity for PLL should be positive, and PLL = 0. In summary, for this example, the four register programming words are shown in Tables and : Table : PLL and PLL eference ivider egister its for ynthesizer Programming Example L Program Mode Main ivider Counter Main ivider Counter elect C C M Table : PLL and PLL Main ivider egister its for ynthesizer Programming Example L Program Mode eference ivider Counter elect UNT 射频通信 TEL:0890 PELIMINY T HEET ev.0 0/00

12 C0 UNT 微波光电 TEL:0898 PPLICTION INFOMTION Figure : PC oard Layout Top View Figure : PC oard Layout Mid View F F alun IF FC Out MHz Xtal C 0 J LO In Figure : PC oard Layout ottom View Table 8: J Header Pinout Figure : Evaluation Fixture Table 9: Fixture Pinout PIN FUNCTION PIN FUNCTION Clock ata F F ownconverter F Input ownconverter F Input Ground I F IF Output (ingle Ended) Enable + VC +0 VC FC Out LO In To Oscillator Tuning Circuit ynthesizer FU Input UNT 射频通信 TEL:0890 PELIMINY T HEET ev.0 0/00

13 C0 UNT 微波光电 TEL:0898 J +0V +V C C C C F F L X C8 C C C C 8 FIN+ VIF +IFOUT+ FIN VIF +IFOUT IET VUP TCKT OC OUT 8 OC OC V V 9 0 V V 0 EN T CLK F CP CPU EFIN FU EFOUT VYN 9 8 C0 8 L +V C C C0 C9 L IF T C C C C C0 C 9 0 C C C Q +V FCOUT LOIN C8 C9 +0V Figure : Evaluation Fixture chematic UNT 射频通信 TEL:0890 PELIMINY T HEET ev.0 0/00

14 C0 UNT 微波光电 TEL:0898 Table 0: Evaluation Fixture Parts List ITEM # VLUE IZE ECIPTIO N PT # QTY VENO C, C, C0 C C, C8 00pF Chipcapacitor 9pF Chipcapacitor 0pF Chipcapacitor GM9COG0J0 V Murata GM9COG090C0 V Murata GM9COG00J0 V Murata C 0uF 0V V eries Capacitor PCE00CTN IGIKEY C9, C, C, C, C C0, C, C C8 C C. uf Chipcapacitor 000pF Chipcapacitor 00pF Chipcapacitor uf adiallead Chipcapacitor. 0uF Chipcapacitor GM9YV0Z V Murata GM9X0K0 V Murata GM9XK V Murata PEX0K00 Murata GM9X0K V Murata C9 0uF V TNT TE eries Cap. PC0CTN IGIKEY C C C, C C, pf Chipcapacitor 00pF Chipcapacitor pf Chipcapacitor GM9COG0J0 V Murata GM9XK0 V Murata GM9COG0J0 V Murata 8 Chip esistor EJGYJ0 Panasonic, 0, 0K Chip esistor EJGYJ0 Panasonic K Chip esistor EJGYJ0 Panasonic K Chip esistor EJGYJ0 Panasonic.K Chip esistor EJGYJ Panasonic K Chip esistor EJGYJ0 Panasonic K Chip esistor EJGYJ Panasonic 8.K Chip esistor EJGYJ8 Panasonic UNT 射频通信 TEL:0890 PELIMINY T HEET ev.0 0/00

15 C0 UNT 微波光电 TEL:0898 Table 0: Evaluation Fixture Parts List continued ITEM # VLUE IZE ECIPTIO N PT # QTY VENO,, 9 0 Chip esistor ZC C L L L.nH 080 Inductor 8nH 080 Inductor 0nH 080 Inductor 080C00XC Coilcraft 080C80XC Coilcraft 080CXC Coilcraft V Varactor diode V Toshiba T : Transformer ETC M/COM, Inc. North merica Q 0V M OT Transistor NPN arl. FMMTCTN IGIKEY X MHZ Crystal E8CTN IGIKEY UNT 射频通信 TEL:0890 PELIMINY T HEET ev.0 0/00

16 C0 UNT 微波光电 TEL:0898 PCKGE OUTLINE Figure : 8 Package Outline 8 Pin OP UNT 射频通信 TEL:0890 PELIMINY T HEET ev.0 0/00

17 C0 NOTE UNT 微波光电 TEL:0898 UNT 射频通信 TEL:0890 PELIMINY T HEET ev.0 0/00

18 C0 NOTE UNT 微波光电 TEL:0898 UNT 射频通信 TEL: PELIMINY T HEET ev.0 0/00

19 C0 NOTE UNT 微波光电 TEL:0898 UNT 射频通信 TEL:0890 PELIMINY T HEET ev.0 9 0/00

20 C0 UNT 微波光电 TEL:0898 OEING INFOMTION OE NUME TEMPETUE NGE PCKGE ECIPTION COMPONENT PCKGING C08P C08P0 0 C to +8 C 8 Pin OP Tape & eel, 00 pieces per reel 0 C to +8 C 8 Pin OP Tubes, 0 pieces per tube NIGIC, Inc. Mount ethel oad Warren, New Jersey 009, U.. Tel: + (908) 8000 Fax: + (908) 8 UL: Mktg@anadigics.com IMPOTNT NOTICE NIGIC, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice. The product specifications contained in dvanced Product Information sheets and Preliminary ata heets are subject to change prior to a product s formal introduction. Information in ata heets have been carefully checked and are assumed to be reliable; however, NIGIC assumes no responsibilities for inaccuracies. NIGIC strongly urges customers to verify that the information they are using is current before placing orders. WNING NIGIC products are not intended for use in life support appliances, devices, or systems. Use of an NIGIC product in any such application without written consent is prohibited. UNT 射频通信 TEL: PELIMINY T HEET ev.0 /00

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