New circuit configurations for designing digital phase shifters

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1 New circuit configurations for designing 0-80 digital phase shifters B.S. Yarman, BSc, PhD Indexing terms: Microwave circuits networks, Digital circuits, Circuit theory design Abstract: Four novel digital phase shifter configurations are presented. Operation of the new circuits is based upon the phase shifting properties of symmetrical low/high pass LC ladders. In the new designs, the use of ideal microwave switches, loaded lines, switched lines hybrids is not required. Therefore significant losses which are more apparent at high frequencies, are eliminated. Theoretical analysis indicates that new phase shifter configurations provide improved phase shifting performance over classical approaches. Examples are included to show the merits of the new designs. It is expected that the new phase shifters will find application in the EHF b. Introduction In large antenna array systems, there is an increasing dem to design low loss phase shifters especially at extra high frequencies (EHF). Circuit losses are due to switching elements as well as mismatch passive components. Switching losses are inevitable. Passive component losses may be reduced by choosing the monolithic approach, as it produces compact components. In some conventional phase shifters, use of microwave switches (e.g. SPST, SPDT), transmission lines, hybrids or couplers increases the overall insertion loss drastically beyond the A%b complicates the physical implementation of the circuit. Furthermore, in some conventional designs (e.g. loaded line phase shifters) mismatch losses are intrinsically built into the circuit as a result of the design concept. Our initial studies indicate that mismatch losses are as important as device losses [, 2]. Therefore, choice of circuit topology is vital for the realisation of low loss phase shifters. In an industrial environment research development work is focused on the technology developed to produce low loss switching devices. Certainly, there is a need to come up with new phase shifter circuit topologies which include no loss ideally are suitable for monolithic implementation at extra high frequencies. This paper represents four different new digital phase shifter configurations which are capable of providing large phase shifts (between 0 80 ). In the new designs, ideal microwave switches, transmission lines hybrids are not used. Thus, especially at EHF, losses due Paper 532OH (E2), received 24th June 986 The author was formerly with Anadolu University TUBITAK, Marmara Scientific Industrial Research Institute, PO Box 74, Gebze-Kocadi, Turkey. He is now with STFA-Savronik A, Tophaneliglu Cad. 9, Altunizade, Istanbul, Turkey to these elements are eliminated. Furthermore, the design concept of the new circuits is free of built-in mismatch loss. Therefore, it will be expected that new digital phase shifters provide improved phase shifting performance over the b of operation [0-2]. In the new designs, three pin diodes are used as switching elements. The diodes are either in back-to-back series configuration or in shunt position suitable for monolithic implementation. Based upon our device study, it is anticipated that the new circuit configurations presented in this paper will find application in the design of lowloss monolithic phase shifters with potential use in the millimetre-wave region. The operation of the new circuits is based on the phase shifting properties of the low/highpass 3-element symmetric LC ladder networks [3-5]. Therefore, in the following Section, LC ladders are studied as phase shifting units, then new phase shifters are introduced with explicit design equations. Examples are included to show the practical use of the new circuits. It is shown that new phase shifters yield an excellent phase tracking capability over 0% bwidth with low loss (ideally no loss) at the operating frequency. 2 Three-element symmetric LC ladders as phase shifters It is well known that a 3-element highpass or lowpass symmetric T or n LC ladder can be used as a phase shifting unit at a given operating frequency f 0 [3-5]. In Fig. la a symmetric highpass-t (HT) ladder is shown. Let S kl(ht) ; k, I =, 2 be the R o (R o = 50 Q is chosen in practical applications) normalised scattering parameters. Then, the transfer scattering parameter S 2(Hr) of the HT is given by where '2(HT) Z = sc Y = HT Z 2 Y + 2ZY + 2Z+ Y + 2 SL HT S = a +jco C HT L HT are the normalised capacitance inductance of the highpass T ladder. On the normalised frequency axis jco, S 2 i<hr) ma y be expressed in.polar form: With the frequency normalisation, the operating frequency / 0 of the phase shifter corresponds to the normalised angular frequency co 0 =. () IEE PROCEEDINGS, Vol. 34, Pt. H, No. 3, JUNE

2 Now let us calculate the element values of the HT to achieve the desired phase shift 4> s under perfect transmission or perfect match conditions at the operating frequency f 0. At a> 0 =, the perfect transmission condition requires that or (3a) (3b) the desired phase shift </> s will be the phase of S 2(ffr), i.e. (f>s = 0f/rt/w o ) = <t>hiii^) (4) Using eqn., p HT (f> HT are computed in terms of the Then, at co 0 =, a relationship between rj the elements of the HT is derived using eqns. 5b 7 2(L HT C HT + C HT ) Simultaneous solution of eqns. 6 8 yields the normalised element values of HT providing that the desired phase shift (j> s at/ 0 (or co 0 = ) with perfect transmission. C HT = ri + v + (9) L HT is calculated from eqn. 6. Then r\ is written in terms of the elements of the HT vis-a-vis eqn. 5b. It is noted that the phase (j) s should be chosen as a positive quantity in eqn. 9. As the highpass T section yields a positive phase shift between Simi- (8) Vout K 0 V G(> =T V out R 0 Fig. a Highpass- T b Highpass-Tt c Lowpass-T d Lowpass-7t ) f * Symmetric LC ladders elements of the HT. Choosing co 0 =, the following equation is obtained PHT = "HT [2C HT 2L HT C HT ]] C HT + C HT )] (5a) (2L HT C HT (5b) By invoking the perfect match condition of eqn. 3 on eqn. 5b, a relation between L HT is found. L HT + C2 HT 2C HT Let us introduce a phase shift dependent parameter r\ (6) larly, for a highpass n (HP) ladder (Fig. Ib), the element values are easily obtained to achieve the desired phase shift 0 S at an operating frequency f 0 by interchanging the inductance capacitance in eqns Thus, the normalised element values of HP are given as follows (Fig. Ib): inductance L H p = ri + Jri 2 + capacitance tup HP 2L HP (0a) (\0b) Element values of lowpass T or n ladders can easily be obtained using highpass to lowpass reciprocity. In this case, the normalised element values for lowpass T(LT) is given by (Fig. lc) L LT 'HT (Ha) = tan ( - - (7) C LT -HT (lib) 254 IEE PROCEEDINGS, Vol. 34, Pt. H, No. 3, JUNE 987

3 where L LT C LT are the inductance capacitance of (LT), respectively. Referring to Fig. \b the normalised capacitance C LP the normalised inductance L LP of the lowpass n LP network is given by LHP (2a) D 3 are assumed to have identical electrical performances. That is, they all have the same reverse forward resistances the same capacitance. Ideally, LJJ p -LP (26) At this point it is useful to remember that a symmetric lowpass T or n ladder yields a negative phase between 0-80 (lower half of the phase plane). But, in eqn. 7, the phase dependent parameter rj is calculated for a positive phase 4> s in the upper half of the phase plane novel digital phase shifters In this Section, four different novel digital phase shifter configurations are proposed. The new circuits employ three pin diodes, either in back to back series or in shunt configurations which are suitable for monolithic implementation (Fig. 2). The pin diodes are used as switching elements. It is presumed that when a diode is reverse biased, it exhibits a capacitance C D in series with a resistance R D. If it is forward biased, it acts as a pure resistance R F (Fig. 3). Ideally, reverse forward biased resistances R D R F are assumed to be zero which means that the diode is lossless. The operation of the new phase shifters is based upon the phase shifting properties of the highpass lowpass LC ladders described in Section 2. In Fig. 2a, a highpass based T section digital phase shifter configuration is introduced. The diodes D l5 D 2, Fig. 3 Simple pin diode model when D l9 D 2 D 3 are reverse biased, they act as pure capacitance C D. Let us refer this status of the diodes as state A or 'bit-in' state. In this status of the diodes, element values of the circuit can be arranged in such a way that at the operating frequency (a> 0 = ), desired phase shift (j> s is achieved with perfect transmission. In state A, the circuit acts as a highpass T section at f 0. On the other h, when all the diodes are forward biased, which we will refer to as state B or 'bit-out' state, the circuit behaves as an ideal parallel pair of wire yield with no phase shift at/ 0. In this case, D x D 2 are short circuited the shunt arm resonates at the operating frequency / 0 providing an open circuit impedance to the input RF signal. Thus, element values of the new configuration are calculated as follows. In state A, the normalised diode capacitance C D is given by C D = C HT (3a) D D 2 LLTT _LC Ln _LC Ln L XnC T L XnC T ' I ' state A (Di,D2.D3 on) Fig digital phase shifters state B (D,D 2,D3 on ) state B (D,D 2,D 3 off) IEE PROCEEDINGS, Vol. 34, Pt. H, No. 3, JUNE

4 the equivalent shunt inductance L HT is given at or, using eqn. 6, XHT c D L HT, CXHT CD "XHT 'XHT c D = -clt In state B, the shunt arm resonates at co o =, thus, is obtained in terms of C XHT. i<yht -XHT 'XHT L XHT (3c) Substituting eqn. 3c in eqn. 36 C XHT is calculated in terms of C LT C D. CXHT = l + AC LT C D -\ (3d) + Hence, explicit design equations are obtained from the given phase shift </> s. Actual element values are determined by denormalisation. Let us denote the actual elements by '*' on the normalised values; then the actual values are 2nf 0 R 0 ' 27tf 0 R 0 (36) (4) at the operating frequency. Thus, in state A, the RF signal is transmitted to the output without interruption. The normalised element values of the circuit which are shown in Fig. 2c are given as follows. In state A, l_/ ) '-LT J-IYTT J XLT 'LT where C XLT is given by (state B), QcLT = 'ivs'lt + \CLT + *CLTCDJ (6a) (66) = ^XHT (" C ) Finally, a lowpass based n section digital phase shifter is introduced in Fig. Id. The physical operation of this unit is similar to that of the low pass T section. That is, in state A where diodes are reverse biased, there is perfect transmission for the RF signal with no phase shift. In state B where diodes are forward biased, the operation of a lowpass n section is realised with the phase shift ( 0 S ) under perfect match in the input the output of the circuit. In this case, the element values are as follows: l ^LP JLyi -XLPP = chp = lu-'lp + + 'XLP -C LP (7a) ~C~D] = C XHP (76) In Fig. 26, a highpass based n section digital phase shifter configuration is suggested. Here, the operation of the circuit is similar to that of highpass based T section. In stage A (diodes are reverse biased), the circuit acts It should be emphasised that all the explicit equations used to design the high/lowpass based digital phase shifters presented in this Section, are derived for the ideal case as a highpass n with phase shift </> s under perfect transmission conditions. In state B (diodes are forward R R 0 Q). Unfortunately, this can not be the case for where the identical diodes have no loss parasitics (R F = biased), a perfect transmission media is obtained with no the actual realisations. In practice however, small-loss pin phase shift. diodes are available. In general, the forward reverse Under these circumstances, the explicit design equations are derived in a similar manner described for the The element values for the phase shifters can also be bias losses are different from each other (R F ^ R R ). highpass based T section. calculated including the diode reverse (R R ) forward In state A, (R F ) biase resistances. In this case, the losses can be balanced so as to be minimal in states A B the C D C HP (5a) desired phase shift is obtained. Inclusion of the diode losses requires the solution of simultaneous nonlinear equations for the computation of the element values. LP (56) With regard the solution, a numerical procedure is discussed In state B, in Reference 6. For small lossless diodes, however, explicit design equations may be used with final adjustments L-YHP on element values to balance the state losses. Each (5c) XHP digital phase shifter configuration discussed in this paper A lowpass based T section digital phase shifter configuration is proposed in Fig. 2c. In this Figure, when the identical diodes are forward biased (state B), the inductors L, which are specified by eqn. 0a, will be seen. In has a different element value distribution, even though they all yield the same phase shift (p s at the operating frequency f 0. Therefore, they may find proper application for designing phasors at various frequency bs. They the shunt branch, capacitance C XHP together with inductance L XHP act as an effective capacitor C LT which is the body of the phase shifters are constructed using are also suitable for monolithic implementations because given by eqn. 06. Thus, the operation of the lowpass T essentially all solid-state pin diodes. is realised at the operating frequency co 0 =. The series pin diodes may be implemented using the In this state, the desired phase shift </> s is achieved with planar technology, the shunt diodes can be manufactured perfect transmission. When the diodes are reverse biased as mesa pin diodes on silicon substrate as described in (state A), the diode capacitance C D resonates with L LT in References 7 8. The circuits can also be laid-out on a the series arm. In the shunt branch, L XLT resonates with GaAs substrate. In this regard the technology used in the effective capacitance with the effective capacitance Reference 9 may be useful. Based on our initial studies [], it is shown that the /" > new phase shifter circuits offer relatively better phase 'XLT c D shifting performance (lower loss improved phase 256 IEE PROCEEDINGS, Vol. 34, Pt. H, No. 3, JUNE 987 (7c)

5 tracking capability) over the conventional phase shifter circuits they are suitable for monolithic implementation especially at extra high frequencies. 4 Examples In this Section, examples are presented to show the application of the explicit formulas to design various phasors. In addition, for each phasor designed in this Section, loss variations phase characteristics for different diode reverse forward resistances are studied by means of computer analysis of the circuits. Throughout the examples, insertion loss (IL) = 0 log against frequency characteristics for phase shifting states (states A B) phase difference between the states ((j> A (f> B ) are depicted where <f> A <t> B designate the phase of the transfer scattering parameter of the phase shifter circuits under consideration. The design of 45 -bit phasors at 0 GHz are given as examples. However, the same computational approach can be extended to design analyse different phasors, just by plugging the different phase shifts <f> s in the explicit equations bit a high pass based T-section phasor Referring to Fig. 2a, the element values of a HT section digital phase shifter unit are calculated as follows: («) r\ = tan (90-45 ) = (*) C H T =»/ + V' / 2 + l = 2.44 = 2.44 (d) (e) \su ^ ^HT L, HT CXHT = 2.C LT + v^i T + 4C LT C D ] =.707 results were obtained: for R F = R R =Q: state A 0.27 < /L(dB) < 0.74 state B 0.52 < /L(dB) < 0.57 for R F = R R = 2 Cl: state A < /L(dB) < state B < /L(dB) < for R F = R R = 3 Q state A 0.88 < 7L(dB) < 0.86 state B.25 < /L(dB) <.39 In the above computer analysis, the design equations were not modified with the presence of the diode reverse forward resistances. Therefore, at the operating frequency f 0, losses in state A B are not equal. For example, when R F = R R 2 Q (actual) IL = 0.55 db in state A IL = 0.85 db in state B. Even though there is CD O inser tion loss.6 - U' if) ^XHT yj.doj (g) actual element values at 0 GHz are obtained by denormalisation: Choosing R o = 50 fl normalised frequency,u C D = T-^r- = pf Info #o Similarly, CXHT = pf R o = nh 2nf 0 Insertion loss variation phase variation of this circuit are shown in Fig. 4, for the case where R F = R R = 0 Q. In Fig. 4, it can be seen that over 0% bwidth, the phase shift (<f> A (f> B ) varies from 47 down to 43 (A(/> = 4>A - <t>b = ). Over 5% bwidth, the phase variation is less than. At a> 0 = l(/ 0 = 0 GHz), the insertion loss is forced to be zero at both state A B. Over 0% bwidth JL(dB) is less than 0.5 db. With the inclusion of diode losses, computer analysis of phase shifting performance was carried out, the following Fig. 4 Performance of the highpass based T-section digital phase shifter O phase against <w # state A state B not much difference between the losses, they can be balanced with small adjustments on the element values. The phase characteristic does not make a significant change to the diode losses over 0% bwidth. Using the same diode losses, elements of different loaded line circuit configurations were calculated computer performance analysis were carried out. It was found that loaded design are more sensitive to diode losses that over 0% bwidth, the phase shift varies between [, 2]. This example shows that highpass based T section digital phase shifters yield a very good phase shifting performance over 0% bwidth with realisable element values at 0 GHz. IEE PROCEEDINGS, Vol. 34, Pt. H, No. 3, JUNE

6 4.2. High pass based n-section digital phase shifter as 45 -bit phasor Here, again choosing f 0 = 0 GHz, R o = 50 ft, a 45 -bit phasor is designed using the highpass based n section (Fig. 2b). Following the design equations given by eqn. 6, the calculation steps are (a) rj = tan (90-45 ) = (b) L HP = -^- = 2 (c) C HP = = 0.44 (d) C HP = C D = C HP (AC (/) L m = 2L HP XHP =.44 = (g) finally, the actual element values are C D = 0.45 pf, C XHP = 0.3 pf L XHP = nh In Fig. 5, the phase shift performance of the circuit is shown for the case where the diodes are lossless. Here, it Fig. 5 shifter» R r = R f = 0 n - -#- - R r = R f = m -.90 Performance of the highpass based n-section digital phase is interesting to observe that the phase difference between the states makes a sudden jump (co = 0.95 co =.05). The net phase shift at co 0 = is 45, as it is forced. It may seem that this configuration is not suitable for a 45 phasor unit because of the jumps. However, a small diode loss (e.g. 0. ft) associated with the switching diodes smoothes the phase curve around 45. In Fig. 5, the phase variation of the circuit is also depicted for the case R F = R R = ft (or R r = R f = 0.02 normalised). In 258 this case over 0% of the bwidth the phase variation is about +0.5 around 45. In practice, small diode losses are inevitable. Therefore, in the actual implementation, the highpass based n section yields an excellent phase tracking capability over 0% bwidth. Insertion loss variation for different diode losses are summarised as follows: for R F = R R = 0Q state A 0.02 < /L(dB) < 0.06 state B 0.03 < /L(dB) < 0.4 for R F = R R = Q state A 0.34 < /L(dB) < 0.36 state B 0.57 < /L(dB) < 0.52 for R F = R R = 3Q state A 0.86 < /L(dB) < 0.93 state B.36 < /L(dB) <.4 As was the case for the highpass T section, further increments in the diode losses do not effect the phase variation over 0% bwidth phaser design with lowpass based Tsection digital phase shifter Referring to Fig. 2c, element values of the lowpass T section phase shifter can be computed following the design equations (eqns. 6). In this case, the element values are C D = C HT = 2.44 (see Section 4.) = 7^ = 0.44, = HT C X LT = l i-dyj T XL*T L, = i =.706 the actual element values are computed at 0 GHz. C D = pf, C XHT = pf, L LT = 0.33 nh L XLT = nh. The' ideal phase shifting performance of the design is shown in Fig. 6. Within 0% bwidth, the lowpass T section has an excellent phase tracking capability ( ). In the same bwidth this phasor presents less than 0. db insertion loss. Small diode losses do not noticeably effect the phase curve. However, the insertion loss increases with the diode losses. A computer analysis of the insertion loss variation for different diode resistances is summarised as follows: for R F = R R =Q state A 0.76 < 7L(dB) < 0.95 state B 0.4 < 7L(dB) < 0.44 for R F = A R = 3 ft state A 0.33 < 7L(dB) < 0.36 state B < 7L(dB) < EE PROCEEDINGS, Vol. 34, Pt. H, No. 3, JUNE 987

7 In practical applications, lowpass based T section digital phase shifter configuration may be preferable over the other phase shifter circuits presented here because the ~O 0 O o ~ Here, as expected, a smaller diode capacitance is required than that of the 45 bit (there, C D was pf). A general rule may be stated: the larger the phase shift is the smaller the diode capacitance will be. CO o in in 0.8 o Fig. 6 shifter normalised frequency, See Fig. 4 for key Performance of the lowpass based T-section digital phase parasitic inductances of the diodes can be embedded in the inductance L LT of the series arms. This fact also simplifies the monolithic implementation of the circuit Design of a lowpass based n-section digital phase shifter as a 45 bit phasor at 0 GHz Referring to Fig. Id, element values of the lowpass based rc-section can be calculated using eqns. 7. In this case, the normalised element values are C D =.44, L LP = 0.707, C XLP = L XLP =.707 actual element values are C D = 0.45 pf, L LP = nh C XLP = 0.38 pf, L XHP = 0.23 nh In Fig. 7, the ideal phase shifting performance of the circuit is plotted. It can be seen that the lowpass based n section digital phase shifter has excellent phase tracking over 0% of the bwidth (45 flat over 0.8 to.2 normalised frequencies). Diode losses do not effect the phase curve. However, the insertion loss increases with diode losses. Insertion loss variations are similar to those of given in Sections Larger phase shifts up to 80 can be achieved using the new configurations presented in this paper, whereas the conventional intrinsically mismatched loaded lines are not able to provide such phase shifts. Let us now investigate how the element values vary as the phase shifts are enlarged. For example, the element values of the highpass T section for a 90 phase shift at 0 GHz are D = 0.38 pf, = 0.49nH normalised frequency,!*) Fig. 7 Performance of the lowpass based n-section digital phase shifter See Fig. 4 for key In the limit, a 80 bit phasor requires zero diode capacitance. Therefore, it is not physically realisable with these phase shifter configurations. However, phase shifter circuits are presented in Reference 6 using similar design concepts. 5 Conclusion In this paper, four different novel digital phase shifter configurations each having the ability of phase shifting between 0 80 are presented. The new circuits include three switching pin diodes, are compact so are suitable for monolithic implementation. The new circuits have an excellent phase tracking capability over 0% bwidth. Parasitics of the switching diodes especially can be embedded in lowpass based T or n digital phase shifters. Depending on the operating frequency, large phase JLJli i r r i C XHT = 0.55 pf (see eqns. 0) Fig. 8 Possible wideb digital phase shifter configurations IEE PROCEEDINGS, Vol. 34, Pt. H, No. 3, JUNE

8 shifts are easily achieved with the new phase shifter circuits. But a 80 phase unit is not possible to realise with the design equations given in this paper. However, the design of digital phase shifters is covered in Reference 6. The use of ideal microwave switches, loaded lines or hybrids are not required in the new phase shifter configuration. Therefore, at EHF significant losses due to these elements are eliminated. Hence, it is anticipated that the new phase shifters are suitable for use at millimetre wave frequencies where the circuit losses are highly critical. For larger bwidths (more than 0%), the design concepts developed in this work can easily be extended to construct phase shifters employing more sections as shown in Fig References YARMAN, B.S., ROSEN, A., STABILE, P.J.: 'Low loss EHF digital phase shifters suitable for monolithic implementation'. IEEE International Symposium on Circuits Systems, Montreal, Canada, 984, pp YARMAN, B.S.: 'Design of digital phase shifters suitable for monolithic implementation'. Technical report, MAE, TUBITAK, Gebze, Kocaeli, Turkey, Jan. 984; also in Bull. Tech. Univ. Istanbul, 983, 38, pp WHITE, J.F.: 'Microwave semiconductor engineering' (Van Nostr Reinhold Company, NY 982) 4 GARVER, R.V.: 'Microwave diode control devices' (Artech Inc., Dedham, MA, 976) 5 WATSON, H.A.: 'Microwave semiconductor devices their circuit applications' (McGraw-Hill, 976) 6 YARMAN, B.S., KULA, M.: '0-360 digital phase shifters suitable for monolithic design'. National Engineering Conference of Turkey Digest, Adana, Turkey, 985, pp ROSEN, A., CAULTON, M., STABILE, P.J., GOMBAR, A.M.: 'Silicon as a millimeter wave monolithically integrated substrate. A new look', RCA Rev., 98, 42, p ROSEN, A., CAULTON, M., STABILE, P.J., GOMBAR, A.M., JANTON, W.M., WU, C.P., CORBOY, J.F., MAGEE, C.W.: 'Millimeter wave device technology', IEEE Trans., 982, MTT-30, (), pp AYASLI, Y., PLATZKER, A., VORHAUS, J., REYNOLDS, L.: 'A monolithic single chip X-b four-bit phase shifter', ibid., 982, 30, (2), pp YARMAN, B.S.: 're-section digital phase shifter apparatus'. US Patent , 5th August 986 YARMAN, B.S.: T-section digital phase shifter apparatus'. US Patent , 29th July YARMAN, B.S. 'Lowpass re-section digital phase shifter apparatus'. US Patent 46492, 30th September IEE PROCEEDINGS, Vol. 34, Pt. H, No. 3, JUNE 987

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