off off time of the switch within each switching cycle (s) v cm v cs

Transcription

1 A SNGE-STAGE, SNGE-PHASE, A-D BUK-BOOST ONERTER FOR OW-OTAGE APPATONS. Abdelalam 1,2, G.P. Adam 1, D. Holliday 1 and B.W. William 1 Electronic and Electrical Engineering Department, Univerity of Strathclyde, Glagow, UK 1 Electrical Power Department, Arab Academy for Science and Technology and Maritime Tranport, airo, Egypt 2 brahim.abdallah@trath.ac.u; grain.adam@trath.ac.u; derric.holliday@trath.ac.u and barry.william@trath.ac.u Abtract The uitability of a ingle-tage ac- buc-boot converter for low-voltage application i invetigated. ndepth dicuion and analyi of the converter operating principle, baic relationhip that govern converter teadytate operation, and detail of the neceary control tructure needed to comply with the grid code are provided. The validity of the propoed ytem i confirmed uing PSAD/EMTD imulation, and i ubtantiated experimentally. The buc-boot converter under invetigation ha good dynamic performance in both buc and boot mode, and enure near unity input power factor over the full operating range, whilt having fewer device and paive element than other publihed verion of the buc-boot converter. ndex Term ac- converter, unity power factor, buc-boot converter. it of Symbol δ duty cycle ide inductance (H) upply angular frequency (rad/) ac ide inductance (H) ide capacitance (F) R load reitance (Ω) ac ide capacitance (F) R ac ide reitance (Ω) D 1 - D 4 bridge rectifier diode S power electronic witch D bd blocing diode t on dwell time of the witch within each witching cycle () average capacitor current (A) t c off off time of the witch within each witching cycle () average load current (A) T witching period () i average current entering the lin node: equal to the intantaneou inductor current during Mode 2 and 4 only (A) v cm v c pea ac ource capacitor voltage () ac ource capacitor voltage () intantaneou ide inductor current (A) intantaneou output voltage () average inductor current (A) average output voltage () i m pea fundamental upply current (A) average inductor voltage () i input upply current (A) m pea upply phae voltage () i input current control reference (A) v upply voltage (). NTRODUTON A-D converter are widely ued in power upplie for microelectronic ytem, uninterruptible power upplie (UPS), battery charger, wind energy converion ytem, houehold-electric appliance, motor drive, and high-voltage and flexible ac tranmiion ytem [1-4]. Many ingle-phae ac- converter with power factor correction (PF) have been tudied. The topologie can be divided into two categorie: ingle-tage and two-tage converter. Mot ingle-tage ac- converter with PF employ an H-bridge rectifier followed by a boot converter. The output voltage i therefore greater than or equal to the pea of the ac upply voltage [5-13]. Power factor correction i achieved by regulating the inductor current of the boot 1 Thi paper i a potprint of a paper ubmitted to and accepted for publication in ET Power Electronic and i ubject to ntitution of Engineering and Technology opyright.

2 tage. Several ingle-phae ingle-tage ac- buc converter have been propoed for electrical vehicle battery charging [5, 14, 15]. Several ingle-tage buc ac- converter with PF have been propoed [16-19]. A twotage ac- buc-boot converter ha been propoed [20-23] that offer input PF capability. Thi buc-boot converter require independent control of the buc and boot tage, and uffer from control difficultie during tranition between buc and boot mode. Additionally, it require a large number of emiconductor device and paive element [24]. A ingle tage buc-boot converter that operate baed on the zero current reonance principle, and which ha a relatively low number of witche, ha been propoed [25]. t main limitation i that the ue of reonance can mae it implementation expenive ince it utilie tuned inductor that need to be retuned frequently a the other paive element age and their characteritic change. Another ingle-tage buc-boot converter [26-28] ue a ingle elf-commutated witch, with a large number of diode and paive element. Fig. 1(a) how a ingle-tage ac- buc boot converter whoe performance when operated with dicontinuou ide inductor current ha been invetigated [29]. Only the buc operating capability of thi converter i therefore exploited, and power factor correction i performed, but no information about the hape of the input current waveform i given. Nonlinear control ha been ued to regulate output voltage and provide power factor correction [30]. Although the circuit i imple, the propoed controller require five feedbac ignal, thereby increaing the overall complexity, and potentially the cot, of the implementation. Performance of thi complex ytem i demontrated in buc mode only, uing imulation and without experimental ubtantiation. Another nonlinear control tudy [31] on a buc-boot converter [29] propoe two control method. The firt control method regulate inductor current intead of output voltage and require an additional tage to adjut the output voltage. The econd control method regulate output voltage directly uing a ingle tage. However, both control method ue extremely high witching frequency of 100Hz, with upply current total harmonic ditortion exceeding the level pecified in many grid code and tandard (THD of 7.47% and 19.81% for the firt and econd control method repectively). No experimental reult are preented, and the imulation reult are for the buc operating mode only. Thi paper decribe the operating principle of the buc-boot converter in Fig. 1, and highlight it ditinct attractive feature uch a buc-boot capability in a ingle tage with a ingle witch, reduced power circuit and 2 Thi paper i a potprint of a paper ubmitted to and accepted for publication in ET Power Electronic and i ubject to ntitution of Engineering and Technology opyright.

3 control ytem complexity ince no iolated gate drive are needed, table voltage output in both buc and boot mode, inuoidal input current with unity power factor, uitability for grid interfacing of mall-cale renewable ac ource, and the lac of requirement for a pre-charging circuit for the ide capacitor. A imple linear controller i ued that require only two control loop. The outer control loop regulate converter output voltage and etimate the pea fundamental current i m required to maintain the lin voltage at any deired level, and then ynchronie to the grid voltage to provide the reference current i to the inner current control loop. The inner control loop enure inuoidal input current at any power factor (in thi tudy power factor i et to 1). The inner control loop etimate the ac ide capacitor voltage v c required to force input current i to follow it control reference i and enure the correct power balance between ac and ide uing P control. Additionally, in grid application the inner control loop provide converter over-current protection during extreme tranient condition in the ide.. PROPOSED BUK-BOOST ONTROED BRDGE The baic converter topology i hown in Fig. 1(a) and include three main part: an filter, a diode rectifier and a buc-boot chopper. Note that the diode rectifier bridge i revered o that the buc-boot converter give poitive output voltage. Operating Mode 1, where witch S i turned on during the poitive half-cycle of the upply v, i hown in Fig. 1(b). n thi mode, upply v energie inductor through witch S and diode D 1 and D 2, while capacitor act a an energy tan upplying the load. Operating Mode 2, hown in Fig. 1(c), i the free-wheeling period when witch S i turned off during the poitive half-cycle of the upply v. Here, the energy tored in inductor during Mode 1 i ued to upply the load and to recharge capacitor. For correct converter operation, therefore, capacitance and inductance mut be ized to prevent dicontinuity in the load and inductor current. Operating Mode 3, hown in Fig. 1(d), i where witch S i turned on during the negative half-cycle of the upply v. nductor i re-energied through witch S and diode D 3 and D 4, whilt the energy tored in capacitor upplie the load. Mode 1 and 3 ue the ame witching device to modulate the ac ource, and have the ame effect on the tate of charge of the ide element and. Operating Mode 4, where witch S i turned off (and it erie diode i revere biaed) during the negative half-cycle of the upply v follow. Operating Mode 2 and 4 are identical. 3 Thi paper i a potprint of a paper ubmitted to and accepted for publication in ET Power Electronic and i ubject to ntitution of Engineering and Technology opyright.

4 (a) Single-phae ac- boot converter (b) Operating Mode 1 - conducting (c) Operating Mode 2 (4) - freewheeling (d) Operating Mode 3 - conducting Fig. 1: Schematic of the propoed ingle-phae ac- buc-boot converter and it operating mode. Differential equation (1) and (2) decribe circuit operation during Mode 1 and 3, whilt equation (3) and (4) decribe circuit operation during Mode 2 and 4. d d t v c (1) d d t d c d c (2) d d t (3) d d t d c d c (4) The negative ign in equation (1) and (2) appear becaue the bridge rectifier i revered. Neglecting the reitive voltage drop, the voltage acro ac ource capacitor i given by (5). di (5) c v v dt 4 Thi paper i a potprint of a paper ubmitted to and accepted for publication in ET Power Electronic and i ubject to ntitution of Engineering and Technology opyright.

5 (a) oltage acro ide inductor (b) ide inductor current and ide capacitor voltage Fig. 2: Waveform for the propoed ingle-phae ac- buc-boot converter. [Note that m i the pea value of upply voltage v ] The mathematical relationhip decribing teady-tate operation are obtained uing inductor zero average voltecond and capacitor voltage balance principle [32]. The voltage acro inductor i illutrated in Fig. 2(a) where, for implicity, i it initially aumed that ac ource tray inductance i ufficiently mall o that v c can be conidered equal to v, hown in Fig. 1(a), without ignificant lo of accuracy. Following on from Fig. 2(b), which how inductor current and capacitor voltage, it can be hown that the voltage acro the inductor within each witching period T during operating mode 1 and 2 can be expreed by v =-δv c and v =(1-δ) repectively, where δ=t on /T and t on i the dwell time of the witch within each witching cycle. Baed on the inductor zero average volt-econd principle [32], the average voltage acro i calculated and et to zero a in (6) 1 [ v (1 ) ] d t (6) 0 0 where δ i the duty cycle of witch S. Auming a inuoidal ource voltage defined by v = m inωt, where m i the pea phae voltage, i the upply angular frequency, and t i time, and that the average output voltage i defined by 1 0 d t, then equation (6) reduce to 2 1 m (7) Since capacitor voltage balance [32] neceitate the average capacitor current c over one or a number of conecutive witching cycle to be zero, the relationhip between the average inductor current load current i and the average 1 c [ (1 )( )] d t (8) Thi paper i a potprint of a paper ubmitted to and accepted for publication in ET Power Electronic and i ubject to ntitution of Engineering and Technology opyright.

6 n (8), the capacitor current in operating Mode 1 and 3, and in Mode 2 and 4 i expreed a c and c ( 1 )( ) repectively. Equation (8) can be reduced to 1 0 (1 ) d t 0 d t (9) Equation (9) implie ( 1 ) (10) Since, in practice, the average inductor current i maintained virtually contant, the output or load current remain contant and proportional to the inductor average current, a illutrated by (10). Thi feature can be exploited to reduce the voltage tree on the witching device of current ource inverter and maintain a contant average input current when the propoed buc-boot converter i ued a an active front end. For a reitive load the output voltage can be expreed in term of the average inductor current, a hown in (11). (1 ) R d c (11) The converter paive element and are elected baed on the maximum permiible inductor current ripple and output voltage ripple, Δ and Δ repectively. Therefore, from (1) to (4) and Fig. 2(b), (12) and (13) are obtained. d c ( 1 ) T (12) (13) T R. ONTRO STAGE The purpoe of the controller i to force the ac line current to be inuoidal and in phae with the input ource voltage, and to control the average output voltage in both buc and boot operating mode. a. urrent ontrol n order to obtain inuoidal input current at any power factor, the required control ytem tructure i derived accounting for the ac fundamental frequency and ide dynamic. Since the output voltage i dependent 6 Thi paper i a potprint of a paper ubmitted to and accepted for publication in ET Power Electronic and i ubject to ntitution of Engineering and Technology opyright.

7 upon the magnitude of the voltage v c acro the input filter capacitor, differential equation (14) can be ued a the bai for current controller deign. di R ( v v ) dt c i (14) The voltage v c required to force input current i to follow it control reference i i unnown, but it can be obtained uing a P controller by etting w v v ( i i ) ( i i dt (15) ) c p i ( i i dt (16) ) i The current controller tranfer function i obtained by ubtituting (16) into (15), and then ubtituting the reult for v -v c into (14). di dt ( R ) i p p i (17) After aplace manipulation of (17) and (16) the tranfer function i defined a ( ) ( ) 2 R p p i i (18) From (15), v c can be obtained a v v w c (19) Note that w repreent the output of the P controller that regulate converter input current, and that v i the upply voltage that i incorporated a feed-forward control to improve dynamic repone and for controlled tart-up. The bloc diagram of the propoed control tructure hown in Fig. 3(a) i derived baed on equation (15) and (19). The upply current can be controlled to be inuoidal and to achieve any power factor φ, where 2, provided the controller (18) ha ufficient bandwidth o a not to introduce ditortion in the normalized verion of the fundamental voltage component paed a a reference to the converter modulator. The frequency repone of current controller (18), with gain p =120 and i =2000 elected to enable reproduction of any deired reference without magnitude attenuation or the introduction of phae hift, a hown in Fig. 3(b), highlight that the controller bandwidth i ufficient. 7 Thi paper i a potprint of a paper ubmitted to and accepted for publication in ET Power Electronic and i ubject to ntitution of Engineering and Technology opyright.

8 (a) Propoed control tructure howing two control loop (b) ontroller Bode plot, with p=120 and i=2000 Fig. 3: Propoed controller and it frequency repone. b. oltage ontrol Equation (4), which decribe the converter ide dynamic, provide the bai for the voltage controller. Auming a reitive load and ubtituting for reult in (20) d dt (20) R where i the average lin voltage, and i the average current entering the lin node and i equal to i the intantaneou inductor current during Mode 2 and 4 only. Auming lole converion, power balance dictate that P ac =P. Therefore 1 v i co i cm m (21) 2 where v cm i the pea voltage acro the ac ide input capacitor, and i m i the pea fundamental current. Uing (7), thi can be rewritten a (22) from which i can be obtained. i 1 v 2 cm co i m (1 ) co i 4 m (22) 8 Thi paper i a potprint of a paper ubmitted to and accepted for publication in ET Power Electronic and i ubject to ntitution of Engineering and Technology opyright.

9 Equation (22) highlight that the relationhip between pea fundamental current i m and depend upon i quantitie, uch a duty cycle, which may vary according to operating condition. Subtituting (22) into (20) give (23) d dt m A (23) R i where (1 ) A co. 4 The pea fundamental current i m required to maintain the lin voltage at any deired level can be etimated uing P control. Auming that the controller gain term alo perform the neceary caling for A in (23), i m i expreed a i m ( ) ( ) dt (24) p i ( ) dt (25) i The voltage controller tranfer function i obtained by ubtituting (24) into (23), and reult in (26), whilt the derivative of λ i expreed in (27). d dt R 1 p p (26) d id c d c id c d c (27) dt Taing aplace tranform of (26) and (27), and following manipulation, reult in (28). p (28) ( ) ( ) 2 1 R i p i Since the change in the lin voltage i much lower than that of the fundamental current due to limitation impoed by the magnitude of the energy torage device ( lin capacitor), the outer control loop gain are elected uch that the cloed-loop pole or eigenvalue are located at =-37 and = The gain correponding to thee pole are p =0.1A/ and i =1A Thi paper i a potprint of a paper ubmitted to and accepted for publication in ET Power Electronic and i ubject to ntitution of Engineering and Technology opyright.

10 . SMUATON STUDY PSAD/EMTD imulation oftware wa ued to model the buc-boot converter of Fig. 1(a), complete with the current and voltage controller defined in (15) and (24) repectively, to demontrate the cloed-loop performance of a 320W ytem. The parameter ued in the imulation are defined in Table 1. nitially, the converter load i purely reitive, coniting of two erie-connected reitance of 128Ω and 44Ω. The load i increaed by hort circuiting the 44Ω reitance uing hunt emiconductor witch S h. Table 1: Sytem Parameter Parameter alue upply voltage 50 upply frequency 50 Hz ac ide inductance 2.22mH ac ide capacitance 1µF ide inductance 0.5mH ide capacitance 2200µF witching frequency 10Hz Fig. 4(a) how the imulation reult for the cloed-loop controlled converter, where the lin voltage i gradually increaed from zero to 200, and reduced to zero again at t=4.5. At t=1.505, correponding to the poitive pea of the upply voltage, the load reitance i decreaed by turning on hunt witch S h for 1.5, thereby mimicing a tep increae in output power from 230W to 312W. Output power i then decreaed to 230W by turning off the hunt witch S h. Fig. 4(a) how the output voltage ha minimum latency and over/underhoot during the load change. Simulation reult in Fig. 4(b) how that, during the tep power change, upply voltage and current remain inuoidal with unity power factor (i.e. upply current and voltage are in phae), and that the tranition in upply current i both rapid and mooth. Thi i achieved with a witching frequency of 10Hz, mall ac ide filter paive element and ide inductance, and a izable ide capacitor ued a an energy reervoir to prevent dicontinuou load current. The oft tart-up and hutdown feature demontrated in Fig. 4(a) mae thi converter attractive a a front end for many grid-connected voltage and current ource inverter ince no capacitor pre-charging i required, a i the cae with other converter topologie. Thu, becaue of the buc-boot functionality, the inruh current during tart-up can be expected to be minimal. 10 Thi paper i a potprint of a paper ubmitted to and accepted for publication in ET Power Electronic and i ubject to ntitution of Engineering and Technology opyright.

11 Output oltage () Supply oltage () S h=off S h=on S h=off i v Supply urrent (A) Time () Time () (a) output voltage (b) Supply voltage and current during tep increae in output power Fig. 4: Simulation reult for propoed ingle-phae ac- buc-boot converter, with P rated=320w.. ONERTER SAABTY To how the potential for application of the propoed buc-boot converter at higher power rating, a 3.8W verion i invetigated. Simulation parameter are the ame a in Table 1, except the input upply voltage v i increaed to 220 RMS and the ac ide filter inductance i reduced to 1mH. To tet the converter ability to provide table output under different operating condition, three different cae are invetigated: ae 1 Soft tart, to prevent high charging current in the input and output capacitor. ae 2 Dynamic repone to a tep increae in load from 1.58W to 3.66W. ae 3 Dynamic repone to a tep decreae in load from 3.66W to 1.58W. Fig. 5 how the imulated repone of the propoed converter under all three operating cae. Fig. 5(a) how that the converter output voltage cloely follow it 400 reference, with minimum latency and over/underhoot, a the load change. Fig. 5(b) how the input current during the tranition from ae 1 to ae 2, and demontrate that it remain inuoidal with near unity power factor. Fig. 5(c) how the output power repone a the load varie during tranition between the three operating cae, and demontrate that the control action i effective. 11 Thi paper i a potprint of a paper ubmitted to and accepted for publication in ET Power Electronic and i ubject to ntitution of Engineering and Technology opyright.

12 oltage (), urrent (A) Output Power (W) Output oltage () ae 1 ae 2 ae Time () (a) Required output voltage and converter output voltage v ae 1 ae 2 i Time () (b) Supply voltage and current during change from ae 1 to ae ae 1 ae 2 ae Time () (c) Output power Fig. 5: Waveform illutrating poible calability of the propoed buc-boot converter.. EXPERMENTA RESUTS Open- and cloed-loop performance of the buc-boot converter of Fig. 1(a) i demontrated experimentally. The reult from the open-loop tet are ued to validate the mathematical relationhip preented in Section, without any interference from the control ytem. The cloed-loop tet are ued to illutrate converter performance when operated in grid mode, where it mut comply with trict grid code requirement. a. Open-oop Performance The parameter ued in the experimental validation are pecified in Table 1. The open-loop operating cenario conit of five different tage to demontrate converter operation in both buc and boot mode. n Stage 1, the duty cycle δ i ramped from 0 to 0.25 and then maintained contant for n Stage 2, δ i ramped from 0.25 to 0.5 and maintained contant for n Stage 3, δ i ramped to from 0.5 to 0.7 and maintained contant for 1. n tage 4 and 5, δ i decreaed at rate reflecting thoe in tage 2 and 1 repectively. Fig. 6(a) how converter output voltage during all five tage, which include both buc and boot operation. Fig. 6(b) how the current in the ide inductor,, the load,, the blocing diode, Dbd, and the witch, S, when δ=0.7. t can be een that i equal to S during the on period of witch S, and equal to Dbd during the 12 Thi paper i a potprint of a paper ubmitted to and accepted for publication in ET Power Electronic and i ubject to ntitution of Engineering and Technology opyright.

13 off period of witch S. Fig. 6(c) how the voltage tree on the witch, S, on the ide inductor,, and on the blocing diode, Dbd, when δ=0.7. t can be een from Fig. 6(c) that the average ide inductor voltage equal zero over one witching (or fundamental) period. Alo, witch voltage S i zero during the on period, and i equal to the um of the ide inductor voltage and the upply voltage v during the off period. Finally, the blocing diode voltage tre Dbd i equal to the um of the ide inductor voltage and the output voltage during the on period, whilt it i zero during the off period. Thee reult how that the voltage rating of witch S and blocing diode D bd mut be ufficient to withtand voltage tree related to the um of the ac ource and the output. n thi experiment, blocing diode D bd i rated at 600 and 40A, whilt witch S i rated at 1200 and 40A. (a) output voltage (c) Detailed view of witch, inductor and blocing diode voltage (b) inductor, output, witch and blocing diode current Fig. 6: Experimental waveform howing open-loop performance of propoed buc-boot converter, with R =172Ω. b. loed-oop Performance A ingle-phae buc-boot converter, a hown in Fig. 1(a), i operated under cloed-loop control to ubtantiate the imulation reult preented in Section. The ytem parameter and operating condition are the ame a for the imulation. The reult in Fig. 7 are obtained when the reference voltage i changed from 0 to Thi paper i a potprint of a paper ubmitted to and accepted for publication in ET Power Electronic and i ubject to ntitution of Engineering and Technology opyright.

14 and reduced to zero after 14 (thi i to demontrate converter operation in boot and buc mode). Fig. 7(a) how that output voltage cloely follow it defined reference (a firt-order low-pa filter i ued to lightly reduce the rate of rie of the reference voltage a a reult of the tep function). Oberve that the voltage i maintained nearly contant a load varie. Fig. 7(b) how a detailed view of the voltage acro the load, and upply current and voltage during the teady tate. t can be een that the converter operate at unity power factor, with 4.47% THD. Fig. 7(c) how upply current i and voltage v, and voltage during tartup. Oberve that the input upply current i inuoidal and remain in phae with the upply voltage a the lin voltage increae. From Fig. 7(d) it can be oberved that the output voltage experience a mall decreae during the load change, while the ac ide waveform remain inuoidal, with unity power factor. To demontrate the power quality profile of the input current during buc and boot mode, Fig. 8 preent upply current and voltage, and output voltage during different lin reference voltage. Fig. 8(a) to (d) how that the propoed buc boot converter i able to provide a high-quality inuoidal upply current, with near unity power factor over a wide operating range. To highlight the ignificance of the propoed buc-boot converter, a general comparion with imilar converter topologie from the open literature [25, 26] i preented in Table 2. Table 2: omparion of Propoed Buc-Boot onverter with thoe in [25, 26] Feature Propoed onverter onverter [25] onverter [26] Number of Semiconductor Switche Number of Paive Element low moderately high high low medium high A Filter Requirement - filter - filter not required Output oltage ontrol Region Soft Start-Up and Shutdown apability Power Factor orrection full range including buc and boot mode demontrated in Fig.4(a), Fig.5(a), Fig.6(a) and Fig.7(a) near unity over the full operating range full range claimed but only boot operation i demontrated not mentioned near unity at high load and <0.9 at low load (Fig. 9) full range claimed but only buc operation i demontrated not mentioned near unity at rated load Switching Frequency 5Hz-10Hz 40Hz 100Hz Application low power calable to medium power application low power low power 14 Thi paper i a potprint of a paper ubmitted to and accepted for publication in ET Power Electronic and i ubject to ntitution of Engineering and Technology opyright.

15 oltage (40/div) urrent (2A/div) oltage (40/div) urrent (5A/div) oltage urrent (250mA/div) oltage (40/div) urrent (1A/div) oltage (40/div) ;current(10a/div) oltage (40/div) ;current(10a/div) oltage (40/div) oltage (40/div) ;current(10a/div) Time (2.5/div) (a) output voltage Time (10m/div) (b) Steady-tate upply current and voltage, v =200 and R =172Ω Time (25m/div) Time (25m/div) (c) Supply current and voltage, and output voltage (d) Supply current and voltage and output voltage during tart-up during tep increae in output voltage Fig 7: Experimental waveform howing cloed-loop performance of propoed buc-boot converter, with P=320W. Time (10m/div) (a) Steady-tate upply current and voltage THD=2.88% at =20 Time (10m/div) (b) Steady-tate upply current and voltage THD=2.08% at =50 Time (10m/div) (c) Steady-tate upply current and voltage THD=3.6% at =100 Time (10m/div) (d) Steady-tate upply current and voltage THD=4.09% at =150 Fig 8: Experimental waveform howing cloed-loop performance of propoed buc-boot converter at different voltage output reference with R =172Ω. 15 Thi paper i a potprint of a paper ubmitted to and accepted for publication in ET Power Electronic and i ubject to ntitution of Engineering and Technology opyright.

16 . ONUSON The technical viability of a ingle-tage, ingle-phae, buc-boot converter operated a a PWM rectifier for a low-voltage general ditribution ytem i invetigated. t operating principle i dicued in detail, and mathematical relationhip decribing it teady-tate operation are preented. The control tructure required to enure inuoidal input current and unity input power factor are dicued. Reult obtained from PSAD/EMTD imulation and experimentation how that the propoed buc-boot converter i viable a a PWM rectifier, and a a front end for grid-connected current and voltage ource converter. REFERENES [1] U. Kamnarn and. hunag, "Analyi and Deign of a Modular Three-Phae A-to-D onverter Uing UK Rectifier Module With Nearly Unity Power Factor and Fat Dynamic Repone," Power Electronic, EEE Tranaction on, vol. 24, pp , [2] A. A. Badin and. Barbi, "Unity Power Factor olated Three-Phae Rectifier With Two Single-Phae Buc Rectifier Baed on the Scott Tranformer," Power Electronic, EEE Tranaction on, vol. 26, pp , [3] W. hien-ming,. hang-hua, and Y. Teng-hieh, "High-Power-Factor Soft-Switched D Power Supply Sytem," Power Electronic, EEE Tranaction on, vol. 26, pp , [4] B. Singh, B. N. Singh, A. handra, K. Al-Haddad, A. Pandey, and D. P. Kothari, "A review of inglephae improved power quality A-D converter," ndutrial Electronic, EEE Tranaction on, vol. 50, pp , [5] M. Pahlevaninezhad, P. Da, J. Drobni, P. K. Jain, and A. Bahhai, "A New ontrol Approach Baed on the Differential Flatne Theory for an A/D onverter Ued in Electric ehicle," Power Electronic, EEE Tranaction on, vol. 27, pp , [6] A. El Aroudi and M. Orabi, "Stabilizing Technique for A-D Boot PF onverter Baed on Time Delay Feedbac," ircuit and Sytem : Expre Brief, EEE Tranaction on, vol. 57, pp , [7] J. Yungtae and M. M. Jovanovic, "A Bridgele PF Boot Rectifier With Optimized Magnetic Utilization," Power Electronic, EEE Tranaction on, vol. 24, pp , [8] J. Y. hai and. M. iaw, "Reduction of peed ripple and vibration for witched reluctance motor drive via intelligent current profiling," Electric Power Application, ET, vol. 4, pp , [9] Yuequan Hu, azlo Huber, and M. M. Jovanovi ć, "Single-Stage, Univeral-nput A/D ED Driver With urrent-ontrolled ariable PF Boot nductor," Power Electronic, EEE Tranaction on, vol. 27, pp , [10] Sungwoo Moon, uca orradini, and D. Maimović, "Autotuning of Digitally ontrolled Boot Power Factor orrection Rectifier," Power Electronic, EEE Tranaction on, vol. 26, pp , [11]. Xudan, X. Dehong, H. hangheng, Y. Heng,. Yahun,. Ping, and P. Hangwen, "A High- Efficiency Single-Phae A/D onverter With Enabling Window ontrol and Active nput Bridge," Power Electronic, EEE Tranaction on, vol. 27, pp , [12] Barry A. Mather and D. Maimovi ć, "A Simple Digital Power-Factor orrection Rectifier ontroller," Power Electronic, EEE Tranaction on, vol. 26, pp. 9-19, [13]. Hung-hi,. hih-hieh, and. Jhen-Yu, "Modified Single-oop urrent Senorle ontrol for Single-Phae Boot-Type SMR With Ditorted nput oltage," Power Electronic, EEE Tranaction on, vol. 26, pp , [14] M. Pahlevaninezhad, P. Da, J. Drobni, P. K. Jain, and A. Bahhai, "A ZS nterleaved Boot A/D onverter Ued in Plug-in Electric ehicle," Power Electronic, EEE Tranaction on, vol. 27, pp , [15] M. Yilmaz and P. Krein, "Review of Battery harger Topologie, harging Power evel and nfratructure for Plug-in Electric and Hybrid ehicle," Power Electronic, EEE Tranaction on, vol. PP, pp. 1-1, Thi paper i a potprint of a paper ubmitted to and accepted for publication in ET Power Electronic and i ubject to ntitution of Engineering and Technology opyright.

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