2 kw fully digital AC-DC power supply (D-SMPS) evaluation board. Description
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1 STEVAL-ISAV kw fully digital AC-DC power supply (D-SMPS) evaluation board Data brief Full set of input and output protections PFC control & DC-DC control managed by STMFC PFC power stage based on MDmesh M power MOSFETs and SiC diodes DC-DC power stage based on MDmesh DM power MOSFETs Synchronous rectification based on STripFET power MOSFETs EMC filter for noise reduction RoHS compliant Features Input AC voltage: V to V Output voltage: V or V, max output current: A Input AC frequency: Hz to Hz Nominal output power: kw Interleaved PFC stage PFC switching frequency: khz PFC average current mode control Cycle-by-cycle PFC current control Maximum power factor:. Mains under and overvoltage, under- and over-frequency protection DC-DC stage: full-bridge phase-shifted ZVS with synchronous rectification DC-DC switching frequency: khz HF transformer isolation voltage: kv Forced cooling with air flow speed modulation according to the output power Overtemperature protection Description The STEVAL-ISAV is a kw fully digital switch mode AC-DC converter consisting of two power sections: a two phase interleaved power factor corrector (PFC) and a DC-DC phaseshifted full-bridge converter, controlled by an STMF microcontroller for each section. The interleaved PFC comprises two boost converters operating out of phase, based on V MDmesh M power MOSFETs. The downstream section comprises a DC-DC phaseshifted full-bridge converter based on MDmesh DM power MOSFETs and performs voltage step-down using an HF transformer, with a primary-to-secondary ratio chosen to maintain a sufficiently high efficiency and regulation over the entire operating range. On the primary side, the transformer is supplied by the full-bridge converter and switching losses are reduced thanks to zero voltage switching (ZVS). On the secondary side, synchronous rectification (SR) is used to ensure low conduction losses. The output voltage waveform is rectified by STripFET power MOSFETs and then smoothed by the output filter. January DocID Rev / For further information contact your local STMicroelectronics sales office
2 Additional information STEVAL-ISAV The combination of the design choices results in boosted efficiency, in line with standard requirements in the power supply industry. The system is controlled by two STMF microcontrollers, one for each section. This microcontroller adds innovative features such as a high-resolution timer, which gives increased accuracy in terms of current regulation on the primary PFC and on the secondary DC-DC phase-shifted full-bridge side. The two microcontrollers exchange information about the status of the input and output power stage via bidirectional serial communication. Both the power stage and control stage are supplied by an off-line flyback circuit based on the VIPerH, which provides a suitable regulated voltage to the microcontrollers, as well as the gate driver ICs and the signal conditioning circuits. / DocID Rev
3 Vin_P Vin_N GND R k R k GND GND GND GND +. pri GND C nf VAC SENSE VCC pri Vin_P Vin_N D STPSL RELAY CONTROL CP CP CP GND Q STR CP VIN_PFC SHI Shield EMI Suppressor STEVAL-ISAV Figure : STEVAL-ISAV circuit schematic: input section and EMI filter R k J VIN R k R F A/V MOV k R k R k C N. A. U BARS R k L In+ In- R k C N.A. Out TP C pf TSVILT U C nf R K C uf C nf RL C nf C uf V TP R D A/V - + CP R CP CP CP CP C nf C nf A A Vcc+ Vcc- R k R k C nf VDC (Y) N.A. C N.A. C nf R k C nf C nf C nf L R R t C nf GSPGSG DocID Rev /
4 GATE Q VIN_PFC R L uh Remove Resistor in case of four lead Mosf et R GND J Power_Jump R Remove Resistor in case of four lead Mosf et +. pri PFC_Ipk_ R D D R GATE Q GATE Q GATE Q. N.A.. N.A. STPSL STPSL Q STWNM /STWNM- R R R k GND GND R D SPSH GND SOURCE Q GND R.K C pf R R PFC_I_AVG R PWM Q PWM Q D MMSZ R RemoveResistorin caseof fourlead Mosfet R ENABLEQ Q STWNM /STWNM- R ENABLEQ TS D R.K D SPSH R SOURCE Q R.K R RemoveResistorin caseof fourlead Mosfet R N.A. R k PFC_Ipk_ IC R R ENABLE_ PWM_ GND PWM_ PM GND ENABLE_ OUT_ VCC OUT_ SOURCE Q SOURCE Q GND_PFC R KW R KW C uf GATE Q GATE Q GND + C u GND VCCpri R K R K R GND VDC GND VBUS GND_PFC PFC_VBUS_SENSE TP R R Figure : STEVAL-ISAV circuit schematic: interleaved PFC STEVAL-ISAV + C + C R. N.A. R RSENSE mohm R L R K D uh STPSL D MMSZ R C pf T CURR_TRANS C p C p R.K R R K C pf U TSVILT C nf R k R R D MMSZ QA STWNM /STWNM- C p R K R J Power_Jump T CURR_TRANS R k D D R k STPSCD STPSCD R C p R. N.A. C p C pf D C p STPSL R K D MMSZ R C p R R QA STWNM /STWNM- R R u R KW R k + C u u R.K R K R Not Assembly C pf HT t Heatsink Out Vcc- Vcc+ In+ In- GSPGSG / DocID Rev
5 STEVAL-ISAV Figure : STEVAL-ISAV circuit schematic: phase shift DC-DC converter DocID Rev /
6 +. sec Ferrite Bead SR Vsense +. sec GND_SIGNAL_ +. sec L +. sec GND R +. sec DCDC_Vout DCDC_VDS_SR DCDC_VDS_SR +. sec +. sec R R R R R R DCDCTemperature VOUT sense +. sec +. sec C U DCDC_Iin R VBAT PC/TAMP/RTC PC PC PF/OSC-IN PF/OSC-OUT NRST VSSA VDDA PA-WKUP PA PA R +. sec DCDC_VDS_SR +. sec COMP_OUT DCDCPWM_LS DCDCPWM_HS DCDCPWM_Clamp DCDCPWM_Clamp DCDCPWM_SR DCDCPWM_SR DCDCPWM_LS DCDCPWM_HS TP TP D D BAT BAT BRIDGE CURRENT SENSE R DCDC_Vout DCDC_Iin SR Vsense PA PA +. sec +. sec ENABLE FAN ENABLE SR STMFCT (LQFP) +. sec ENABLE Clamp Enable_fullBridge +. sec PWM CLAMP PWM CLAMP +. sec +. sec DCDC_USART_RX DCDC_USART_TX DCDCPWM_HS DCDCPWM_LS DCDCPWM_HS DCDCPWM_LS DCDCPWM_SR DCDCPWM_SR VCC sec V DCDC_VDS_SR DCDCUSART_RX DCDCUSART_TX TP PWM Q PWM Q PWM Q PWM Q PWM Q/Q PWM Q/Q +. sec V_sec_Viper Figure : STEVAL-ISAV circuit schematic: secondary MCU STEVAL-ISAV PA VDD_ PA VSS_ PB PB PB PB PB PB PB PB DCDC_USART_TX PB PB DCDC_USART_RX BOOT PA PB PA COMP_INP R R PB PA R R DCDC_VDS_SR VSS_ PA R R DCDC_VDS_SR VDD_ PA R R V_sec_Viper ADC_IN R R VDD_ VSS_ PA PA PA PA PB PB PB PB TP C uf + C R nf C nf C pf pf C U LMCIZ +VS VO GND D Green LED X MHz HC/US C pf R TEST POINT C C nf nf TP U BARS R N.A. D BAT nf J PMBUS-IC C R.k R nf k R.k C nf R R R R C nf C pf R TP D Blue LED k U BARS J GND CON TP C nf J Ground R N.A. D BAT TP TP TP TP TP TP TP R k R k D BAT C nf TP GSPGSG / DocID Rev
7 +. pri +. pri GND_SIGNAL_ +. pri +. pri C + nf L C nf R U LMCIZ +VS VO GND C pf pf +. pri X MHz HC/US C R D Green LED R C nf BAT PFC_VBUS_SENSE C nf PFC_Current R-shunt PFC_Current CT PFC_VAC PFC Temperature D R R +. pri C nf TP +. pri PFC_Vbus +. pri TP TP C nf U +. pri VAC SENSE +. pri +. pri +. pri PFC_Current R-shunt R PFC_Current CT PFC_Ipk_ PFC_Ipk_ C pf J PMBUS-IC VBAT PC/TAMP/RTC PC PC PF/OSC-IN PF/OSC-OUT NRST VSSA VDDA PA-WKUP PA PA D BAT R.k TP R k TP TP D BAT R.k VDD_ VSS_ PA PA PA PA PA PA PB PB PB PB C nf TP TP R C nf COMP-Out R HRTIM_CHB R R HRTIM_CHA R R R +. pri C.nF PFC_Current CT V_pri_Viper STMFCT (LQFP) D BAT PFC_VAC +. pri R GND CON PFC_I_AVG +. pri PFC_USART_RX PFC_USART_TX D BAT PFC_Current CT TP J R C pf TP J Ground TP RELAY CONTROL TP TP TP TP R R D BAT +. pri C VCC pri ENABLE Q PWM Q ENABLE Q PWM Q PFC USART_RX PFC USART_TX D BAT PFC_Current R-shunt.nF N.A. V R k TP R k +. pri D BAT C nf V_pri_Viper TP STEVAL-ISAV Figure : STEVAL-ISAV circuit schematic: primary MCU D Blue LED PA PA PB PB PB PB PFC_USART_TX PB PFC_USART_RX BOOT PB PB VSS_ VDD_ VDD_ VSS_ PB PB PB PB PFC Temperature PB COMP-Out PA PFC_Current CT PA PFC_Current CT PA PFC_Vbus PA DAC_OUT PA DAC_OUT Ferrite Bead C µf GSPGSG DocID Rev /
8 U GND VOUT VIN LD GND GND R GND TP +. pri VCCpri VBUS GND TP GND GND GND GND C.nF GND L uh C GND GND V GND GND V GND VCCsec Figure : STEVAL-ISAV circuit schematic: auxiliary power supply +. sec STEVAL-ISAV GND VOUT VIN + C R. STPSA C uf V D D STPSA R N.A. R k D STPSA BR CONT VIPERHD PKC- D STPSA R.. R C uf V D VDD CONTROL FB U R DRAIN SOURCE.k T OPTO PC STPSLU D C R VR uf TS C nf R k R k uf V R K R.K R D DIODE Zener V W U LD TP TEST POINT R uf TP TEST POINT + C + C uf V uf V D DIODE Zener V W.uF C C.nF C nf D STTHA C uf GSPG SG / DocID Rev
9 +. pri GND_SIGNAL_ +. sec GND_SIGNAL_ +. pri +. sec R R R R R R U PS U PS SHIELD SHIELD +. sec R +. pri R R R C nf C nf C pf C pf STEVAL-ISAV Figure : STEVAL-ISAV circuit schematic: communications DC-DCUSART_RX PFC USART_RX PFC USART_TX DC-DCUSART_TX GSPGSG DocID Rev /
10 Revision history Revision history Table : Document revision history Date Version Changes -Jun- Initial release. -Jun- Updated: Features on the cover page. -Oct- -Jan- STEVAL-ISAV Updated: STEVAL-ISAV circuit schematic: secondary MCU and STEVAL-ISAV circuit schematic: primary MCU. Updated: Figure : "STEVAL-ISAV circuit schematic: phase shift DC-DC converter". / DocID Rev
11 STEVAL-ISAV IMPORTANT NOTICE PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. STMicroelectronics All rights reserved DocID Rev /
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