STEVAL-IFN003V1. DC PMSM FOC motor drive. Description. Features

Transcription

1 STEVAL-IFN00V DC PMSM FOC motor drive Data brief Features Input range: 8 V up to V (up to W) STMicroelectronic's ARM TM Cortex-M corebased STMF0CBT microcontroller DMOS fully integrated three-phase motor driver L0PD in PowerSO package Four-layer board Sensorless and hall sensors/encoder Current sensing mode: single-shunt resistor Compatible with new version of the STMF0CBT FOC firmware library: PMSM FOC SDK Debug connector USB interface for real-time data exchange RoHS compliant Description The STEVAL-IFN00V is an evaluation board based on STMicroelectronic's ARM TM Cortex-M core-based STMF0CBT microcontroller and the DMOS fully integrated three-phase motor driver L0PD implementing a field-oriented control of the PMSM motor. It is designed as an evaluation environment for motor control applications in the range of 8 V to V of DC bus voltage and up to W, exploiting the computational power of the STMF0CBT. This microcontroller features internal 0 kb SRAM and 8 kb Flash, SWD debugging. The L0PD DMOS driver features.8 A output peak current, non-dissipative overcurrent detection/protection, crossconduction protection, uncommitted comparator, thermal shutdown and undervoltage lockout. The STEVAL-IFN00V is provided with a USB interface specific to real-time data exchange. With dedicated hardware evaluation features, the STEVAL-IFN00V board is designed to help developers to evaluate the device and to develop their own applications. The STEVAL-IFN00V can be used together with the STMF0CBT PMSM FOC SDK and constitutes a complete motor control evaluation and development platform. December 0 DocID08 Rev /

2 Schematic diagram STEVAL-IFN00V Schematic diagram Figure : Schematic diagram / SE NSE SE NSE SE NSE OUT OUT OUT SENSE D 0 C N U C ON VBOOT V.. 00 nf/00 V C ++ C u/ V 00 nf 00 V C R 0. W C 0 nf V BAV 99 C 0 nf/00 V R 0. W R 0. W V C P NC #0 0 NC # NC # NC # NC # NC # D IAG /E N A B G N D G N D 8 G N D 9 G N D O U T 9 IN 0 E N IN E N O U T L0PD IN E N 9 O U T SE N SE SE N SE SE N SE C P + 8 C P - C PO U T 8 NC # NC # NC # NC # NC # NC # L0PD R 90 R.k U B R P IC -TS V9A ID -TS S O R k R.k R.k C 0 pf/ V J A+/H B+/H Z+/H STRIPP-M R N.M. R N. M R N. M R 0 K R. K En ca En cb R. K R En cz R8. K 0 K C 0 pf/ V C 0 pf/ V BUS_ FBK C 0 pf/ V VDAC_OUT VDAC_OUT C9 DIAG /EN 00 nf V C8. nf V R9 8. K USART_RX USART_TX IN EN En cb En ca IN EN SW O V C0 00 n F/ SW CLK U STMF0CBT IN EN PA PA 8 PB 9 PB 0 PB PB PB BOOT0 PB8 PB9 S 8 VDD VBA T V DD PC /TAMP/RTC S PA SW DIO CP+ PC PA PC PA PD0/OSC-IN IN PA 0 JP PD/OSC-OUT IN PA 9 0 JP 8 NRST IN PA 8 9 EN PB OPOUT 0 EN PA0-W KUP PB 8 JP SA R 9 JP VDDA K JP OPOUT EN PA PB JP OPOUT DIAG /EN PA PB X 8 MHz (with socket) C pf/v R ESE T R0 0 C C / V nf R 9 K R 9 K R 9 K VDD S PB PB0 PB 0 PB 9 PB0 8 PA PA PA PA PA pf/v BUS_ FBK C C 00 nf/ V DAC_OUT DAC_OUT R8/00 K C 00 nf V 00 nf/v C uf/v En cz SPEE D START R 90 R0. k C8 R9 UC. k OPOUT OPOUT OPOUT SENSE 0 SE NSE R 90 UA 00 nf/ V - - R 90 R IC -TS V9A ID -TS S O P P IC -TS V9A ID -TS S O k R. k R. k R 90 R0 k R9. k R8. k C0 0 pf/ V C9 0 pf/ V GIPG00LM / DocID08 Rev

3 STEVAL-IFN00V Figure : Schematic diagram / Schematic diagram J 8 R 0 k C SPEED 00 nf/ V J V V_USB C V 00nF/ USART_TX USART_RX V_USB R SWDIO SWCLK SWO 9 CP+ SPEED SWD CP+ R K R N. M. C 0R R9 U P U SB L C - K 00 K R STRIPP-M- R8 NM VDD NC# NC# 0 NC#0 NC# REGIN 00 nf/. V +C uf/. V DCD DSR CTS RI RXD 8 VBUS D- D+ TXD RTS DTR 8 SUSPEND SUSPEND# NC# 8 NC# 9 NC#8 0 NC#9 NC#0 NC# NC# 9 RST# GND PAD 9 U C P0-GM R B B START/STOP START X MM-PTH XMM-PTH C R C 00nF V 00 nf / k C8 00n/00V L00-8MLB Coilcraft 8.uH/0.A V L U IC-STS-HSOP8 TP 8 BOOT SW k 8.uH R8 R 0 VIN + C 0 uf/v PGOOD k R9 EN SVPM OSCON (SANYO) FB EN D G R EEN ESR = 0mohm GND C 80pF/.V R0 k D STPS00 Z TP G ND V C N TYCO -0 N IUSBB- MI V FB SH SH SH SH INDC-080 USB_SHIELD JJ DEBUG DAC_OUT DAC_OUT VDAC_OUT VDAC_OUT x S TRIP STRIPP-M J + - 8V - 8 V C N 0 R R 9 C V 00nF/00 C O N C 0uF/0V UMKBJ0MM-T Taiyo Yuden GIPG00LM DocID08 Rev /

4 Revision history Revision history Table : Document revision history Date Rev. Changes 0-Oct-0 Initial release -Jul-0 Changed the title. Updated Features and "Description". 0-Dec-0 Updated Features and "Description". STEVAL-IFN00V / DocID08 Rev

5 STEVAL-IFN00V IMPORTANT NOTICE PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 0 STMicroelectronics All rights reserved DocID08 Rev /