60 W, digital 3-LED channel evaluation board with STNRG388Acontrolled current regulation and dimming. Description

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1 STEVAL-ILL0V 0 W, digital -LED channel evaluation board with STNRGAcontrolled current regulation and dimming Data brief Features Based on the STNRGA digital controller Up to LED channels Maximum total output power: 0 W Maximum single LED channel output power: 0 W Adjustable LED channel current: 0-00 ma LED channel current setting resolution: ma Dimming mode programmable for every LED channel (analogue or digital) LED channel voltage range: - V LED channel voltage estimated without the need for measurement circuitry LED channel current regulation (as opposed to input power supply or LED channel voltage regulation) Real-time fault detection and protection (e.g., short or open circuit) Opto-isolated DALI interface Opto-isolated bridge USB to serial UART interface Single input power supply: V - V PCB board dimensions: mm x mm RoHS compliant Description The STEVAL-ILL0V evaluation board is a complete and configurable solution able to independently manage up to LED channels using the features of the STNRGA digital controller. The STNRGA is a part of the STMicroelectronics STLUX product family and embeds advanced peripherals tailored to generate high resolution PWM signals (SMED). Every LED channel current is adjusted with a reverse buck converter that, via appropriate SMED peripheral configuration, can implement fixed off time and frequency fold back control techniques, for analogue (0-00 ma current range) and digital (0-00 ma current range) dimming modes, respectively. Current dimming can be managed via USB, using a PC GUI to send serial commands to the board, or via DALI interface to send protocol commands through the connected DALI master. Every LED channel can be configured through the same GUI to set certain parameters like maximum LED channel voltage and current, and dimming mode. January 0 DocID0 Rev / For further information contact your local STMicroelectronics sales office

2 J R K R K D RUN R K R K TP TP TP R K D FAULT C0 00n F V C 0n F V C 0n F V C 0n F V J SWIM I/F CPM CPM0 CPM R 0R SWIM nrst PWM0 PWM PWM PWM PWM PWM C uf V CPM0 CPM 0 0 R 00 C uf V CPP FCPP R0 00 CPP FCPP R 00 VOUT SW IM NRST C 0nF V GPIO [0]/P W M[0] GPIO []/P W M[] GPIO []/P W M[] GPIO []/P W M[] GPIO []/P W M[] GPIO []/P W M[] GPIO0 [0]/UART_TX/CPM0 GPIO0 []/UART_RX/CPM GPIO0 []/I C_SDA/OSCOUT GPIO0 []/I C_SCL/OSCIN GPIO0 []/DALI_TX/UART_TX GPIO0 []/DALI_RX/UART_RX C 0p F V C 0p F V CPP0 FCPP0 C 0p F V is.v A C 0nF V Near the power pin A L WE-CBF DIGIN[0]/CCO_ CLK DIGIN[] DIGIN[] DIGIN[] DIGIN[]/I C_SDA DIGIN[]/I C_SCL CPM CPP[] CPP[] CPP[] CPP[0] ADCIN[] ADCIN[] ADCIN[] ADCIN[] ADCIN[] ADCIN[] ADCIN[] ADCIN[0] U STNRGA C 00n F V IC_SCLK IC_SDA SER_TX SER_RX DMG_CH DMG_CH DMG_CH CPM FCPP FCPP FCPP0 C 00n F V SEL_HW DEBUG NUM_LEDSTR SER_SEL NTC_ADC _ADC _ADC R 0K R K R 00R R 00R R 00R R 00R R 00R VPW_L ED_ADC R K BOARD_TYPE BOARD_TYPE IC_SDA IC_SCLK R0 0K PWM PWM PWM 0 J CON R 0R R 0R R 0R R 0R R 0R Led Chain PW M PW M PW M Led Chain Power Power L_CH0 L_CH L_CH L_CH0 L_CH L_CH CPP0 CPP CPP DMG_ CH DMG_ CH DMG_ CH VPW _LED_ADC _ADC _ADC SER_SEL NUM_LEDSTR DEBUG SEL_HW 0 J CON0 L_CH0 L_CH L_CH CPP0 CPP CPP DMG_CH DMG_CH DMG _CH VPW_L ED_ADC _ADC _ADC SER_SEL NUM_LEDSTR DEBUG SEL_HW Schematic diagram STEVAL-ILL0V Schematic diagram Figure : STEVAL-ILL0V Daughter board circuit schematic ( of ) SWIM I/F GNDIO VDDIO 0 GNDA VDDA RED FAULT Status GREEN RUN USB to UART TTL (,V) SER_TX SER_RX GSPG0 00SG / DocID0 Rev

3 STEVAL-ILL0V DMG_CH Figure : STEVAL-ILL0V Daughter board circuit schematic ( of ) R0 K C0 pf 00V D STPSH00A Schematic diagram PWM C uf V U PM GND IN D BZXCV SRC SNK IN_TH R 0R R 0R C 0pF V Q STLN0F L 0uH C,uF 00V D STPS00Z C uf 00V L_CH0 CPP R 0R TP C 0pF V R R % R R % DMG_CH PWM C uf V CPP D BZXCV C 0pF V R K C pf 00V D0 STPSH00A U Q PM STLN0F R 0R D SRC STPS00Z GND SNK IN IN_TH C0 uf R 0R 00V R 0R L 0uH C,uF 00V L_CH TP C 0pF V R R % R R % DMG_CH R K C pf 00V D STPSH00A C uf V D BZXCV C 0pF V L 0uH C,uF 00V L_CH PWM U PM SRC GND SNK IN IN_TH R 0R R 0R Q STLN0F D STPS00Z C uf 00V CPP0 R 0R TP C 0pF V R R % R0 R % GSPG0 SG DocID0 Rev /

4 Schematic diagram Figure : STEVAL-ILL0V Daughter board circuit schematic ( of ) STEVAL-ILL0V Selectionhardware: J NOTMOUNTED SEL SW J MOUNTED SEL HW R 0K R 0K R 0K J JUMPER C 0nF V C uf V C 00nF V VPW_LED_ADC R 0K U LKMTR RS--0 Debug: JNOTMOUNTED NORMALMODE JMOUNTED DEBUGMODE OUT SEL_HW DEBUG R 0K R 0K R 0K J JUMPER C 0nF V VIN SHDN BYPASS C 00nF V R K.V _ADC _ADC R 0K C 00nF V C 0nF V Serial selection: JNOTMOUNTED UART JMOUNTED DALI R0 0K J JUMPER SER_SEL Led stringnumberselection: J NOTMOUNTED STRING J MOUNTED STRING R 0K J JUMPER NUM_LEDSTR GSPG0 0SG GND / DocID0 Rev

5 STEVAL-ILL0V Figure : STEVAL-ILL0V Mother board circuit schematic ( of ) Schematic diagram VC C D RF RUN BOARD_T YPE NTC + SER_T X SER_R X PW R_D IS SER_T X SER_R X VD R L_CH 0 L_CH L_CH RST # BOO T UART_TX_R F UART_RX_R F GPIO0 GPIO RUN LINK PO W ER R K JMP JUMPER L_CH selection Interface selection UART/DALI TX Source selection RF/USB VC C DAL I_R X SER_R X DAL I_R X UART_R X UART_TX_US B UART_TX_US B UART_T X UART_TX_R F DAL I_T X SER_T X DAL I_T X UART_T X UART_RX_US B RX Source selection RF/USB UART_RX_US B UART_R X UART_RX_R F JMP UART RX sel RF/USB Connection USB to UART RF module JMP 0 UART_RX_US B UART_RX_R F JMP UART_TX_US B UART_TX_R F VC C VC C R 0 K R K L_CH GPIO0 GPIO C 0u F J CH JMP D RF LINK RF Modu le 0 R K J NTC + JMP JMP SER RX sel UART /DAL I JMP D RF PW R R 0 % R K JMP J CH0 JMP UART TX sel RF/USB R 0 K P JMP L_CH 0 R 0 % R 0 K % J CON 0 0 J CH JMP Sel JMP SER TX sel UART /DAL I RF UART RX boo t RF UART TX boo t R 0 K R 0 K JMP J CON 0 GSPG0 0SG DocID0 Rev /

6 Schematic diagram Figure : STEVAL-ILL0V Mother board circuit schematic ( of ) STEVAL-ILL0V / DocID0 Rev

7 J CGF0M J0 CGF0M selectio n JMP U JUMPER U L LM PGOOD SYNCH Vin D SMBJA PWR_DIS C u 00V + JMP C.uF 00V C.uF 00V C nf R K R K 0 VIN VIN EN SS FSW ILIM R 00K % VBIAS BOOT LX LX FB COMP C 00nF D STPSH00A R 00 C.nF R 0 % C 0uF R 0 R K NM R,K L 00u C0 00nF NM C 0u V + R K C 00nF D N R0 K Vout R K C 0u V + C 00nF STEVAL-ILL0V Figure : STEVAL-ILL0V Mother board circuit schematic ( of ) Schematic diagram GND EXPAD Adj GSPG0 00SG DocID0 Rev /

8 Revision history Revision history Table : Document revision history Date Version Changes -Jan-0 Initial release. STEVAL-ILL0V / DocID0 Rev

9 STEVAL-ILL0V IMPORTANT NOTICE PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 0 STMicroelectronics All rights reserved DocID0 Rev /

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