AN1642 Application note

Transcription

1 Application note VIPower: 5 V buck SMPS with VIPer12A-E Introduction This paper introduces the 5 V output nonisolated SMPS based on STMicroelectronics VIPer12A-E in buck configuration. The power supply is operated in the European voltage range i.e. 185 to 265 V ac. It can supply small loads, such as microcontrollers, motors, displays and peripherals in all industrial and home appliance applications. Table 1. Converter specifications Symbol Parameter Value V in(ac) Input voltage 185 V 265 V V out Output voltage 5 V ± 10% I out(min) Min output current 10 ma I out(max) Max output current 200 ma Figure 1. Buck configuration with VIPer12A-E D4 R2 DZ1 C4 + C5 D3 R1 D1 L1 Vdd FB VIPer12A D S C3 L2 L3 VCC_CIRCLE Vac + C1 C2 D2 D5 C6 + C7 DZ2 R3 VCC_CIRCLE February 2008 Rev 2 1/13

2 Contents Contents 1 Device mode of operation Application description Experimental results EMI measurements Conclusion Revision history /13

3 List of figures List of figures Figure 1. Buck configuration with VIPer12A-E Figure 2. Prototype top view (not to scale) Figure 3. Bottom layer (not to scale) Figure 4. Component layout (not to scale) Figure 5. Bottom and component layout (not to scale) Figure 6. Line regulation Figure 7. Load regulation Figure 8. Efficiency vs. output power Figure 9. Typical waveforms at 220 V ac and open load Figure 10. Typical waveforms at 220 V ac and I OUT = 100 ma Figure 11. Typical waveforms at 220 V ac and I OUT = 200 ma Figure 12. Output voltage ripple at 265 V ac and I OUT = 200 ma Figure 13. Conducted emissions at full load with EN55014 limits: line emissions Figure 14. Conducted emissions at full load with EN55014 limits: neutral emissions /13

4 Device mode of operation 1 Device mode of operation The VIPer12A-E is a smart power with a current mode PWM controller, startup circuit and protections integrated on the same chip by VIPower M0 technology. The power stage consists of a vertical power MOSFET with 730 V breakdown voltage and 0.4 A peak drain current. The switching frequency is 60 khz, given by the integrated oscillator of the VIPer12A-E. The internal control circuit offers the following benefits: Large input voltage range on the V DD pin accommodates changes in supply voltage Automatic burst mode in low load condition Overload protection in hiccup mode The feedback pin FB is sensitive to current and controls the operation of the device. 4/13

5 Application description 2 Application description The application consists of a buck converter, with a single-wave input rectifier and an input CLC filter. Such a filter provides both DC voltage stabilization and EMI filtering. The main specifications of the considered converter are listed in Table 1. Since the output voltage is lower than V DD(off), using a standard configuration, the device would not have enough voltage and would work in startup mode, with no voltage regulation and high peak current. A patented approach is used to supply the power IC, as shown in Figure 1. The proposed circuit needs one more inductor compared to the standard buck topology to generate the supply voltage. It stores the required energy in an auxiliary capacitor through a low-voltage diode by means of a voltage divider. The capacitor C6 is charged during the turn-on time of the power switch through D5 and then is discharged during the turnoff time through D4 transferring energy to C5. D5 is a low voltage diode, i.e. 1N4148, and C6 is a low voltage capacitor whose value ranges from 10 nf to 1 µf. In particular, such a capacitor has to be calculated in order to store the charge required by the VIPer12A-E and to properly supply the device depending on the output inductors ratio L2/L3 and AC input voltage. Due to the ESR inductor, the voltage across C5 may depend on the output current too. The freewheeling diode, D2, and the de coupling diodes, D3 and D4, are high voltage ultrafast diodes. The inductors L2 and L3 are wound on the same ferrite core (radial type by TDK). In particular, L2=1.2 mh (N2=200 turns) and L3=85 mh (N3=15 turns). The output regulation is performed by means of a zener diode DZ1 connected between the output and FB pin. A small capacitor is connected to the FB pin in order to guarantee feedback stability. It is necessary to keep this capacitor very close to the pin to avoid high frequency instability on the compensation loop. The zener diode DZ2 is connected across the output in order to clamp V OUT preventing overvoltage events, e.g. an open load condition. An optional bleeder resistor, R3, can be paralleled to the zener diode in order to improve the regulation with a slight impact on the efficiency. The converter schematic is shown in Figure 1. The bill of material of the proposed circuit is given in Table 2. In Figure 2, 3, 4, 5 the prototype view and the PCB layout are shown. The board size is 80x27 mm. Table 2. Bill of material Reference Value Description R1 10 Ω, 1/2 W Fuse resistor R2 1.2 kω, 1/4 W Resistor R3 (see Chapter 2) C1 2.2 µf, 400 V Electrolytic capacitor C2 100 nf, 400 V Polyester capacitor C3 22 nf, 25 V Ceramic capacitor C4, C6 100 nf, 63 V Ceramic capacitor C5 1 µf, 25 V Electrolytic capacitor C7 100 µf, 25 V Electrolytic capacitor D1 1 A, 1000 V Diode 1N4007 D2, D3, D4 1 A, 600 V Diode STTH106 (ultrafast) D5 100 ma, 70 V Diode 1N4148 5/13

6 Application description Table 2. Bill of material (continued) Reference Value Description DZ1 4.7 V Zener diode DZ2 5.6 V Zener diode L1 1 mh Axial inductor L2 1.2 mh (see Chapter 2) L3 85 µh (see Chapter 2) IC1 STMicroelectronics VIPer12ADIP-E Figure 2. Prototype top view (not to scale) Figure 3. Bottom layer (not to scale) Figure 4. Component layout (not to scale) Figure 5. Bottom and component layout (not to scale) 6/13

7 Experimental results 3 Experimental results In this section the characterization of the circuit is introduced. The power supply has been tested in several load conditions and in the whole range of the input voltage, i.e. from 185 V ac to 265 V ac. The experimental results are listed in Table 3. Line and load regulation results are shown in Figure 6 and 7 respectively, while the efficiency is shown in Figure 8. Table 3. Circuit characterization Vin[V] Vout[V] Iout[mA] Iin[mA] Pin[W] Pout[W] η[%] V ac V ac V ac Figure 6. Line regulation Open load V OUT (V) I OUT =100mA 4.75 I OUT =200mA V INac (V) 7/13

8 Experimental results Figure 7. Load regulation V OUT (V) V INac =220V V INac =185V V INac =265V I OUT (ma) Figure 8. Efficiency vs. output power h (%) V INac =185V V INac =220V V INac =265V P OUT (W) In Figure 9, 10 and 11 typical waveforms at nominal input voltage and in several load conditions are shown. Figure 12 shows the output ripple at 265 V ac and full load. 8/13

9 Experimental results Figure 9. Typical waveforms at 220 V ac and open load VDD Ch1 freq 9.84kHz 4) VS VOUT Ch2 max 158mA Ch3 mean 5.55V 3) IS Ch4 mean 14.00V 1,2) Ch1 100V Ch2 100mA Ch3 2.00V Ch4 5.00V M 20.0 µs Figure 10. Typical waveforms at 220 V ac and I OUT = 100 ma VDD 3,4) VOUT IS Ch1 freq 59.48kHz Ch2 max 262mA Ch3 mean 4.81V Ch4 mean 17.41V 1,2) VS Ch1 100V Ch2 100mA Ch3 2.00V Ch4 5.00V M 20.0 µs 9/13

10 Experimental results Figure 11. Typical waveforms at 220 V ac and I OUT = 200 ma VDD 3,4) VOUT IS Ch1 freq 58.85kHz Ch2 max 370mA Ch3 mean 4.68V Ch4 mean 16.96V 1,2) VS Ch1 100V Ch2 100mA Ch3 2.00V Ch4 5.00V M 20.0 µs Figure 12. Output voltage ripple at 265 V ac and I OUT = 200 ma Ch1 pk-pk 190mV Ch1 mean 4.77V 1) Ch1 500mV M 50.0 µs 10/13

11 EMI measurements 4 EMI measurements Conducted EMI measurements have been performed according to the EN55014 Class B standard in the frequency range MHz using a 50 W LISN and a spectrum analyzer with peak detector acquisition. Figure 13 and 14 show line and neutral emissions at nominal input voltage and full load. Figure 13. Conducted emissions at full load with EN55014 limits: line emissions REF 75.0 dbmv Quasi-Peak Average START 150kHz STOP 30.00MHz Figure 14. Conducted emissions at full load with EN55014 limits: neutral emissions REF 75.0 dbmv Quasi-Peak Average START 150kHz STOP 30.00MHz 11/13

12 Conclusion 5 Conclusion A very low-cost power supply based on STMicroelectronics VIPer12A-E has been proposed for 5 V nonisolated output. A lab prototype has been developed and fully characterized in order to check all the given specifications for the considered application. The converter shows good overall performances in terms of size and cost, confirming the suitability of VIPer12A-E to industrial and home appliance applications. 6 Revision history Table 4. Document revision history Date Revision Changes 04-May Initial release 27-Feb Document reformatted no content change VIPer12A replaced by VIPer12A-E VIPer12ADIP replaced by VIPer12ADIP-E 12/13

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