STEVAL-ISA143V1. 12 V W resonant converter with synchronous rectification using the L6563H, L6699 and SRK2000. Features

Transcription

1 V - W resonant converter with synchronous rectification using the L66H, L6699 and SR Data brief Efficiency at nominal load: > 9% at VAC EMI: in accordance with EN Class-B Safety: in accordance with EN69 Dimensions: 6 x mm, maximum component height = 8 mm PCB: double-sided, µm, FR-, mixed PTH/SMT RoHS compliant Features Input mains range: 9-6 VAC, - 6 Hz Output voltage: V at. A continuous operation Mains harmonics: in accordance with EN6-- Class-D or JEITA-MITI Class-D No load consumption: <. W according to European CoC Tier for external power supplies Minimum four points average efficiency in active mode: > 89% according to European CoC Tier for external power supplies Minimum efficiency in active mode at % load of full rated output current: > 9% according to European CoC Tier for external power supplies Light load efficiency: complies with ErP Lot 6 Tier (> mw) May DocID6 Rev / For further information contact your local STMicroelectronics sales office.

2 Description Description The system evaluation board is made up of two stages: a front-end PFC using the L66H, an LLC resonant converter based on the L6699 and the SR, controlling the SR MOSFETs on the secondary side. The SR driver and the rectifier MOSFETs are mounted on a daughterboard. The L66H is a current mode PFC controller operating in transition mode and implements a high voltage startup source to power on the converter. The L6699 integrates all the functions necessary to properly control the resonant converter with a % fixed duty cycle and work with variable frequency. The output rectification is managed by the SR, an SR driver dedicated to LLC resonant topology. The PFC stage works as pre-regulator and powers the resonant stage with a constant voltage of V. The downstream converter operates only if the PFC is on and regulating. In this way, the resonant stage can be optimized for a narrow input voltage range. The L6699 s LINE pin (pin ) is dedicated to this function. It is used to prevent the resonant converter from working with too low an input voltage, which can cause incorrect capacitive mode operation. If the bulk voltage (PFC output) is below 8 V, the resonant startup is not allowed. The L6699 LINE pin internal comparator has a hysteresis allowing the turn-on and turn-off voltage to be independently set. The turn-off threshold is set to V, allowing the resonant stage to operate in case of mains sag and consequent PFC output dip. The transformer uses the integrated magnetic approach, incorporating resonant series inductance. Therefore, no external, additional coil is needed for the resonance. The transformer configuration chosen for the secondary winding is center tap. On the secondary side, the SR core function switches on each synchronous rectifier MOSFET whenever the corresponding transformer half-winding starts conducting (i.e. when the MOSFET body diode starts conducting) and then switches it off when the flowing current approaches zero. For this purpose, the IC is provided with two pins (DVS and DVS) sensing the MOSFETs drain voltage level. The SR automatically detects light load operation and enters Sleep mode, disabling MOSFET driving and decreasing its own consumption. This function allows greater power saving at light load compared to benchmark SR solutions. In order to decrease the output capacitor size, aluminum solid capacitors with very low ESR were favored over standard electrolytic ones. Therefore, high frequency output voltage ripple is limited and output LC filter is not required. This choice allows saving of output inductor power dissipation which can be significant in high output current applications such as this. / DocID6 Rev

3 Schematic diagram Schematic diagram Figure. circuit schematic C U S R R R S GND EN VCC 8 GD R DV S PGND 6 DV S GD Rev. V-.A R Q6 Q EVL SR-L- T R U S FH6A- R9 R C 8 NF C N R R 6 N.M.M.. J FA S TON F - RX R J P C nf R6 R CC66 uu F V C R 9 9 R69 D BZV-B R R D6 LL 8 C N-X R M 9-6V ac C uf-v R 6 C 68N C pf C N R D BZV-C R R C9 uf - V C R M R 9 R 8 D8 LL 8 Q STF8NMN R 6R R 8 R8 6R R9 C PF-6 V R R C.NF R9 R 8 R R R6 8 R k R R9 R R R R R D CC N N CC.M.. R R C NF C uf D BA S 6 C uf-6v C9 C uf-6v uf-6v C 8 N U TS MAI S T V_REF VCC 8 R CC- CC_OUT CC+ GND 6 R CV- CV_OUT R6 Meg Q S TLNLLF Q S TLNLLF D C R6 uf-6v R 6 R R R U6 Out Vcc GND Vp Vm T S C D9 LL 8 C9 uf-6v D N C R R6 R C N C8 N J FA S TON R 8 U S FH6A- R6 NTC R- S C N D L 9. 9 C D S TTHL6 D BA S 6 R6 R N.M.M.. R M D LL 8 C N C8 uf-v D LL 8 R M D LL 8 Q8 BC 8C R8 M R R D LL 8 R R R 6 C N R R HS HEAT- SIN C9 N U L6699D VBOOT 6 CSS HVG DELAY OUT CF NC RFMIN VCC S TBY J P X LVG 6 IS EN C6 uf-v C N LINE GND 8 DIS PFC- S TOP 9 D GBU 8J L 9. F FU S E TA J MD S,/ -, 8 ++ ~~ C C ~~ C N-X CC N-Y R R N - V R 6M8 R M6 R9 6 R9 6 CC99 N C uf-v U L66 H VCC 6 INV R 8 8 C 68N GD COMP GND MULT R ZCD CS C N RUN VFF R C6 N R PWM- S TOP 6 TBO NC PFC-O HV S 9 8 PWM-LATCH R R R C N CONNECTION MADE BY REWOR D CC C uf R 6 R R N C R6 Q R 6 M C NF R6 R 9 R M C uf C6 D6 R6 C6 N PF C R R 6 R RR RR66 C M.N.NF RR R R6 C N R 8 D LL 8 BC 8C Q9 R M Q S TFNM6M R R R R 8 Q S TF 8NMN D9 S TP S HA R 9 R C N D STP S Z Q BC 8 RR DocID6 Rev /

4 Revision history Revision history Table. Document revision history Date Revision Changes -Jan- Initial release. 8-May- Added new features. / DocID6 Rev

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