Dhanalakshmi College of Engineering

Transcription

1 Dhanalakshmi College of Engineering Manimangalam, Tambaram, Chennai DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING EC8311 ELECTRONICS LABORATORY III SEMESTER - R 2017 LABORATORY MANUAL Name Register. No. Section : : :

2 DHANALAKSHMI COLLEGE OF ENGINEERING VISION Dhanalakshmi College of Engineering is committed to provide highly disciplined, conscientious and enterprising professionals conforming to global standards through value based quality education and training. MISSION To provide competent technical manpower capable of meeting requirements of the industry To contribute to the promotion of Academic Excellence in pursuit of Technical Education at different levels To train the students to sell his brawn and brain to the highest bidder but to never put a price tag on heart and soul DEPARTMENT OFELECTRICAL AND ELECTRONICS ENGINEERING VISION To provide candidates with knowledge and skill in the field of Electrical and Electronics Engineering and thereby produce extremely well trained, employable, socially responsible and innovative Electrical and Electronics Engineers. MISSION To provide the students rigorous learning experience to produce creative solutions to society s needs. To produce electrical engineers of high calibre, conscious of the universal moral values adhering to professional ethical code. To provide highest quality learning environment for the students emphasizing fundamental concepts with strongly supported laboratory and prepare them to meet the global needs of the industry by continuous assessment and training. 1 Format No.: DCE / Stud / LM / 34/ Issue: 00 / Revision:00

3 PROGRAM EDUCATIONAL OBJECTIVES (PEOs) 1. Fundamentals To provide students with a solid foundation in mathematics, science and fundamentals of engineering enabling them to solve complex problems in order to develop real time applications. 2. Core Competence To train the students to meet the needs of core industry with an attitude of learning new technologies. 3. Breadth To provide relevant training and experience to bridge the gap between theory and practice which enable them to find solutions to problems in industry and research that contributes to the overall development of society. 4. Professionalism To inculcate professional and effective communication skills to the students to make them lead a team and stand as a good decision maker to manage any constraint environment with good professional ethics at all strategies. 5. Lifelong Learning/Ethics To practice ethical and professional responsibilities in the organization and society with commitment and lifelong learning needed for successful professional career. 2 Format No.: DCE / Stud / LM / 34/ Issue: 00 / Revision:00

4 PROGRAM OUTCOMES (POs) a) Graduates will demonstrate knowledge of mathematics, science and electrical engineering. b) Graduates will be able to identify, formulate and solve electrical engineering problems. c) Graduates will be able to design and conduct experiments, analyze and interpret data. d) Graduates will be able to design a system, component or process as per needs and specifications. e) Graduates will demonstrate to visualize and work on laboratory and multidisciplinary tasks. f) Graduates will demonstrate skills to use modern engineering tools, software and equipment to analyze problems. g) Graduates will demonstrate knowledge of professional and ethical responsibilities. h) Graduates will be able to communicate effectively by both verbal and written form. i) Graduates will show the understanding of impact of engineering solutions on the society and also will be aware of contemporary issues. j) Graduates will develop confidence for self-education and ability for lifelong learning. k) Graduate who can participate and succeed in competitive examinations. 3 Format No.: DCE / Stud / LM / 34/ Issue: 00 / Revision:00

5 EC ELECTRONICS LABORATORY SYLLABUS COURSE OBJECTIVES To understand the behavior of PN junction diode, zener diode and transistor To analyze frequency response characteristics of transistor To design and test various oscillator circuits To understand the behavior of half wave and full wave rectifier circuits To understand the behavior of astable and monostable multivibrator To implement differential amplifier using FET To realize passive filters To study frequency and phase measurements using CRO LIST OF EXPERIMENTS 1. Characteristics of PN Junction diode and zener diode 2. Characteristics of an NPN Transistor under common emitter, common collector and common base configurations 3. Characteristics of JFET(To draw the equivalent circuit) 4. Characteristics of UJT and generation of saw tooth waveform 5. Design and Frequency response characteristics of a Common Emitter amplifier 6. a. Characteristics of photo diode & photo transistor b. Study of light activated relay circuit 7. Design and testing of RC phase shift oscillator and LC oscillator 8. Single phase half-wave and full wave rectifiers with inductive and capacitive filters 9. Differential amplifiers using FET 10. Fequency and phase measurements using CRO 11. Astable and Monostable multivibrators 12. Realization of passive filters COURSE OUTCOMES 1. Ability to understand and analyze, linear and digital electronic circuits. 2. Ability to handle electronic measuring equipments. 3. Ability to understand and draw the characteristics of PN junction diode and zener diode. 4. Ability to understand and draw the characteristics of transistor, JFET, UJT etc 5. Ability to understand oscillators, multivibrators, rectifiers and filters. 4 Format No.: DCE / Stud / LM / 34/ Issue: 00 / Revision:00

6 CONTENTS Sl. No. Name of the Experiment Page.No CYCLE 1 EXPERIMENTS 1 Characteristics of PN Junction Diode 6 2 Characteristics of zener diode 11 3 Characteristics of an NPN transistor under common emitter configuration 16 4 Characteristics of an NPN transistor under common base configuration 20 5 Characteristics of an NPN transistor under common collector configuration 24 6 Characteristics of JFET (To draw the equivalent circuit) 28 7 Characteristics of UJT 33 8 Generation of saw tooth waveform using UJT 37 9 Design and Frequency Response Characteristics of a Common Emitter amplifier Characteristics of photo diode Characteristics of photo transistor Study of light activated relay circuit 50 CYCLE 2 EXPERIMENTS 13 Design and testing of RC phase shift oscillator Design and testing of LC oscillator ( Colpitt s Oscillator) Single phase half-wave rectifier with capacitive filter Single phase full-wave rectifier with capacitive filter Astable multivibrator Monostable multivibrator Differential amplifiers using FET Realization of passive filters Frequency and phase measurement using CRO 84 ADDITIONAL EXPERIMENTS BEYOND THE SYLLABUS 22 Behavior of transistor as a switch 88 5 Format No.: DCE / Stud / LM / 34/ Issue: 00 / Revision:00

7 Expt. No.1: CHARACTERISTICS OF PN JUNCTION DIODE Aim: To determine the forward and reverse characteristics of the given PN junction diode and to determine cut-in voltage Apparatus required: Theory: Sl. No. Description Range Quantity 1 Regulated Power Supply 2 Ammeter 3 Voltmeter 4 Diode 5 Resistor 6 Bread board Connecting Wires --- Donor impurities (pentavalent) are introduced into one-side and acceptor impurities(trivalent) into the other side of a single crystal of an intrinsic semiconductor to form a PN junction diode with a junction called depletion region (this region is depleted off the charge carriers). This region gives rise to a potential barrier called cut-in Voltage. This is the voltage across the diode at which it starts conducting. The PN junction can conduct beyond this potential. The PN junction supports unidirectional current flow. If positive terminal of the input supply is connected to anode (P-side) and negative terminal of the input supply is connected the cathode Then diode is said to be forward biased. If negative terminal of the input supply is connected to anode (p-side) and positive terminal of the input supply is connected to cathode (n-side) then the diode is said to be reverse biased. On forward biasing, initially no current flows due to barrier potential. As the applied potential exceeds the barrier potential the charge carriers gain sufficient energy to cross the potential barrier and hence enter the other region. 6 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00 On reverse biasing, the majority charge carriers are attracted towards the terminals due to the applied potential resulting in the widening of the depletion region. Since the charge carriers are pushed towards the

8 terminals no current flows through the device due to majority charge carriers. There will be some current in the device due to minority carriers. The generation of such carriers is independent of the applied potential and hence the current is constant for all increasing reverse potential. This current is referred to as reverse saturation current (IO) and it increases with temperature. PN junction diode: Symbol: Circuit Diagram: Forward Bias: Reverse Bias: Precautions: 1. Check all the measuring meters for zero errors and correct if if any. 7 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

9 2. Use meters of appropriate ratings for the given electronic component. Procedure: 1. Connect the circuit as per the circuit diagram. 2. Switch on the power supply. 3. Vary the power supply voltage step by step from zero volt. 4. Take the voltmeter and ammeter readings for every variation of power supply. 5. Re-Connect the circuit for reverse bias condition as shown in figure. 6. Repeat the step 3 and 4 for reverse bias. 7. Draw the graph for forward bias and reverse bias for PN junction diode. 8. Note down cut-in voltage for PN junction diode. 9. Switch of the power supply. Observation: Forward Bias: Sl. No. Forward Voltage Vf Forward Current If Forward Resistance (V) (ma) Rf = Vf / If (Ω) 8 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00 Reverse bias:

10 Sl. No. Reverse Voltage Vf Reverse Current Ir Reverse Resistance (V) (µa) Rr = Vr / Ir (Ω)) Model graph: Result: Thus the forward and reverse characteristics of the given PN junction diode is determined. The cut-in voltage of the given PN junction diode is V. Outcomes: Students are able to 1. Analyze the characteristics of the given PN junction diode 2. Calculate the dynamic and static resistance in forward bias and reverse bias Applications: It is the process of rectifier as one of the part of DC Power Supplies. In cut-out circuits utilized for waveform era. PN junctions have been used as rectifiers in power supplies, detectors in RF,circuits, Zener diodes which are voltage regulators, clippers, LED's, PIN diodes are RF switches. 9 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

11 Viva-voce 1. What is meant by a semiconductor? Give two examples? 2. What are the types of semiconductor? 3. What is meant by doping? 4. Define drift current 5. How depletion region is formed in the PN junction? 6. List the applications of PN junction diode. 7. Define Barrier potential 8. What is peak inverse voltage of a diode? 9. What is avalanche breakdown? 10. What is leakage current? 11. What is meant by forward bias? 12. What is meant by reverse bias? 13. What is an ideal diode? How does it differ from a real diode? 14. What is the effect of temperature in the diode reverse characteristics? 15. What is cut-in or knee voltage? Specify its value in case of Ge or Si? 16. What are the difference between Ge and Si diode? 17. What is the relationship between depletion width and the concentration of impurities? 18. Comment on diode operation under zero biasing condition 19. How does PN junction diode acts as a switch? 20. What is the need for connecting Resistance Rs in series with PN diode? 21. Write the diode current equation. 22. What is the static resistance of a diode? 23. What is the dynamic resistance of a diode? 24. Why is silicon used popularly compared to germanium? 25. Draw the ideal, practical and piecewise linear characteristics of a PN junction diode. 10 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

12 Expt. No.2: Aim: CHARACTERISTICS OF ZENER DIODE To determine the forward and reverse characteristics of Zener diode and to determine its breakdown voltage Apparatus required: Sl. No. Description Range Quantity 1 Regulated Power Supply 1 2 Ammeter 1 3 Voltmeter 1 4 Zener diode 1 5 Resistor 1 6 Bread board Connecting Wires --- Few Theory: Zener diode is a heavily doped Silicon diode. An ideal P-N junction diode does not conduct in reverse biased condition. A Zener diode conducts excellently even in reverse biased condition. These diodes operate at a precise value of voltage called break down voltage. A Zener diode when forward biased behaves like an ordinary P-N junction diode. A Zener diode when reverse biased undergoes avalanche break down or zener break down. Avalanche Break down: If both p-side and n-side of the diode are lightly doped, depletion region at the junction widens. Application of a very large electric field at the junction increases the kinetic energy of the charge carriers which collides with the adjacent atoms and generates charge carriers by breaking the bond, they in-turn collides with other atoms by creating new charge carriers, this process is cumulative which results in the generation of large current resulting in Avalanche Breakdown. 11 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

13 Zener Break down: If both p-side and n-side of the diode are heavily doped, depletion region at the junction reduces, it leads to the development of strong electric field and application of even a small voltage at the junction may rupture covalent bond and generate large number of charge carriers. Such sudden increase in the number of charge carriers results in Zener break down. Zener Diode: Symbol: Circuit Diagram: Forward Bias: Reverse Bias: 12 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

14 Precaution: Procedure: 1. While doing the experiment don t exceed the ratings of diode. This may damage the diode. 2. Connect voltmeter and ammeter in correct polarities as shown in the circuit diagram. 3. Do not switch ON the power supply unless you have checked the circuit connections as per the circuit diagram. 1. Connect the circuit as per the diagram. 2. Switch on the power supply. 3. Vary the power supply voltage step by step from zero volt. 4. Take the voltmeter and ammeter readings for every variation of power supply. 5. Re-Connect the circuit for reverse bias condition as shown in figure and repeat steps 3 and 4 for reverse bias. 6. Draw the graph for forward bias and reverse bias for Zener diode. 7. Note down cut-in voltage and breakdown voltage for Zener diode. 8. Switch of the power supply. Observation: Forward Bias: Sl. No. Forward Voltage Vf (V) Forward Current If Forward Resistance Rf=Vf/If (ma) (Ω) Reverse Bias: Sl. No. Reverse Voltage Vr (V) Reverse Current Ir (ma) Reverse Resistance Rr=Vr/Ir (Ω) 13 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

15 Calculation: Rf = Vf / If ( Rf = Dynamic forward resistance) Rr = Vr / Ir ( Rr = Dynamic reverse resistance) V= V2 - V1 I = I2 - I1 Model Graph: I f (ma) V r (V) V f (V) I r (ma) Result: Thus the forward and reverse characteristics of the given zener diode are determined. The breakdown voltage of the given zener diode is V. Outcomes: Students are able to 1. Analyze the forward and reverse bias characteristics of zener diode. 2. Calculate static and dynamic resistance in both forward and reverse bias condition. 3. Analyze the working of zener diode as a voltage regulator for line regulation and load regulation. Applications: zener diode is used to provide a 3V reference to the Bluetooth device. Another application involves use of Zener diode as a voltage regulator. This filtered DC voltage is regulated by the diode to provide a constant reference voltage of 15V. 14 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

16 Viva-voce 1. What are breakdown diodes or Zener diodes? 2. What is Zener breakdown? 3. What is break down? What are its types? 4. How does the Zener breakdown voltage vary with temperature? 5. What is avalanche break down? 6. What is the difference between PN Junction diode and Zener diode? 7. What is break down voltage? 8. What are the applications of Zener diode? 9. What is voltage regulator? 10. What is the doping concentration in Zener diodes? 11. Can we use Zener diode as a switch? 12. List the other Zener diodes with different breakdown voltages. 13. What is the cause of reverse breakdown? 14. What is Zener voltage? 15. Draw the symbol for the Zener diode. 15 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

17 Expt. No. 3: Aim: CHARACTERISTICS OF A NPN TRANSISTOR UNDER COMMON EMITTER CONFIGURATION To obtain the input and output characteristics of the given transistor in common emitter configuration. Apparatus required: Theory: Sl. No. Description Range Quantity 1 Regulated Power Supply 1 2 Ammeter 1 4 Voltmeter 1 5 Voltmeter 1 6 NPN Transistor 1 7 Resistor 1 8 Connecting Wires Few A NPN function transistor consist of a silicon (or germanium) crystal in which a layer of p type silicon is sandwiched between two layers of N type silicon. The arrow on emitter lead specifies the direction of the current flow when the emitter base function is forward biased. As the conductivity of the BJT depends on both the majority and minority carriers it is called bipolar device. In CE configuration, Emitter is common to both the Emitter and Base. A transistor can be in any of the three configurations viz, Common base, Common emitter and Common Collector.The transistor consists of three terminal emitter, collector and base. The emitter layer is the source of the charge carriers and it is heavily doped with a moderate cross sectional area. The collector collects the charge carries and hence has moderate doping and large cross sectional area. The base region acts a path for the movement of the charge carriers. In order to reduce the recombination of holes and electrons the base region is lightly doped and is of hollow cross sectional area. Normally the transistor operates with the emitter base junction forward biased. In transistor, the current is same in both junctions, which indicates that there is a transfer of resistance between the two junctions which is known as transfer resistance of transistor. 16 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

18 Circuit Diagram: Precautions: 1. While performing the experiment do not exceed the ratings of the transistor. This may lead to the transistor damage. 2. Connect voltmeter and ammeter in correct polarities as shown in the circuit diagram. 3. Do not switch ON the power supply unless you have checked the circuit connections as per the circuit diagram. 4. Make sure while selecting the emitter, base and collector terminals of the transistor. Procedure: Input Characteristics: 1. Connect the circuit as per the circuit diagram. 2. Set VCE, vary VBE in regular interval of steps and note down the corresponding IB reading. 3. Repeat the above procedure for different values of VCE. 4. Plot the graph: VBE vs. IB for a constant VCE. Output Characteristics: 1. Connect the circuit as per the circuit diagram. 2. Set IB, Vary VCE in regular interval of steps and note down the corresponding IC reading. 3. Repeat the above procedure for different values of IB. 4. Plot the graph: VCE vs. IC for a constant IB. 5. Switch of the power supply. 6. Disconnect the components. 17 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

19 Model graph: Observation: Input Characteristics: VCE = VCE = VBE (V) IB (μa) VBE (V) IB (μa) Output characteristics: IB = IB = VCE (V) IC (ma) VCE (V) IC (ma) 18 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

20 Result: The transistor characteristics of a Common Emitter (CE) configuration were plotted. Outcomes: Students are able to 1. Analyze the characteristics of BJT in common emitter configuration. 2. Calculate h-parameters from the characteristics obtained. Applications: CE Amplifier. The common emitter circuit is popular because it's well-suited for voltage amplification, especially at low frequencies. Common-emitter amplifiers are also used in radio frequency transceiver circuits. Common emitter configuration commonly used in low-noise amplifiers. 19 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

21 Viva-voce 1. Why CE configuration is commonly used for amplifier circuits? 2. What is indicated by B, C and 107 in BC107? 3. What are the regions of operation of a transistor? 4. What is meant by thermal run away? 5. To operate a transistor as amplifier, emitter junction is forward biased and collector junction is reverse biased. Why? 6. Which transistor configuration provides a phase reversal between the input and output signals? 7. What is the range β of a BJT? 8. What is Early Effect? 9. Why the doping of collector is less compared to emitter? 10. What are the input and output impedances of CE configuration? 11. Identify various regions in the output characteristics? 12. What is the relation between α, β and γ? 13. What is current gain in CE configuration? 14. Why CE configuration is preferred for amplification? 15. What is the phase relation between input and output? 16. Draw diagram of CE configuration for PNP transistor? 17. What is the power gain of CE configuration? 18. What are the applications of CE configuration? 19. Why the output is phase shifted by 180 degree only in CE configuration. 20. At what region of the output characteristics, a transistor can act as an amplifier? 20 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

22 Aim: Expt. No. 4: CHARACTERISTICS OF A NPN TRANSISTOR UNDER COMMON BASE CONFIGURATION To obtain the input and output characteristics of the given BJT in common base configuration Apparatus required: Sl. No. Description Range Quantity 1 Regulated Power Supply 1 2 Ammeter 1 3 Voltmeter 1 4 Voltmeter 1 5 NPN Transistor 1 6 Resistor 1 7 Bread board Connecting Wires --- Few Theory: In this configuration the base is made common to both the input and out. The emitter is given the input and the output is taken across the collector. The current gain of this configuration is less than unity. The voltage gain of common base configuration is high. Due to the high voltage gain, the power gain is also high. In common base configuration, Base is common to both input and output. In this configuration the input characteristics relate IE and VEB for a constant VCB. Initially let VCB = 0 then the input junction is equivalent to a forward biased diode and the characteristics resembles that of a diode. Where VCB = +VI (volts) due to early effect IE increases and so the characteristics shifts to the left. The output characteristics relate IC and VCB for a constant IE. 20 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

23 Circuit diagram: Precautions: 1. While performing the experiment do not exceed the ratings of the transistor. This may lead to damage the transistor. 2. Connect voltmeter and ammeter in correct polarities as shown in the circuit diagram. 3. Do not switch ON the power supply unless you have checked the circuit connections as per the circuit diagram. 4. Make sure while selecting the emitter, base and collector terminals of the transistor. Procedure: Input Characteristics: 1. Connect the circuit as shown in fig. adjust all the knobs of the power supply to their minimum positions before switching the supply on. 2. Adjust the VCE to 0 V by adjusting the supply VCC. 3. Vary the supply voltage VBB so that VBE varies in steps of 0.1 V from 0 to 0.5 V and then in steps of 0.02 V from 0.5 to 0.7 V. In each step note the value of base current IB. 4. Repeat step-3 for each different values of VCE such as 1V, 2V. 5. Plot a graph between VBE and IB for different values of VCE. These curves are called input characteristics. Output Characteristics: 1. Connect the circuit as shown in fig adjust all the knobs of the power supply,it must be at the minimum position before the supply is switched on. 2. Adjust the base current IB to 20 µa by adjusting the supply VBB. 21 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

24 3. Vary the supply voltage VCC so that the voltage VCE varies in steps of 0.2 V from 0 to 2 V and then in steps of 1 V from 2 to 10 V. In each step the base current should be adjusted to the present value and the collector current IC should be recorded. 4. Adjust the base current at 40, 60 µa and repeat step-3 for each value of IB. Plot a graph between the output voltage VCE and output current IC for different values of the input current IB. These curves are called the output characteristics Observation: Input Characteristics: S.No. VCB = VCB = VCB = v V V VEB (V) IE (μa) VEB (V) IE (μa) VEB (V) IE (μa) Output Characteristics: S.No. IE = IE = IE = ma ma ma VCB (V) Ic (ma) VCB (V) Ic (ma) VCB (V) Ic (ma) 22 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

25 Model graph: Input characteristics: I C (ma) V CB 1 V CB 2 V EB1 VEB2 V EB (V) Output characteristics: 23 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

26 Result: The transistor characteristics of a common base configuration were plotted. Outcomes: Students are able to 1. analyze the characteristics of BJT in common base configuration. 2. calculate h-parameters from the characteristics obtained. Applications: This type of bipolar transistor configuration has a greater input impedance, current and power gain than that of the common base configuration but its voltage gain is much lower. The common emitter configuration is an inverting amplifier circuit.

27 24 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00 Viva-voce 1. Define and give the expression for its relation with. 2. Express Ic in terms ICE0 and ICB0. 3. What does arrow in the transistor symbol indicate? 4. Why emitter of a transistor is highly doped? 5. Which configuration is good as a constant current source? Why? 6. What is the range of? 7. Why is less than unity? 8. Input and output impedance equations for CB configuration? 9. What is carrier lifetime? 10. What is the importance of Fermi level? 25 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

28 Expt. No.5: Aim: CHARACTERISTICS OF A NPN TRANSISTOR UNDER COMMON COLLECTOR CONFIGURATION To obtain the input and output characteristics of the given BJT in common collector configuration Apparatus required: Theory: Sl. No. Description Range Quantity 1 Regulated Power Supply 1 2 Ammeter 1 3 Ammeter 1 4 Voltmeter 1 5 Voltmeter 1 6 NPN Transistor 1 7 Resistor 1 8 Connecting Wires --- Few A BJT is a three terminal two junction semiconductor device in which the conduction is due to both the charge carrier. Hence it is a bipolar device and it amplifies the sine waveform. BJT is classified into two types NPN or PNP. A NPN transistor consists of two N types in between which a layer of P is sandwiched. The transistor consists of three terminal emitter, collector and base. The emitter layer is the source of the charge carriers and it is heavily doped with a moderate cross sectional area. The collector collects the charge carries and hence it has moderate doping and large cross sectional area. The base region acts a path for the movement of the charge carriers. In order to reduce the recombination of holes and electrons the base region is lightly doped and is of hollow cross sectional area. Normally the transistor operates with the EB junction forward biased. In transistor, the current is same in both junctions, which indicates that there is a transfer of resistance between the two junctions which is known as transfer resistance of transistor. 26 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

29 Circuit diagram: Precautions: 1. While doing the experiment do not exceed the ratings of the transistor. This may damage the transistor. 2. Connect voltmeter and Ammeter in correct polarities as shown in the circuit diagram. 3. Do not switch ON the power supply unless you have checked the circuit connections as per the circuit diagram. 4. Make sure while selecting the emitter, base and collector terminals of the transistor. Procedure: Input characteristics: 1. Connect the circuit as per the circuit diagram. 2. Set VCE, vary VBE in regular interval of steps and note down the corresponding IB reading. Repeat the above procedure for different values of VCE. 3. Plot the graph: VBC vs. IB for a constant VCE. Output characteristics: 1. Connect the circuit as per the circuit diagram. 2. Set IB, Vary VCE in regular interval of steps and note down the corresponding IC reading. Repeat the above procedure for different values of IB. 3. Plot the graph: VCE vs. IC for a constant IB. 27 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

30 Model characteristics: Input characteristics: Output characteristics: Observation: Input characteristics: Output characteristics: Result: The transistor characteristics of a Common Collector (CC) configuration were plotted. 27 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

31 Outcomes: Students are able to Applications: 1. Analyze the characteristics of BJT in common base configuration. 2. Calculate h-parameters from the characteristics obtained. In Common Collector transistor configuration, we use collector terminal as common for both input and output signals.... The emitter follower configuration is mostly used as a voltage buffer. These configurations are widely used in impedance matching applications because of their high input impedance. Viva-voce 1. What are the various configurations of NPN transistor? 2. What are the regions of operation of a transistor? 3. Why collector of a transistor is the largest region? 4. What is meant by early effect? 5. What is meant by thermal run away? 6. Why amplifier is known as emitter follower? 7. Mention the applications of CC amplifier. 8. What are the differences between CE, CB and CC amplifier? 9. Mention the characteristics of CC amplifier. 10. What is gain BW product? 11. Can we use CC configuration as an amplifier? 12. What are the three different regions of BJT? 13. What is the need for analyzing the transistor circuits using different parameters? 14. What is the significance of hybrid model of a transistor? 15. Is there any phase shift between input and output in CC configuration? 16. Compare the voltage gain and input and output impedances of CE and CC configurations. 17. BJT is a current controlled device. Justify. 18. Which BJT configuration is suitable for impedance matching application. Why? 19. What is the use of heat sink? 20. List the application of BJT? 28 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

32 Expt. No. 6: CHARACTERISTICS OF JFET Aim: To determine the drain and transfer characteristics of junction FET at constant gate voltages Apparatus required: Sl. No. Description Range Quantity 1 Regulated Power Supply 1 2 N-channel JFET 1 3 Ammeter 1 4 Voltmeter 2 5 Resistor 2 6 Bread board Connecting Wires --- Few Theory: FET is a unipolar voltage operated device. It has got 3 terminals. They are source, drain and gate. When the gate is biased negative with respect to the source, the PN junctions are reverse biased & depletion regions are formed. The channel is more lightly doped than the p type gate, so the depletion region penetrate deeply in to the channel. The result is that the channel is narrowed, its resistance is increased and ID is reduced. When the negative bias voltage is further increased, the depletion regions meet at the center and ID is cutoff completely. The depletion regions produces a potential gradient which is of varying thickness around the PN junction and restrict the current flow through the channel by reducing its effective width and thus increasing the overall resistance of the channel itself. Then we can see that the most-depleted portion of the depletion region is in between the gate and the drain, while the least depleted conducts with zero bias voltage applied (i.e, the depletion region has near zero width). With no external Gate voltage (VG = 0), and a small voltage ( VDS ) applied between the drain and the source, maximum saturation current ( IDSS ) will flow through the channel from the drain to the source restricted only by the small depletion region around the junctions. If a small negative voltage ( -VGS ) is now applied to the gate the size of the depletion region begins to increase reducing the overall effective area of the channel and thus reducing the current flowing reverse bias voltage increases the width of the depletion region which in turn reduces the conduction of the channel. 28 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

33 Pin Diagram: Bottom view of BFW10: Specification: Voltage: 30V, IDSS > 8mA Circuit Diagram: 68kΩ G S D BFW10 A 1kΩ VGS V V VDD JFET AC Equivalent Circuit: Precautions: 1. While doing the experiment do not exceed the ratings of the FET. This may lead to damage the FET. 2. Connect voltmeter and ammeter in correct polarities as shown in the circuit diagram. 29 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

34 3. Do not switch ON the power supply unless you have checked the circuit connections as per the circuit diagram. 4. Make sure while selecting the source, drain and gate terminals of the FET. Procedure: Drain Characteristics: 1. Connect the circuit as per the circuit diagram. 2. Set the gate voltage VGS = 0V. 3. Vary VDS in steps of 1 V & note down the corresponding ID. 4. Repeat the same procedure for VGS = -1V. 5. Plot the graph VDS vs. ID for constant VGS. Transfer Characteristics: 1. Connect the circuit as per the circuit diagram. 2. Set the drain voltage VDS = 5 V. 3. Vary the gate voltage VGS in steps of 1V & note down the corresponding ID. 4. Repeat the same procedure for VDS = 10V. 5. Plot the graph VGS vs. ID for constant VDS. 6. Switch of the power supply. 7. Disconnect the components. FET Parameter Calculation: Drain Resistancd rd = Transconductance gm = V Amplification factor μ = rd. gm I DS V D I GS D V V GS DS 30 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

35 Observation: Drain characteristics: VGS = VGS = VDS (V) ID(mA) VDS (V) ID(mA) Transfer characteristics: VDS = VDS = VGS (V) ID(mA) VGS (V) ID(mA) Model graph: Drain characteristics: I D (ma) V GS = 0V V GS = -1V V GS = -2V V GS = -3V V DS (V) 31 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

36 Transfer characteristics: ID(mA) VDS Result: V GS (V) Thus the drain and transfer characteristics of a JFET is plotted. Outcomes: Students are able to Applications: 1. analyze the Drain and transfer characteristics of FET in common source configuration. 2. calculate the parameters trans-conductance (gm), drain resistance (rd) and amplification factor(µ). The junction field effect transistor (JFET) is used as a constant current source. The JFET is used as a buffer amplifier.... The JFET is used as high impedance wide band amplifier. The JFET is used as a voltage variable resistor (VVR) or voltage development resistor (VDR) Viva-voce 1. Why FET is called a unipolar device? 2. What are the advantages of FET? 3. What is trans-conductance? 4. Why an input characteristic of FET is not drawn? 5. What are the characteristics of JFET source amplifier? 6. Why FET is called as a unipolar transistor? 7. What are the advantages of FET over BJT? 8. State why FET is voltage controlled device. 9. Why thermal runaway does not occur in FET? 10. What is the difference between MOSFET and FET? 11. What is trans-conductance? 32 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

37 Expt. No. 7: CHARACTERISTICS OF UJT Aim: To determine the characteristics of UJT and to calculate intrinsic stand-off ratio Apparatus required: Sl. No. Description Range Quantity 1 Regulated Power Supply 1 2 Ammeter 1 3 Voltmeter 1 4 Voltmeter 1 5 UJT 1 6 Resistor 1 7 Bread board Connecting Wires --- Few Theory: UJT (double base diode) consists of a bar of lightly doped n-type silicon with a small piece of heavily doped P type material joined to one side. It has got three terminals. They are Emitter (E), Base1 (B1), Base2 (B2). Since the silicon bar is lightly doped, it has a high resistance and can be represented as two resistors, rb1and rb2. When VB1B2 = 0, a small increase in VE forward biases the emitter junction. The resultant plot of VE and I E is simply the characteristics of forward biased diode with resistance. Increasing VEB1 reduces the emitter junction reverse bias. When VEB1 = VrB1 there is no forward or reverse bias and IE = 0. Increasing VEB1 beyond this point begins to forward bias the emitter junction. At the peak point, a small forward emitter current is flowing. This current is termed as peak current (IP ). Until this point UJT is said to be operating in cutoff region. When IE increases beyond peak current the device enters the negative resistance region. In which the resistance rb1 falls rapidly and VE falls to the valley voltage Vv. At this point IE = Iv. A further increase of IE causes the device to enter the saturation region. 33 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

38 Pin Diagram of UJT: Bottom View of 2N2646: Circuit Diagram: VEE 1kΩ A V E B1 B2 V 1kΩ VBB Model graph: VEB1 V P I P VB1B2=1 VB1B2=0 IV I E (ma) 34 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

39 Precautions: 1. While performing the experiment do not exceed the ratings of the UJT. This may lead to damage of the UJT. 2. Connect voltmeter and ammeter in correct polarities as shown in the circuit diagram. 3. Do not switch ON the power supply unless you have checked the circuit connections as per the circuit diagram. 4. Make sure while selecting the emitter, base-1, base-2 terminals of UJT. Procedure: 1. Connect the circuit as per the circuit diagram. 2. Set VB1B2 = 0V, vary VEB1, & note down the readings of IE& VEB1. 3. Set VB1B2 = 10V, vary VEB1, & note down the readings of IE& VEB1. 4. Plot the graph : IE Versus VEB1 for constant VB1B2. 5. Find the intrinsic standoff ratio. Calculation: Formula for Intrinsic Standoff Ratio: η = VP - VD / VB1B2, where, η -Intrinsic Standoff Ratio VP- Peak Voltage VD- Forward Voltage Drop (VD = 0.7V) Observation: VB1B2 = VB1B2 = VEB1 (V) IE (ma) VEB1 (V) IE (ma) Result: Thus the characteristics of UJT are studied. Intrinsic standoff ratio 35 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

40 Outcomes: Students are able to obtain the characteristics of UJT. Applications: The most common application of a unijunction transistor is as a triggering device for SCR's and Triacs but other UJT applications include sawtoothed generators, simple oscillators, phase control, and timing circuits. The simplest of all UJT circuits is the Relaxation Oscillator producing non-sinusoidal waveforms. Viva-voce 1. Write the features of UJT. 2. What are the applications of UJT? 3. What is relaxation oscillator? 4. Why does negative resistance region appears in UJT? 5. What is the doping profile of UJT? 6. What is the importance of intrinsic stand-off ratio? 7. Is there any break down region in UJT? 8. Write the features of UJT. 9. What is the difference between UJT and FET? 10. Define Latching current 11. Define Holding current 12. What is drain resistance? 13. What is inter-base resistance? 14. What is amplification factor? 36 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

41 Expt.No.8: GENERATION OF SAW TOOTHWAVEFORM Aim: To generate saw tooth waveform using UJT Apparatus required: Theory: USING UJT Sl. No. Description Range Quantity 1 Regulated Power Supply 1 2 UJT 1 3 CRO 1 4 Capacitor 1 5 Resistor 1 6 Bread board Connecting Wires --- Few UJT saw tooth generator (relaxation oscillator) is a type of RC (Resistor - Capacitor) oscillator where the active element is a UJT (Uni-Junction Transistor). UJT is an excellent switch with switching times in the order of nano seconds. It has a negative resistance region in the characteristics and can be easily employed in relaxation oscillators. The UJT relaxation oscillator is called so because the timing interval is set up by the charging of a capacitor and the timing interval is ceased by the rapid discharge of the same capacitor. UJT relaxation oscillator: +20V Re1 10kΩ Rb1 100Ω C1 0.2µF 2N2646 Rb2 20Ω 37 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

42 Precautions: 1. While performing the experiment do not exceed the ratings of the UJT. This may lead to damage of the UJT. 2. Connect voltmeter and ammeter in correct polarities as shown in the circuit diagram. 3. Do not switch ON the power supply unless you have checked the circuit connections as per the circuit diagram. 4. Make sure while selecting the emitter, base - 1, base - 2 terminals of UJT. Procedure: Generation of saw tooth wave form: 1. Connections are made as per the circuit diagram. 2. The dc input voltage is set to 20 V in RPS. 3. The output Vo is noted, time period is also noted. 4. The theoretical time period should be calculated. 5. T = RT CT ln (1 / 1- n). 6. The output at base 1 and base 2 should note. 7. Graph should be plotted and waveforms are drawn for V0, VB1, VB2. Calculation: The time period of the saw tooth wave Observation: Measurement of time Frequency period Sl. C Time Theoretical No. R(Ω) (F) Horizontal base T = Experimental 1 Length (l) F div. (t) l * t f= 1/T 1 sec/div Sec RC log10 (1 ) Hz 38 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

43 Model graph: IE (ma) VB1E (V) Result: Thus the saw tooth waveform is generated using UJT relaxation oscillator. Outcomes: Students are able to obtain saw tooth waveform is generated using UJT relaxation oscillator. Applications: The most common application of a unijunction transistor is as a triggering device for SCR's and Triacs but other UJT applications include sawtoothed generators, simple oscillators, phase control, and timing circuits. The simplest of all UJT circuits is the Relaxation Oscillator producing non-sinusoidal waveforms. Viva-voce 1. What is the importance of intrinsic stand-off ratio? 2. Is there any break down region in UJT? 3. What are the applications of UJT? 4. What is the difference between UJT and FET? 5. Name few UJTs available in the market. 6. What is the function of oscillator? 7. Which portion of the characteristics used in a relaxation oscillator? 8. Which oscillator is very suitable for audio range applications? 9. Which oscillator is suitable for RF range applications? 10. What is the difference between oscillator & amplifier? 39 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

44 Expt. No.9: DESIGN AND FREQUENCY RESPONSE OF A Aim: COMMON EMITTER AMPLIFIER To design a common emitter amplifier circuit and to plot frequency response characteristic curve Apparatus required: Sl. No. Description Range Quantity 1 Regulated Power Supply 1 2 FG CRO Capacitor 1 5 Resistor 1 6 Bread board Connecting Wires --- Few Theory: Common Emitter (CE) Amplifier is an electronic circuit that is used to raise the strength of a weak signal. The process of raising the strength of a weak signal is known as amplification. One importance requirement during amplification is that only the magnitude of the signal should increase and there should be no change in signal shape. The transistor is used for amplification. From the voltage waveforms for the CE circuit shown below, it is seen that there is a 180o phase shift between the input and output waveforms. This can be understood by considering the effect of a positive going input signal. When VS increases in a positive direction, it increases the transistor VBE. The increase in VBE raises the level of IC, thereby increasing the drop across Rc, and thus reducing the level of the VC. The changing level of VC is capacitor-coupled to the circuit output to produce the ac output voltage, VO. As VS increases in a positive direction, VO goes in a negative direction. Similarly, When VS changes in a negative direction, the resultant decrease in VBE reduces the IC level, thereby reducing VRC, and producing a positive going output. 40 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

45 CE amplifier circuit elements and their functions: Biasing circuit: The resistances R1, R2 and RE form the biasing and stabilization circuit. The biasing circuit must establish a proper operating point, otherwise a part of the negative half-cycle of the signal may be cut-off in the output. Input capacitor, C1: An electrolyte capacitor C1 is used to couple the signal to the base of the transistor. If it is not used, the signal source resistance, Rs will come across R2 and thus change the bias. C1 allows only ac signal to flow but isolates the signal source from R2. Emitter bypass capacitor, CE: An emitter bypass capacitor, CE is used parallel with RE to provide low reactance path to the amplified ac signal. If it is not used, then ac amplified ac signal following through RE will cause a voltage drop across it, thereby reducing the output voltage. Coupling capacitor, C2: The coupling capacitor, C2 couples one stage of amplification to the next stage. If it is not used, the bias conditions of the next stage will be drastically changed due to the shunting effect of RC. This is because RC will come in parallel with the upper resistance R1 of the biasing network of the next stage, thereby altering the biasing conditions of the latter. In short, the coupling capacitor C2 isolates the dc of one stage from the next stage, but allows the passage of ac signal. The circuit has input impedance (Zi) and output impedance (ZO). These can cause voltage division of the circuit input and output voltages.the circuit voltage amplification (AV), or voltage gain, depends on the transistor parameters and on resistor RC and RL. Circuit Diagram: (CE amplifier circuit with design values of components) + V CC R R C C C Q E R Vs R R C 41 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

46 Precautions: 1. While performing the experiment do not exceed the ratings of the transistor. This may lead to damage the transistor. 2. Connect voltmeter and ammeter in correct polarities as shown in the circuit diagram. 3. Do not switch ON the power supply unless you have checked the circuit connections as per the circuit diagram. 4. Make sure while selecting the emitter, base and collector terminals of the transistor. Procedure: Frequency response curve measurements: 1. Connections are made as per the circuit diagram. 2. In the above assembled circuit, keep the magnitude of the source same, ie. 100 mv and decrease the frequency from 1 KHz and measure voltage gain of the amplifier at each frequency. Now increase the frequency from 1 KHz to 1 MHz and measure the voltage gain of the amplifier at each frequency. Take at least 5 readings on either side of the 1 KHz frequency. Tabulate the reading in the table. 3. Plot on a semi-log graph sheet the frequency response (voltage gain vs. frequency) curve using the above measurements. 4. From the plot, determine the values of (a) Mid band voltage gain, AV(mid), (b) Lower cut-off frequency, (c) Upper cut-off frequency and (d) Bandwidth. Observation: Frequency response curve measurements Set Input Voltage, VS = mv Signal Frequency (Hz) Output Voltage Vo Voltage Gain, db Fs (volts) Voltage Gain (Vo / Vs) 20 log10 (Vo / Vs) 42 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

47 Model Graph: Frequency response of CE amplifier Result: Thus the CE amplifier is designed and frequency response curve is plotted. Outcomes: Students are able to calculate the bandwidth of BJT common emitter amplifier. Application: The common emitter circuit is popular because it's well-suited for voltage amplification, especially at low frequencies. Common-emitter amplifiers are also used in radio frequency transceiver circuits. Common emitter configuration commonly used in low-noise amplifiers Viva-voce 1. What is an amplifier? 2. What is small signal amplifier? 3. List the four differential amplifier configurations. 4. Why does amplifier gain reduce? 5. Explain the different regions in frequency response? 6. What is the equation for voltage gain? 7. What is cut off frequency? What is lower 3dB and upper 3dB cut off frequency? 8. What are the applications of CE amplifier? 9. What is active region? 10. What is bandwidth of an amplifier? 11. What is the importance of gain bandwidth product? 12. Draw h-parameter equivalent circuit of CE amplifier. 43 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

48 Expt. No.10: CHARACTERISTICS OF PHOTO DIODE Aim: To study the V-I characteristics of a photo-diode Apparatus required: Sl. No. Description Range Quantity 1 Regulated Power Supply 1 2 Photo-Diode 1 3 Voltmeter 1 4 Ammeter 1 5 Resistor 1 7 Bread board Incandescent Lamp 1 Theory: A silicon photodiode is a solid state light detector that consists of a shallow diffused P-N junction with connections provided to the outside world. When the top surface is illuminated, photons of light penetrate into the silicon to a depth determined by the photon energy and are absorbed by the silicon generating electronhole pairs. The electron-hole pairs are free to diffuse (or wander) throughout the bulk of the photodiode until they recombine. The average time before recombination is the minority carrier lifetime. At the P-N junction is a region of strong electric field called the depletion region. It is formed by the voltage potential that exists at the P-N junction. Those light generated carriers that wander into contact with this field are swept across the junction. If an external connection is made to both sides of the junction a photo induced current will flow as long as light falls upon the photodiode. In addition to the photocurrent, a voltage is produced across the diode. In 44 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

49 effect, the photodiode functions exactly like a solar cell by generating a current and voltage when exposed to light. Circuit diagram: Precaution: 1. Maintain a known distance of 5 cm between the photodiode and DC bulb Procedure: 1. Connect as per the circuit diagram. 2. Place the photodiode in dark area. 3. Vary the power supply voltage in steps of 1V and note down the corresponding voltage and current. 4. Allow light to fall on the device and repeat the above step 3 for various distance between the bulb and photodiode say 5 cm, 10 cm and 15 cm. 5. Plot the graph: IR against VR by taking inverse voltage along X-axis and diode current along Y-axis. Observation: Sl. No. Without Light With Light Reverse Reverse Sl. No. Reverse Reverse Voltage (Vr) Current (Ir) Voltage (Vr) Current (Ir) Distance= cm 45 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

50 Model graph: Ir(mA) Under illumination Under Darkness Vr(V) Result: Thus the V-I characteristics of the given photo-diode is determined. Outcome: On completion of the experiment, student will be able to: 1. analyze the characteristics of photodiode. 2. analyze the forward bias and reverse bias characteristics. Application: Medical devices Safety equipment Optical communication devices Position sensors Bar code scanners Automotive devices Viva-voce 1. Explain the principle of photoconduction. 2. What are the applications of photo diode? 3. In what sense does the photo diode differs from a rectifier diode? 4. Why photo diode works in reverse bias condition only? 46 Format No.: DCE/Stud/LM/34/Issue:00/Revision:01

51 5. Differentiate between Photo diode and LED. 6. Between what parameters is the diode characteristics curve plotted? 7. What for photodiode is used? 8. How is a PN junction formed? 9. On what parameter does the colour of light emitted by LED depend? 10. What does the arrow direction in the diode symbol indicate?

52 Exp. No.11: CHARACTERISTICS OF PHOTOTRANSISTOR Aim: To study the V-I characteristics of a photo-transistor Apparatus required: Sl. No. Description Range Quantity 1 Regulated Power Supply 1 2 Photo-transistor 1 3 Voltmeter 1 4 Ammeter 1 5 Resistor 1 6 Incandescent Lamp Bread board Connecting Wires as required Theory: The photo transistor is a 3 terminal device which gives an electrical current as output if an input light excitation is provided. It works in reverse bias. When reverse biased along with the reverse bias current ICO, the light current IL is also added to the total output current. The amount of current flow depends on the input light intensity given as excitation. Phototransistor is basically a photodiode with amplification and operates by exposing its base region to the light source. Phototransistor light sensors operate the same as photodiodes except that they can provide current gain and are much more sensitive than the photodiode with currents are times greater than that of the standard photodiode. Phototransistors consist mainly of a bipolar NPN transistor with the collector-base PN-junction reverse-biased. The phototransistor s large base region is left electrically unconnected and uses photons of light to generate a base current which in turn causes a collector to emitter current to flow. 47 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

53 Circuit diagram: Precaution: 1. Maintain a known distance of 5 cm between the phototransistor and DC bulb. Procedure: 1. Connect the circuit as per the circuit diagram. 2. Keep the input light excitation fixed. Then vary the Vce in steps of 1V till the maximum voltage rating of the transistor is reached and then note down the corresponding values of Ic. 3. Tabulate the readings. For various values of input excitation, record the values of Vce and Ic and plot the characteristics of the photo transistor. Observation: Sl. No. Without Light With Light Sl. No. Voltage (Vce) Current (Ic) Voltage (Vce) Current (Ic) Distance= cm Distance= cm Distance= cm 48 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

54 Model graph: Ic(mA) Under illumination Under Darkness Result: VCE(V) Thus the V-I characteristics of a photo-transistor was determined. Outcome: On completion of the experiment, student will be able to: 1. analyze the characteristics of phototransistor. 2. analyze the forward bias characteristics. Application: Opto-isolators Viva-voce 1. In what sense does the photo transistor differs from a rectifier diode? 2. In which region does the photo transistor operates? 3. Draw the basic arrangement of biasing of a phototransistor. 4. What is meant by dark resistance in photo transistor? 5. Differentiate between photo diode and phototransistor. 6. What are the various types of luminescence? 7. Define Photoluminescence 8. Define Hybrid Parameters 9. What is the use of h-parameters?

55 10. Which is the most commonly used transistor configuration? 49 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

56 Exp. No. 12: STUDY OF LIGHT ACTIVATED RELAY CIRCUIT Aim: To study the working of light activated relay circuit Apparatus required: Theory: Sl. No. Description Range Quantity 1 Regulated Power Supply 1 2 Photo-Diode 1 3 Transistor 1 4 Relay 1 5 Variable Resistor 1 6 Resistor 1 7 LED 1 8 Incandescent Lamp Bread board Connecting Wires as required 1. Relay is a protective device used in the circuit to isolate the circuit from damage to occur due to short circuit, over voltage etc. 2. The isolation is automatic, disconnecting the supply from the faulty section leaving the healthier section in operation. 3. Photodiode in the circuit is used as photoconductive device. 4. When no light is incident on photodiode, the base current is supplied by the potentiometer and the transistor is forward biased. 5. The relay coil is energized and the LED glows. 6. When light is incident on the photodiode, the diode current increases to a certain level. 50 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

57 7. The drop across base and emitter of transistor is not sufficient to forward bias the base-emitter junction of transistor. Thus the relay is de-energized when the incident light on the photodiode is raised to a particular level, thereby turns off the LED. Circuit diagram: Result: Thus the working of light activated relay circuit was studied successfully. Outcome: On completion of the experiment, student will be able to: 1.understand the working of photodiode. 2.understand the working of relay circuit. Application: This light sensitive circuit can operate a relay to switch on lamps or any AC loads when it senses darkness. It is ideal to use as switch less night lamps driver. LDR is used as the light sensor.... When the intensity of light reduces, LDR offers more resistance and more current passes to the base of T1 and it conducts. 1. What is a light activated relay? 2. How will the light level be measured? Viva-voce 3. How will the relay be released back when there is a need? 4. Which type of transistor configuration is used in relay circuit? 5. How can the sensitivity of circuit increased?

58 6. How is the intensity of light related to resistance offered by LDR? 7. Which component is used as a light sensor? 8. What are the various applications of light sensitive circuits? 51 Format No.: DCE/Stud/LM/34/Issue:00/Revision:01

59 Exp. No.13: DESIGN AND TESTING OF RC PHASE SHIFT OSCILLATOR Aim: To design and construct a RC phase shift oscillator for the given frequency (f0). Apparatus required: Sl. No. Description Range Quantity 1 Regulated Power Supply 2 Transistor 3 Resistor 4 Capacitor 5 Variable Resistor 6 Function Generator 7 CRO 8 Bread board Connecting Wires as required Theory: In the RC phase shift oscillator, the required phase shift of 180 in the feedback loop from the output to input is obtained by using R and C components, instead of tank circuit. Here a common emitter amplifier is used in forward path followed by three sections of RC phase network in the reverse path with the output of the last section being returned to the input of the amplifier. The phase shift Ф is given by each RC section Ф=tanˉ1 (1/ωRC). In practice R-value is adjusted such that Ф becomes 60. If the value of R and C are chosen such that the given frequency for the phase shift of each RC section is 60. Therefore at a specific frequency the total phase shift from base to transistor s around circuit and back to base is exactly 360 or 0. Thus the Barkhausen criterion for oscillation is satisfied. Design: Vcc=12v, Ic=1mA, β=100,re = 560 Ω Vce=Vcc/2=6V, Vre=0.1Vcc=1.2V Vb=Vre+0.7=1.9V, R1=Vcc/10Ib R2 =12/(10*20μA) 10 K =47 K Ω 52 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

60 R2=Vb/10Ib =.9/(10*20μA)=9.5K Ω=10 K Ω Rc=Vcc-Vce-(IeRe/Ic) =2.4 K Ω =2.2 KΩ Circuit diagram: Precautions: 1. All the connections should be correct. 2. Parallax error should be avoided while taking readings from analog meters. Procedure: 1. Connect as per circuit diagram. 2. Connect CRO output terminals and observe the waveform. 3. Calculate practically the frequency of oscillations by using the expression f = 1 / T where ( T= Time period of the waveform) 4. Repeat the above steps 2, 3 for different values of L, and note down the practical values of oscillations of the RC-phase shift oscillator. 5. Compare the values of oscillations both theoretically and practically. 53 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

61 Observation: Theoretical Practical Frequency (Hz) f =1/2 πrc (6+4RC/R) Model graph: Result: Thus a RC phase shift oscillator was designed and tested successfully. Outcome: On completion of the experiment, student will be able to: 1. calculate time constant for any circuit. 2. calculate the frequency of oscillation of tuned circuits. Application: Local oscillator for synchronous receivers, study purposes, musical instruments. 54 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

62 1. What is an Oscillator circuit? Viva-voce 2. What are the classifications of Oscillators? 3. State the frequency for RC phase shift oscillator. 4. What are the types of feedback oscillators? 5. What is the minimum value of hfe for the oscillations in transistorized RC Phase shift oscillator? 6. What is the frequency of oscillation of Wein bridge? 7. What do phase shift oscillator, twin- T oscillator and Wein bridge oscillator have in common? 8. When will the stability of frequency of oscillation be high? 9. What is the primary advantage of RC phase shift oscillator? 10. What type of stability does an oscillator circuit using quartz crystal offer? 11. State the condition to get constant amplitude oscillation in a feedback oscillator circuit. 12. What type of crystal does a crystal oscillator have? 13. State the condition for sustained oscillation in a RC phase shift oscillator using FET. 14. What is the value of angular frequency of oscillation in a RC phase shift oscillator using FET? 54 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

63 Exp. No. 14: DESIGN AND TESTING OF LC PHASE SHIFT OSCILLATOR (COLPITT S OSCILLATOR) Apparatus required: Theory: Sl. No. Description Range Quantity 1 RPS 1 2 Transistor 1 3 Resistor one each 4 Capacitor 2,2,1 5 Decade Inductance Box (DIB) one each 6 Decade Resistance Box (DRB) 1 7 Cathode Ray Oscilloscope (CRO) Bread board Connecting Wires as required The tank circuit is made up of L1,C4 and C5.The resistance R2 and R3 provides the necessary biasing. The capacitance C2 blocks the DC component. The frequency of oscillations is determined by the values of L1,C4 and C5, and is given by f = 1 / (2 (CT L1) 1/2 ) Where CT = C1C2 / ( C1 + C2) The energy supplied to the tank circuit is of correct phase. The tank circuit provides 1800 out of phase. Also the transistor provides another 1800 out of phase. In this way, energy feedback to the tank circuit is in phase with the generated oscillations. Circuit diagram: 55 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

64 Precaution: 1. All the connections should be correct. 2. Parallax error should be avoided while taking readings from analog meters. Procedure: 1. Connections are made as per circuit diagram. 2. Connect CRO output terminals and observe the waveform. 3. Calculate practically the frequency of oscillations by using the expression f = 1 / T where ( T= Time period of the waveform). 4. Repeat the above steps 2,3 for different values of L, and note down the practical values of oscillations of Colpitt s Oscillator. 5. Compare the values of oscillations both theoritically and practically. Observation: Inductance Theoretical Frequency Practical Frequency ( mh ) ( Hz ) ( Hz ) Model graph: Result: Thus the frequency of oscillations of Colpitt s oscillator was calculated and tested successfully. 56 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

65 Outcome: On completion of the experiment, student will be able to: 1. analyze tank circuit. 2. Calculate frequency of oscillation of tuned circuits. Application: Local oscillator for synchronous receivers, study purposes, musical instruments. 1. What is LC oscillator? 2. How does an oscillator differ from an amplifier? 3. Name two low frequency oscillators? 4. What are the classifications of Oscillators? Viva-voce 5. State the frequency for LC phase shift oscillator? 6. Who invented Colpitt s Oscillator? 7. What are the various means of realization of Colpitt s oscillator? 8. How does a Colpitt s oscillator differ from Hartley oscillator? 9. Define Tank Circuit 10. How is frequency of oscillations determined? 11. State few applications of Colpitt s oscillator. 12. State the typical operating range of Colpitt s oscillator. 13. What is the role of decoupling capacitor? 14. How is energy loss in the tank circuit compensated? 15. What is the total phase shift that occurs in Colpitt s oscillator? 57 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

66 Exp.No.15: Aim: SINGLE PHASE HALF-WAVE RECTIFIERS WITH CAPACITIVE FILTER To construct a half wave rectifier using diode with capacitive filter and to draw its output waveform Apparatus required: Theory: Sl. No. Description Range Quantity 1 Diode 1 2 Capacitor 1 3 Resistor 1 4 Transformer 1 5 CRO Bread board Connecting Wire as required During positive half-cycle of the input voltage, the diode D1 is in forward bias and conducts through the load resistor R1. Hence the current produces an output voltage across the load resistor R1, which has the same shape as the positive half cycle of the input voltage. During the negative half cycle of the input voltage, the diode is reverse biased and there is no current through the circuit. i.e, the voltage across R1 is zero. The net result is that only the positive half cycle of the input voltage appears across the load. The average value of the half wave rectified output voltage is the value measured on DC voltmeter. For practical circuits, transformer coupling is usually provided for two reasons. 1. The voltage can be stepped-up or stepped-down, as needed. 2. The AC source is electrically isolated from the rectifier. Thus, preventing shock hazards in the secondary circuit. 58 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

67 Circuit diagram: Precaution: 1. All the connections should be correct. 2. Parallax error should be avoided while taking readings from analog meters. Procedure: 1. Connections are made as per the circuit diagram. 2. Connect the primary side of the transformer to ac mains and the secondary side to the rectifier input. 3. Using multimeter, measure the AC input voltage of the rectifier and DC voltage at the output of the rectifier. 4. Find the theoretical of dc voltage by using the formula, Vdc =Vm / π where Vm=2Vrms, (Vrms= output AC voltage.) 5. The Ripple factor is calculated by using the formula r = AC output voltage / DC output voltage. Regulation characteristics: 1. Connections are made as per the circuit diagram. 2. By increasing the value of the rheostat, the voltage across the load and current flowing through the load are measured. 3. The reading is tabulated 4. Draw a graph between load voltage (VL and load current ( IL ) taking VL on X-axis and IL on y- axis. 5. From the value of no-load voltages, the percentage regulation can be calculated using the formula. 59 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

68 Observation: Without Filter USING DMM Vac(v) Vdc(v) r= Vac/ Vdc With Filter USING DMM Vac(v) Vdc(v) r= Vac/ Vdc Without filter Vdc=Vm / π, Vrms=Vm / 2, Vac= ( Vrms2- Vdc 2) USING CRO Vm(v) Vac(v) Vdc(v) r= Vac/ Vdc With filter USING DMM V1(V) V1(V) Vdc= Vac= R = USING CRO V1(V) V2(V) (V1+V2) / 2 (V1- V2)/2 3 Vac/ Vdc 60 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

69 Calculation: Vac = Vdc = Ripple factor without Filter = Ripple factor with Filter = Model graph: With filter: Result: 1. The Ripple factor for the Half-Wave Rectifier with and without filters was measured. 2. The % regulation of the Half-Wave rectifier was calculated. Outcome: On completion of the experiment, student will be able to: 1. understand the concepts of rectification. 2. differentiate the output waveforms with and without filters. 61 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

70 Application: Local oscillator for synchronous receivers, study purposes, musical instruments. Viva-voce 1. What are the advantages of bridge rectifier over centre-taped full wave rectifier? 2. Define - Transformer Utilization Factor. What is the TUF for half wave rectifier? 3. Give the expression for ripple factor of half wave rectifier? 4. What are the different types of filter circuits? 5. What is the PIV of half wave rectifier? 6. What is the mean value of half wave rectified sine wave? 7. What is the form factor for half wave rectified sine wave? 8. A half-wave rectifier circuit with a capacitive filter is connected to 200 Volts, 50 Hz ac line. What will be the output voltage across the capacitor? 9. What is a thyratron? 10. What is the thyristor equivalent of a thyratron tube? 11. What is a Silicon Controlled Rectifier? 12. For a waveform peakier than a sine wave, the form factor will be. 13. State the necessary condition for triggerring Thyristors. 14. Why pulse triggering is preferred over DC triggering? 15. Number of diodes required to construct a half wave rectifier: 62 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

71 Exp.No.16: SINGLE PHASE FULL-WAVE RECTIFIERS WITH CAPACITIVE FILTER Aim: To construct a full wave rectifier using diode with capacitive filter and to draw its output waveform Apparatus required: Sl. No. Description Range Quantity 1 Diode 2 2 Capacitor 1 3 Resistor 1 4 Transformer 1 5 CRO Bread board Connecting Wire as required Theory: The conversion of AC into DC is called Rectification. Electronic Devices can convert AC power into DC power with high efficiency. The full-wave rectifier consists of a center-tap transformer, which results in equal voltages above and below the center-tap. During the positive half cycle, a positive voltage appears at the anode of D1 while a negative voltage appears at the anode of D2. Due to this diode D1 is forward biased it results in a current ID1 through the load R. During the negative half cycle, a positive voltage appears at the anode of D2 and hence it is forward biased, resulting in a current ID2 through the load at the same instant a negative voltage appears at the anode of D1 thus reverse biasing it and hence it doesn t conduct. Ripple Factor: Ripple factor is defined as the ratio of the effective value of AC components to the average DC value. It is denoted by the symbol r. 63 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

72 Rectification Factor: The ratio of output DC power to input Ac power is defined as efficiency. Ƞ = (Vdc) 2 / (Vac) 2 = 81%(if R >> Rf, then Rf can be neglected) Percentage of Regulation: It is a measure of the variation of AC output voltage as a function of DC output voltage. Percentage of regulation = {( VNL VFL ) / VFL} * 100 % where, VNL = Voltage across load resistance, when minimum current flows through it VFL= Voltage across load resistance, when maximum current flows through. For an ideal Full-wave rectifier, the percentage regulation is 0 percent. The percentage of regulation is very small for a practical full wave rectifier. Peak Inverse Voltage (PIV): It is the maximum voltage that has to be withstood by a diode when it is reverse biased. PIV = 2Vm Circuit diagram: 64 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

73 Precaution: 1. All the connections should be correct. 2. Parallax error should be avoided while taking readings from analog meters. Procedure: 1. Connect the circuit as shown in the circuit diagram. 2. Connect the primary side of the transformer to AC mains and the secondary side to rectifier input. 3. Using a CRO, measure the AC input voltage of the rectifier, AC and DC voltage at the output of the rectifier. 4. Observe the waveforms at the secondary windings of transformer and across load resistance. Observation: Sl. No. Input Voltage (V) Output Voltage (V) Calculations: 1. Ripple Factor: R = Vac / Vdc 2. Efficiency: Ƞ = 1 / (2 3fCR) 3. Percentage Regulation: {( VNL VFL ) / VFL} * 100 % Model graph: 65 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

74 Result: Thus the characteristics of full wave rectifier were studied. Outcome: On completion of the experiment, student will be able to: 1. understand the concepts of rectification. 2. differentiate the output waveforms with and without filters. Application: Power supplies and as detectors of radio signals Viva-voce 1. What are the different types of filter circuits? 2. Give the expression for ripple factor of full wave rectifier. 3. What is the PIV of full wave rectifier? 4. What is the transformer utilization factor of full wave rectifier? 5. Differentiate full wave rectifier from half wave rectifier. 6. What is the mean value of full wave rectified sine wave? 7. What is the form factor for full wave rectified sine wave? 8. What is the rms value of full wave rectified sine wave? 9. What will be the the ripple factor of a full-wave rectifier circuit compared to that of a half wave rectifier circuit without filter? 10. The RMS value of a half wave rectifier current is 10 A. Its value for full wave rectification would be. 11. For single phase supply frequency of 50 Hz, ripple frequency in full wave rectifier is. 12. Compare bridge configuration with mid-point configuration. 13. State the advantage of bridge configuration. 14. State the drawbacks of bridge configuration. 15. State the advantage of mid-point configuration. 16. Number of pulses generated per cycle for a full wave rectifier: 17. What is the average value of output voltage of full wave converter? 18. Define Peak Inverse Voltage 19. What will be the turn-on time for normal SCRs? 20. Define Cut-in voltage

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76 Exp. No. 17: ASTABLE MULTIVIBRATOR Aim: To construct and study the operation of astable multivibrator using 555 timer Apparatus required: Theory: Sl. No. Description Range Quantity 1 IC 1 2 Resistor 1 3 Capacitor 1 4 Bread board 1 5 Connecting wires as required 6 Cathode ray oscilloscope 1 The 555 timer can be used with supply voltage in the range of + 5 V to + 18 V and can drive up to 200 ma. It is compatible with both TTL and CMOS logic circuits because of the wide range of supply voltage the 555 timer is versatile and easy to use in the astable multivibrator. The timer is oscillated between two threshold levels 1/3 Vcc and 2/3 Vcc in order to generate a square wave form. No external signal source is required for such generation and hence this is called as a free running multivibrator. Circuit diagram: 67 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

77 Precaution: 1. All the connections should be correct. 2. IC pin connections should be checked properly. Procedure: 1. Connections are made as per the circuit diagram. 2. Pins 4 and 8 are shorted and connected to power supply Vcc (+5 V) 3. Between pins 8 and 7 resistor R1 of 10 kω is connected and between 7 and 6 resistor R2 of 4.7 kω is connected. Pins 2 and 6 are short circuited. 4. In between pins 1 and 5 a Capacitor of 0.01µF is connected. 5. The output is connected across the pin 3 and GND. 6. In between pins 6 and GND, a Capacitor of 0.1µF is connected. 7. Theoretically, charging time Tc is given bytc=0.69(r1+r2) C1, Discharging time Td is given by Td= 0.69R2C1. The frequency f is given by f= 1.45/(R1+2R2)C1. The percentage of duty cycle is (Tc/(Tc+Td))* Practically Td and Tc are measured and wave forms are noted and theoretical values are verified with practical values. 9. Connect diode between pins 7 and Theoretically with diode connected charging time is given by Tc=0.69R1C1. Discharging time is given by Td=0.69R2C Practically Td and Tc are noted and verified with theoretical values. Observation: Sl. No. Charging Time (Tc) Discharging Time (Td) Theoritical Practical Theoritical Practical Calculation: 1. ton=0.69(r1+r2)c 2. toff = 0.69 R2C 3. T = ton +toff 68 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

78 4. % Dutycycle = ton / (ton+toff) * 100 Model graph: Result: The obtained value of duty cycle = % Output waveforms of astable multivibrator was observed and the duty cycle was calculated and the practical value was found to be equal to the theoretical value. Outcome: On completion of the experiment, student will be able to: 1. handle 555 timer IC with ease. 2. realize the charging and discharging of capacitors in multivibrator circuit. Application: Morse code generators, timers, and systems that require a square wave, including television broadcasts and analog circuits.

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80 Viva-voce 1. What are the other names of astable multivibrator? 2. Define - Quasi Stable State 3. Explain charging and discharging of capacitors in an astable multivibrator? 4. How can an astable multivibrator be used as VCO? 5. What are the applications of astable multivibrator? 6. Give the free running frequency of astable multivibrator. 7. How to obtain symmetrical waveform in astable multivibrator? 8. What is the function of the comparators in the 555 timer circuit? 9. What happens when the capacitor charges? 10. Define Duty Cycle 11. A 22 kω resistor and a 0.02-μF capacitor are connected in series to a 5-V source. How long will it take the capacitor to charge to 3.4 V? 12. What does the discharge transistor do in the 555 timer circuit? 13. What are the advantages of multivibrator circuits? 14. The internal circuitry of the 555 timer consists of, an R-S flip-flop, a transistor switch, an output buffer amplifier, and a voltage divider. 15. What are the requirement of astable multivibrator circuit? 16. Differentiate monostable multivibrator from astable multivibrator. 17. What is the difference between an astable multivibrator and a monostable multivibrator? 18. Define - thi and tlo 19. The output of astable multivibrator constantly switches between two states Justify 20. What controls the output pulse width of a one shot? 21. State the condition to obtain 50% duty cycle in an astable 555 timer circuit. 70 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

81 Exp. No. 18: MONOSTABLE MULTIVIBRATOR Aim: To construct and study the operation of monostable multivibrator using 555 timer Apparatus required: Sl. No. Description Range Quantity 1 IC Resistor 10 kω 1 3 Capacitor 0.1µF,0.01µF 1 4 Bread board Connecting wires as required 6 Cathode ray oscilloscope (0-20)MHz 1 Theory: Monostable multivibrator is also known as triangular wave generator. It has one stable and one quasi stable state. The circuit is useful for generating single output pulse of time duration in response to a triggering signal. The width of the output pulse depends only on external components connected to the op-amp. The diode gives a negative triggering pulse. When the output is +Vsat, a diode clamps the capacitor voltage to 0.7 V. Then, a negative going triggering impulse magnitude Vi passes through R, C and the negative triggering pulse is applied to the positive terminal. Let us assume that the circuit is in stable state. The output V0 is at +Vsat. The diode D1 conducts and Vc the voltage across the capacitor C gets clamped to 0.7 V. The voltage at the positive input terminal through R1R2 potentiometer divider is +ßVsat. Now, if a negative trigger of magnitude Vi is applied to the positive terminal so that the effective signal is less than 0.7 V. The output of the Op-Amp will switch from +Vsat to Vsat. The diode will now get reverse biased and the capacitor starts charging exponentially to Vsat. When the capacitor charge Vc becomes slightly more negative than ßVsat, the output of the op-amp switches back to +Vsat. The capacitor C now starts charging to +Vsat through R until Vc is 0.7 V. V0= Vf +(Vi - Vf ) е -t/rc ß = R2 / (R1+R2) If Vsat>> Vp, R1=R2 and ß = 0.5, then, T = 0.69 RC 71 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

82 Circuit diagram: Precaution: 1. All the connections should be correct. 2. Do not switch on the power supply unless you have checked the circuit connections as per the circuit diagram. Procedure: 1. Connections are made as per the circuit diagram. 2. Negative triggering is applied at the terminal The output voltage is measured by connecting the channel-1 at pin3. 4. The output voltage across capacitor is measured by connecting the channel-2 at the pin Theoretically the time period is calculated by T= 1.1R1C1, where R1= 10 kω C1=0.1µF. 6. Practically the charging and discharging timers are measured. 72 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

83 Observation: Sl. No. Charging Time (Tc) Discharging Time (Td) Theoritical Practical Theoritical Practical Model graph: Result: The obtained value of time constant = ms The output Waveforms of monostable multivibrator were observed and time constant was calculated and the practical value was found to be equal to the theoretical value. Outcome: On completion of the experiment, student will be able to: 1. handle 555 timer IC with ease. 2. realize the charging and discharging of capacitors in multivibrator circuit. Application: Monostable vibrators are used in analog systems to control an output signal frequency. Synchronize the line and frame rate of television broadcasts.

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85 Viva-voce 1. What is a multivibrator? 2. Why is monostable multivibrator called so? 3. What is the principle of monostable multivibrator? 4. How does a monostable multivibrator work in terms of astable multivibrator? 5. Mention the applications of multivibrator. 6. How many number of stable states a monostable 555 timer has? 7. In a typical IC monostable multivibrator circuit, at the falling edge of the trigger input, the output switches HIGH for a period of time determined by the. 8. What is the difference between a retriggerable one shot and a nonretriggerable one shot? 9. Triggering a retriggerable one shot during pulse generation will: 10. The monostable multivibrator circuit is not an oscillator Justify 11. A retriggerable one shot has a pulse of 10 ms. 3 ms after being triggered, another trigger pulse is applied. The resulting output pulse will be ms. 12. State the characteristics of a retriggerable monostable multivibrator. 13. When does the pulse width of a one-shot multivibrator increase? 14. How to overcome mistriggering on the positive pulse edges in the monostable circuit? 15. A monostable multivibrator has R = 120 kω and time delay T = 1000 ms, calculate the value of C? 16. A 555 timer in monostable application mode can be used for. 17. How can a monostable multivibrator be modified into a linear ramp generator? 18. How does a monostable multivibrator used as frequency divider? 19. How many quasi-stable state does a monostable multivibrator have? 20. On what parameter does the frequency of oscillation of monostable multivibrator depend? 21. In a monostable multivibrator, a single narrow pulse produces a single pulse. 22. What are the applications of Schmitt trigger circuit? 23. Compare astable multivibrator with monostable multivibrator. 24. What are the applications of monostable multivibrator? 25. With most monostable multivibrators, what is the Q output when no input trigger has occurred? 74 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

86 Exp. No. 19: DIFFERENTIAL AMPLIFIER USING FET Aim: To design a differential amplifier using JFET and also, determine the CMRR of the amplifier Apparatus required: Sl. No. Apparatus Range Type Quantity 1 JFET Function Generator CRO Dual RPS Resistor - 1, 2 6 Bread Board Theory: 1. A differential amplifier is a voltage amplifier that amplifies the difference between the two input signals. 2. It is widely used in analog integrated circuits, because of its good bias stability, high voltage gain and high input impedance. 3. The basic characteristic of differential amplifier is that, it is DC-coupled and avoids the use of large bypass capacitors. 4. FET differential amplifier has higher input impedance than BJT differential amplifier. 5. The differential amplifier is said to operate in common-mode configuration when same voltage is applied to both the input terminals. 6. The ability of differential amplifier to reject a common-mode signal defined by its commonmode Rejection Ratio (CMRR). 7. CMRR is expressed as the ration of differential gain to the common-mode gain. 75 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

87 Circuit diagram: Fig. 1 Differential Mode Gain Fig. 2 Common Mode Gain 76 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

88 Precaution: 1. All the connections should be correct. 2. Do not switch on the power supply unless you have checked the circuit connections as per the circuit diagram. Procedure: 1. Connections are made as per the circuit diagram. 2. The input sine wave signal with appropriate amplitude from the function generator is fed to the circuit. 3. The output is viewed in the CRO and the corresponding differential gain is calculated. 4. The frequency of the input signal is varied and the output signal gain is tabulated for different frequencies. 5. A frequency Vs Gain (db) plot using semilog sheet is plotted and the bandwidth of the given amplifier is calculated from the plot. 6. Connect the circuit as shown in fig Apply input signal and observe the output using CRO. 8. Calculate the common-mode gain. 9. Calculate CMRR of the amplifier. Observation: Differential Mode Gain Input voltage, Vs = mv Input frequency Ad = 20 log (Gain) Output voltage, Gain = Vo db (Hz) Vo Vs Common Mode Gain Input voltage, Vs =mv Input frequency Output voltage, Vo Gain = Vo (Hz) (volts) Vs Ac = 20 log (Gain) db 77 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

89 Calculation: Result: Thus the differential amplifier using JFET was designed and also CMRR of the amplifier was determined. The CMRR value of the amplifier is. Outcome: On completion of the experiment, student will be able to: 1. handle JFET with ease. 2. construct and realize a differential amplifier under various modes. Application: op-amp follower, non-inverting amplifier, Viva-voce 1. What is a differential amplifier? 2. Give the applications of differential amplifier. 3. In a differential amplifier, VCC VEE. Why? 4. State the different configurations of differential amplifier. Which one is commonly used? 5. Give the main advantage of constant current bias over emitter bias. 6. A Differential Amplifier should have collector resistor s value (RC1 & RC2) as : 7. What is the purpose of differential amplifier? 8. The value of emitter resistance in Emitter Biased circuit are RE1=25 kω & RE2=16 kω. Find RE. 9. If output is measured between two collectors of transistors, then the Differential amplifier with two input signal is said to be configured as. 10. A differential amplifier is capable of amplifying both AC and DC signal. Justify 11. An emitter bias Dual Input Balanced Output differential amplifier has VCC=20 V, β=100, VBE=0.7 V, RE=1.3 kω. Find IE. 12. Find IC, given VCE=0.77 V, VCC=10 V, VBE=0.37 V and RC=2.4 kω in Dual Input Balanced Output differential amplifier. 13. Name the terminals of JFET.

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91 Exp. No. 20: REALIZATION OF PASSIVE FILTERS Aim: To determine experimentally the frequency response of low pass and high pass filters and note down the cut off frequency Apparatus requirement: Theory: High pass filter: Sl. No. Name of the Apparatus Range Quantity 1. Function Generator CRO Resistor 1 4. Capacitor 1 5. Inductor 1 6. Breadboard Connecting wires - As required This filter allows only high frequency of AC voltage and rejects the low frequency components at the output. We know that Xc < 1/f (Reactance is inversely proportional to the frequency). At low frequency, reactance is very high so it does not allow any signal at the output. At high frequency, reactance is very low so it does not allow the entire signal at the output. Low pass filter: This filter allows only low frequency of AC voltage and rejects the high frequency components at the output. We know that Xc < f (Reactance is directly proportional to the frequency). At low frequency, reactance is very low so it does not allow the entire signal at the output. At high frequency, reactance is very high so it does not allow any signal at the output. 79 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

92 Circuit diagram: Fig..1 High Pass Filter Fig. 2 Low Pass Filter Precaution: 1. All the connections should be correct. 2. Do not switch on the power supply unless you have checked the circuit connections as per the circuit diagram. 80 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

93 Procedure: 1. The circuit connections are made as per circuit diagram. 2. Switch on the power supply and increase the input frequency in steps of 100 Hz and note down the corresponding output voltage in the voltmeter. 3. Calculate the gain value. 4. Draw the graph between frequency Vs gain. Observation: High Pass Filter S.No Input Voltage Frequency Output Voltage Gain = 20log(V0/Vin) Low Pass Filter S.No Input Voltage Frequency Output Voltage Gain = 20log(V0/Vin) Model graph: Fig. 3 High Pass filter Fig. 4 Low Pass filte 81 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

94 Simulation circuit : Fig. 5 Multisim Circuit High Pass filter Fig. 6 Low Pass filter Fig.7 Miltisim High Pass filter output Fig.8 Miltisim Low Pass filter output Result: Outcome: Thus the low pass and high pass filter was designed successfully. On completion of the experiment, student will be able to: 1. design and simulate low pass and high pass filter. 2. understand the impact of frequency on the circuit reactance.

95 Application: Amplifiers, oscillators and power supply circuits 82 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

96 Viva-voce 1. What is an ideal low pass filter? 2. What is the difference between an ideal and a practical low pass filter? 3. What is high-pass filter? 4. What are passive filters? 5. What is a band pass filter? 6. In a certain parallel resonant band-pass filter, the resonant frequency is 14 khz. If the bandwidth is 4 khz, the lower frequency is. 7. In a series resonant band-pass filter, a lower value of Q results in. 8. The maximum output voltage of a certain low-pass filter is 15 V. The output voltage at the critical frequency is. 9. In a certain low-pass filter, fc = 3.5 khz. If the input voltage is a 6 V sine wave with a DC level of 10 V, what is the output voltage magnitude? 10. At a certain frequency, the output voltage of a filter is 6 V and the input is 12 V, the filter s bandwidth is. 11. In a certain low-pass filter, fc = 3.5 khz. Its pass band is. 12. At a certain frequency, the output voltage of a filter is 6 V and the input is 12 V. The voltage ratio in decibels is. 13. An RL low-pass filter consists of a 5.6 mh coil and a 3.3 kω resistor. The output voltage is taken across the resistor. The circuit's critical frequency is. 14. An RL high-pass filter consists of a 470 Ω resistor and a 600 mh coil. The output is taken across the coil. The circuit's critical frequency is. 15. An RC low-pass filter consists of a 120 Ω resistor and a μf capacitor. The output is taken across the capacitor. The circuit's critical frequency is. 16. In a certain low-pass filter, fc = 3.5 khz. Its pass band is. 17. An RC high-pass filter consists of an 820 Ω resistor. What is the value of C so that Xc is ten times less than R at an input frequency of 12 khz? 18. Define Quality Factor 19. What is the range of quality factor for band pass filter? 20. What do you mean by order of filter? 21. What is the importance of higher order filter? 83 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

97 Exp. No. 21: STUDY OF CRO FOR FREQUENCY AND PHASE MEASUREMENT Aim: To measure the phase difference & frequency using CRO Apparatus required: Sl. No. Component name Quantity 1. CRO 1 2. Signal Generator 1 3. Patch Cords 3 Theory: 1.1 Measurement of Voltage Using CRO : A voltage can be measured by noting the Y deflection produced by the voltage; using this deflection in conjunction with the Y-gain setting, the voltage can be calculated as follows : V = ( no. of boxes in cm. ) * ( selected Volts/cm scale ) 1.2 Measurement of Current and Resistance Using a CRO : Using the general method, a correctly calibrated CRO can be used in conjunction with a known value of resistance R to determine the current I flowing through the resistor. 1.3 Measurement of Frequency Using a CRO : A simple method of determining the frequency of a signal is to estimate its periodic time from the trace on the screen of a CRO. However, this method has limited accuracy and should only be used where other methods are not available. To calculate the frequency of the observed signal, one has to measure the period, i.e. the time taken for 1 complete cycle, using the calibrated sweep scale. The period could be calculated by, T = ( no. of squares in cm) * ( selected time/cm scale ) Once the period T is known, the frequency is given by, f (Hz) = 1/T(sec) 84 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00

98 1.4. Measurement of Phase : The calibrated time scales can be used to calculate the phase shift between two sinusoidal signals of the same frequency. If a dual trace or beam CRO is available to display the two signals simultaneously ( one of the signals is used for synchronization), both of the signals will appear in proper time perspective and the amount of time difference between the waveforms can be measured. This, in turn can be utilized to calculate the phase angle θ, between the two signals. θ phase shift in cm. -one period in cm- Fig.1 Phase shift between two signals Referring to fig.1, the phase shift can be calculated by the using the formula, The frequency relationship between the horizontal and vertical inputs is given by, fh = fv No. of tangencies ( vertical) No. of tangencies (horizontal) from which fv, the unknown frequency can be calculated. 85 Format No.: DCE/Stud/LM/34/Issue:00/Revision:00