dspic Analogue to Digital Converter

Transcription

1 dspic Analogue to Digital Converter The dspic30f4012 has a 10-bit successive approximation architecture ADC on board and provides maximum sampling rate of 1 Msps. The ADC module has 6 analogue inputs which are multiplexed into four sample and hold amplifiers. The output of the sample and hold is the input into the converters which generates the result. The analogue reference votages are software selectable to either the device supply voltage(av DD /AV SS ) or the voltage level on (V REF+ /V REF- ) pins. some of ADC types a ) ramp or stair case converter End of Conversion V in + - Gated Cock Clock Start of Conversion N-bit Counter B0(LSB) B1 B N-1 (MSB) DAC V REF b ) Successive Approximation Ring Counter Clock Start of Conversion V in S/H + - Control logic & SAR End of Conversion B0(LSB) B1 B N-1 (MSB) DAC V REF c) Parrallel(Flash) ADC : Very fast and requires 2 N comparators. d) Single Slope and Double Slope ADC:Uses a capacitor and a comparator to measure charging (single) and discharging(double) time. ENG721-S2 Mixed Signal Processing : Hassan Parchizadeh Page 1

2 Scaling Circuit Suppose that a transducer output voltage ranges from 0 V to 200 mv and the ADC on the dspic is set to read voltages in the range of 0 V to 5 V. If the ADC is connected to the transducer directly, then the ADC range from 0.2 V to 5 V is not being used and on top that with the resolution of 5 V /2 10 just about 5 mv, we can have about 40 different readings. To improve on this we can either reduce the reference voltage or use a scaling circuit which also takes care of the impedence of the transducer. Example : The output of a transducer is in the range of 0 to 250 mv. Design an appropriate scaling circuit to increase this range to 0 to 5 volts for the dspic ADC. (1 + R f /R i ) =5 V / 250 mv = 20 therefore R f /R i = 19 Choose R i = 1 KΩ and R f = 19 KΩ Volatge Translation Circuit( level shifting and scaling ) Some transducer output voltage ranges could be in the range of V low to V high where V low can even be negative. The accuracy of the ADC can be improved by using circuits that shift and scale the transducer output to the full range of ADC. Before introducing this circuit, we look at the individual circuit which make this circuit up. Summer Ciruit ENG721-S2 Mixed Signal Processing : Hassan Parchizadeh Page 2

3 Inverter Ciruit And the final circuit Example : The output of a transducer is in the range of -2 to +1V. Design an appropriate level shifting and scaling circuit to increase this range to 0 to 5 volts for the dspic ADC. V adc = (R f /R 1 )V Sensor - (R f /R 2 )V Ref When V adc = 0 V = (R f /R 1 )(-2) - (R f /R 2 ) )( -5 V ) gives R 2 = 2.5R 1 Let R 1 =1 KΩ, and R 2 =2.5 KΩ, When V adc = 5 V = (R f /R 1 )(1) - (R f /R 2 )V Ref Choosing V Ref = -5 V, R= 1 KΩ, 5 V = (R f /1 KΩ)(1) - (R f /2.5 KΩ)( -5 V ) gives R f = 1.67 KΩ ENG721-S2 Mixed Signal Processing : Hassan Parchizadeh Page 3

4 See dspic 10-bit ADCBlock Diagram these in data sheet. ADC Result Buffer The module contains a buffer to hold the results of the ADC. The buffer is a 16- word, dual port, read-only, 10-bits wide and is called ADCBUF0..ADCBUFF. This buffer can not be modified by user software and only holds the results of the ADC conversions. Control Registers The AD module has six Control and Status registers. These are (CHannel Select register) Sampling and Conversion time Diagram below shows the basic conversion sequence. ENG721-S2 Mixed Signal Processing : Hassan Parchizadeh Page 4

5 A sampling of the analogue voltage is performed by sample and hold amplifiers which are called S/H channels. The 10-bit A/D converter has four S/H channels, called CH0-CH3. The sampling time is the time taken to connect S/H amplifier to the analogue input pin. The conversion time is the time required for the A/D converter to convert the S/H amplifier voltage. A/D converter requires one A/D clock cycle(t AD ) to convert each bit of the result plus one additional clock cycle. A total of 12 T AD cycles are required to perform the complete conversion. Selecting the A/D Conversion Clock The A/D converter has a maximum rate at which conversion may be completed. The A/D conversion requires 12 T AD. The A/D clock is derived from the device clock source. The period of A/D conversion is software selectable using ADCON3<5:0>(ADCS<>5:0) which gives 64 possibile options for T AD. TCY ( ADCS 1) 2TAD TAD... or... ADCS 1 2 TCY For correct A/D conversion, the A/D conversion clock (T AD ) must be selected to ensure a minimum T AD time of ns. A/D sampling requirements For proper functioning of the A/D converter the total sampling time should take into acount the sample/hold amplifier settling time, holding capacitor charge time, and temperature. The analogue input model of the 10-bit A/D converter is shown below:- ENG721-S2 Mixed Signal Processing : Hassan Parchizadeh Page 5

6 For the A/D converter to meet its specified accuracy, the charge holding capacitor (C HOLD ) must be allowed to fully charge to the voltage level on the analogue input pin. The source impedance (R S ), the interconnect impedance (R IC ) and internal sampling switch (R SS ) impedance combine to directly affect the time required to charge the capacitor C HOLD. Furthermore, the sampling switch impedance (R SS ) varies with the device supply voltage V DD. To avoid exceeding the limit of the sampling time and to minimize the effects of pin leakage currents on the accuracy of the A/D converter, the maximum recomended source impedance (R S ) is 2.5kΩ. Reading the A/D result Buffer The RAM is 10-bit wide and the results of A/D converter is formatted automatically to one of the four selectable formats. The bits ADCON1<9:8> (FORM<1:0>) select the format. (signed integer uses 2 s complement) ENG721-S2 Mixed Signal Processing : Hassan Parchizadeh Page 6

7 Problem : Using above formats, determine the unsigned/signed integer and fraction value of (i) 01,1001,0011 Ans[403,403, , (ii) 11,0011,1000 Ans[824,-200, , ] Example : Writr a C program to Read channel 0 and put the results to MCP4921 dac. /* * File: talkthrough_mainxc16.c * Author: parchizh * * Created on 02 December 2014, 17:03 */ #include "p30f4012.h" _FOSC(CSW_FSCM_OFF & XT_PLL16); /* Set up for Crystal */ _FWDT(WDT_OFF); /* Turn off the Watch-Dog Timer. */ /* Enable MCLR reset pin and turn off the power-up timers. */ _FBORPOR(PBOR_OFF & MCLR_EN); _FGS(CODE_PROT_OFF); /* Disable Code Protection */ /* Global Variables and Functions */ #define cs PORTDbits.RD0 #define DT 90 void main(void){ ENG721-S2 Mixed Signal Processing : Hassan Parchizadeh Page 7

8 int i; // seting up external MCP4921 DAC SPI1CON = 0x0526; SPI1STAT = 0x8000; TRISF = 0x04; TRISE = 0xFEFF; TRISD = 0xFFFE; // SPI master, PPRE=1:4,SPRE=1:7,Mode=16,0->1 // SPI enable, clear SPIROV // RF2(SDI1) input, RF3(SD01) output // RE8(SCK1) output // RD0 (cs) output // seting up internal ADC TRISB = 0xFFFF; // Port B is input ADPCFG = 0xFFFE; //1st channel is sampled and coverted ADCON1 = 0x0004; // ADC off, output_format=integer,asmp =0 // Manual start of convesion // Automatic start of sampling after coversion ADCHS = 0x0000; // Connect RB0 on AN0 as CH0 input ADCSSL = 0; // No scan ADCON3 = 0x1003; // ADCS=3 (min TAD for 10MHz is 3*TCY=300ns) ADCON2 = 0; // AD Vref are AVdd and AVss ADCON1bits.ADON = 1; // ADC on } while(1){ ADCON1bits.SAMP = 0; while(adcon1bits.samp == 0) ; cs = 0; for(i=0;i<dt;i++){} SPI1BUF = 0x7000 ADCBUF0; for(i=0;i<dt;i++){} cs = 1; } // Clear SAMP bit (trigger conversion) // Wait for DONE bit in ADCON1 // Tcssr time required for CS fall to 1st rising clock // Output result to the DAC dspic30f4012 ADC tutorial 1. Design a circuit that can scale the voltage from the range of 0 mv to +100 mv to the range of 0 V to +5 V. 2. Design a circuit that can shift and scale from the range of 2 V to 2.5 V to the range of 0 V to 5 V. 3. Design a circuit that can shift and scale from the range of -100 mv to +100 mv to the range of 0 V to 5 V the range of. 4. The microchip temperature sensor TC1047A is connected to the AN0 of the dspic30f4012 through an appropriate scaling circuit. The TC1047A measures from -40 o C to 125 o C and produces an output of 10 mv / o C and it s output is 100 mv at -40 o C. Design the scaling cicuit and write an instruction sequence to read AN0. 5. Suppose that there is a 10-bit A/D converter with Vref- = 0 V and Vref+ = 5 V. ENG721-S2 Mixed Signal Processing : Hassan Parchizadeh Page 8

9 Find the corresponding values for A/D conversion results of 50,100,500, 800 and Repeat Q5 for Vref- = 1 V and Vref+ = 2.3 V. 7. It is required to have a resolution of 0.4 mv for an application which the sensors maximum output is 460 mv. How would you configure the dspic30f4012 to achieve this requirement? If external hardaware is used, show how it is connected to the dspic30f4012. Finally Write the instruction(s) sequence to configure the ADC module. 8. Write an instruction sequence to configure A/D converter of the dspic30f4012 with the following features: i ii iii Scan 1,2 and 5 inputs Interrupt after capturing two samples each (6 samples) Data to be converted over the range Vref- to Vref+ 9. Write an instruction sequence to configure A/D converter of the dspic30f4012 for an application that requires to sample first AN0 and then AN1 channels. AN0 and AN1 inputs are to be referenced to Vref- and the ADC modules to generate an interrupt after 1 sample of each channel. The conversions are to be made over the full input range of AVss and AVdd. 10. What value should be placed into ADCS <5:0> bit of the ADCON3 to give an ADC conversion T AD of 100nS, assuming dspic30f4012 is runnig at 120 MHz. (note : minimum T AD is ns) 11. For Q10, what is the total converstion time? 12. For Q11, what is the maximm sampling frequency? 13. For an application using dspic30f4012 ADC, It is required to sample 6 channels at 8 Ksps per channel. If the dspic is runing at 120 MHz, what is the T AD value and what is the best that could be placed into ADCS<5:0> to achieve this. ENG721-S2 Mixed Signal Processing : Hassan Parchizadeh Page 9