Considerations concerning modelling, analysis and design of a DC-DC boost converter using MULTISIM

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1 Considerations concerning modelling, analysis and design of a DC-DC boost converter using MULISIM LIVIU DINCA Decebal Blv., nr. 107, Craiova, Dolj, ROMANIA JENICA ILEANA CORCAU Blv. Decebal, nr. 107, Craiova, Dolj, ROMANIA EODOR LUCIAN RIORIE Blv. Decebal, nr. 107, Craiova, Dolj, ROMANIA ALEXANDRU UDOSIE Blv. Decebal, nr. 107, Craiova, Dolj, ROMANIA Abstract: - In this paper one follow to model the components of a DC-DC boost converter using the MULISIM and to analyze its functioning using this simulation software. he modelling is performed in order to study a converter scheme which will be experimentally developed in laboratory. One follow to develop a scheme which can put in evidence the functional blocks of the converter and its functioning, in order to be used both for energy source in different purposes and for didactical applications. One use a classical boost converter scheme, with MOSFE transistors driven with rectangular pulses (PWM). here are simulated both the converter scheme and the short circuit protection scheme. he short circuit protection is separately tested because the circuit simulation in MULISIM is increasingly difficult as the scheme complexity grows. Key-Words: - modeling in MULISIM, analysis, DC to DC boost converter, short circuit protection 1 Considerations concerning the boost converter A large number of circuits of DC-DC converters are well known; they can make increase or decrease the output voltage and/or reverse polarity. he boost converter is type of converter that provides an output voltage higher than input voltage. he boost circuit is shown in figure 1. It consists of five basic components: switch (MOSFE type), diode, inductor, capacitor and a PWM controller [1] [5]. Fig. 1 he DC-DC boost converter scheme he control characteristic of the converter is described by the relation: Vin Vout (1) ( 1 d) d is the duty cycle of the rectangular waveform which command the MOSFE switch. It can vary between 0 and 1 and one observes the output voltage is higher than the input voltage. Boost converter implementation in MULISIM he boost converter we follow to implement amplify the input voltage of 15 VDC to the value of the output voltage of 0 VDC, at a maximum power of 1kW. A such converter is useful in laboratory installations, but its application can be extended in ISBN:

2 the aerospatial domain, and especially in the spatial domain, on satellites, where are used in combination with fuel cells and oxygen and hydrogen regeneration systems, based on solar energy. One followed a big enough command frequency in order to decrease as much as possible the load current ripples. Although, a too high command frequency leads to numerical instabilities and abnormal functioning of the schemes in MULISIM, so we choose a command frequency of 10 khz. Although the cutting frequency of the electronic components, specified in catalogues are much higher than 10 khz, one observed an increase of the command frequency does not considerably improve of the converter behaviour. Numerical simulations were performed in MALAB with command frequency up to 10 khz. he MALAB implemented schemes work good because they use averaged models, which neglect all the details that appear in the experimental implementation of these converter electronic schemes. In addition, it was found by numerical simulations in MULISIM, the electronic schemes work good for command frequencies between the resonance frequency of the converters LC circuit and a value ten times higher. In conclusion, in order to perform a future comparison between the numerical simulations in MULISIM and the experimental results, and to obtain a stable numerical simulation, one chooses the command frequency of 10 khz. he converters scheme implemented in MULISIM is presented in figure. L1 0uH XSC D 8EQ05 Ext rig + XSC R 50mΩ 5 V1 15 V _ A B + _ + _ XF1 100mΩ R1 Q C1.mF R.Ω mΩ R7 1 R 5Ω 10 IRFP0N 0 Fig. he converters scheme implemented in MUISIM he basic elements of the converter are inductor L1, capacitor C1, diode D, MOSFE transistor Q, and the load resistance R. he components values are presented on the scheme. he resistances R1, R and R7, with very low values, are used as current transducers, so the currents values can be shown on the oscilloscopes. On the figures which show the currents will appear in fact the voltages on these resistances. In order to obtain the actual current value it must to divide that voltage by the correspondent resistance value. In figure, the command of the MOSFE transistor IRFP0N was realised by a signal generator predefined in MULISIM. he command was with rectangular pulses with HIH level of 8 V and the LOW level of 0V and a duty cycle of 75%. In figure.a are represented the time variations of the inductor current (in blue), and the MOSFE current (in red). In the figure.b are represented the command pulses (in red), the drain voltage of the MOSFE (in blue) and the output voltage (in green). In figure.c is presented a detail of the figure.b in stabilised regime. Fig..a ISBN:

3 Fig..b Fig..c Fig. he results of the scheme simulations XSC V1 15 V R8.5kΩ R9.kΩ C nf C 10nF 1 15 RS DIS HR RI CON VCC OU A1 17 ND 555_VIRUAL 1 R10.kΩ R11 1kΩ 1 Q BD17 R1 5.5kΩ C nf C5 A VCC RS OU DIS HR RI CON ND 555_VIRUAL 5 V V U1 7 10nF 0 Fig. he scheme for the PWM pulses generation Fig. 5 Signals in converter command stage ISBN:

4 In the figure.a one observe the current ripples through the inductor are in allowable limits (. A at an average value of 55A, which means approximate %). We recall that in figure.a, in blue, is the voltage on the R resistance in figure. From the output voltage point of view, the ripples have an amplitude of 0.95 V, at an average value of 1.5 V, that means approximate 1%. In conclusion, the converter behaviour at a load resistance of. satisfy even the requirements for the use on the aircrafts and spatial vehicles. Command circuits implementation In figure one presents the MULISIM scheme for the command pulses generation. It contains two 555 IC and an operational amplifier 71, used as comparator. he first 555 circuit is used for the 10 khz frequency generation. Due to the incorrect functioning of the MULISIM simulation at very low duty cycles, one used the configuration with a high duty cycle (approximate 85%) and after that was disposed the Q transistor in figure, in inverting configuration. he second 555 IC is used as linear variable voltage generator. he obtained signal is not an actual linear variable voltage, but is characterised by an exponential variation, like a capacitor charging/discharging voltage. Although, for this application, this variation is good enough in order to obtain the PWM command pulses for the converter. he PWM pulses are obtained with a comparator realised with the 71 IC. It compares the reference voltage of V in figure with the voltage obtained after the second 555 IC. In the converters complete scheme, the reference voltage on the inverting input of the 71 IC is obtained from a PI controller which realize the output voltage control. Figure 5 presents the characteristic signals of the converter operation command scheme. he rectangular pulses generated by the first 555 circuit are in red, in dark blue is the linear variable voltage generated by the second circuit 555, in light blue is the reference voltage of V and in green are PWM pulses obtained at the output of the comparator. he control scheme is realized by means of a classical PI controller implemented with operational amplifier 71. he short circuit protection block o avoid obtaining a complex scheme for the simulation it is difficult even in MULISIM, we used to simulate short-circuit protection block a signal generator XF 1 that produces voltage rectangular pulses. hese signals are applied on load resistance R, thus causing variation in load current, required in the functioning simulation of this block. he short circuit protection block must realize the following operations when the to maximum allowed current is overcame: 1- blocking MOSFE pulse command; - load circuit interruption; signalling occurrence of short circuit condition; restoring operation scheme after eliminating short circuit condition. For determining current value of the load resistance is used R=100 m. he voltage on this resistance is compared with reference voltage obtained by resistive divider consists of resistors R1 and R. he supply command block and short circuit protection will be achieved through a voltage stabilizer, so that voltage provided by the resistive divider not to interfere with the operation of the short circuit protection block. When the voltage exceeds the reference voltage resistance R and implicitly the load current exceeds the maximum value allowed, U comparator provides an output pulse, which command U1 flip-flop circuit 0BD-15V. his circuit contains four bistable circuit type SR in which we used only two. he first flip-flop used receives the pulse from comparator on the input R, resetting such O0 output. his output is applied at one inputs of gate UA of type And. At the other input of UA applies command pulse received from the pulse generator block, simulated here with signal generator XF. In this way, when flip-flop is reset U1_0, UA gate locks and pulses from the pulse generator does not reach at MOSFE. For load circuit interruption we used a MOSFE type IRFZ, in series with the load resistance R and current transducer resistance R. It is commanded in gate by O0 output of flip-flop U1. As a circuit operating at the supply voltage of 15V, flipflop U1 provides the output voltage of 11V when the corresponding flip-flops are in state S, these voltages is sufficient to open the MOSFE Q1, and below the maximum of 0V, maximum voltage accepted in this MOSFE transistor gate. So, maximum load current is achieved, the comparator U resets the flip-flop U1_0, and thus pulses are locked by command transistor of the converter, and in addition, apply zero voltage in Q1 s gate, interrupting the load circuit. he condition is maintained as long as U1_0 flip-flop is in R state. So, It meets also the second function of this block, which is to interrupt the load circuit. ISBN:

5 XF XSC XSC1 1 UA 081BD_15V 7 Key = Space J1 1 R 1kΩ 0 1 R kω R 1.Ω 5 Q1 XF1 V1 15 V R5 1 1kΩ 1 8 U1 O0 O1 O O S0 R0 S1 R1 7 S 1 R U 71 IRFZ R 100mΩ LED1 S 1 R 15 EO 5 R1 910Ω 0BD_15V Fig. he short-circuit protection scheme Fig. 7.a Fig. 7.b Fig. 7 Short circuit protection functioning o signalling short circuit condition a second flip-flop U1_1 was used, which is commanded in counter time with U1_0 flip-flop. hus, when the short circuit condition appeared, the U1_1 flip-flop pass in the S state and light the signalising LED. he functioning restoring in achieved by a return push button, normally opened, modelled with the J1 switch. he functioning restoration in achieved by a short time pushing of the J1 return push button, so a pulse on the S input of the U1_0 bistable, and on the R input of U1_1 appears. If the short circuit condition vanished meanwhile, these pulses will pass the O0 output in 1 and opens the Q1 transistor and also opens the UA gate. One obtain by this way the converter functioning restoring. If the short circuit conditions persists, the U comparator will sense it again, blocking the converter. he graphics showing the short circuit protection functioning are shown in figure 7. In figure 7.a, in red are pulses through gate UA, in blue are the restoring pulses and in brown is the comparator output. In figure 7.b, in red is the XF1 generator voltage which simulate the load current growth behind the maximum limit 5 A, in blue is the reference voltage applied on the inverting input of the comparator, in green is the comparator output and in brown is the voltage on the R resistance, which is the current transducer. In figure 7.a, by the time 00ms, the load current is below the maximum limit of 5 A and the pulses from the PWM generator pass through the UA gate. At 00 ms, as shown in figure 7.b, the voltage from the XF1 generator rises, so the load current overcame the value of 5 A. A pulse on the ISBN:

6 comparator output appears (the thick pulse from 00 ms). his pulse switch the U1_0 flip-flop in R state so the load current drops to zero. In figure 7.b it is not observed the 5 A value overcoming, but only it reach 0 A, once the Q1 transistor in blocked (the brown line). At 5 ms, on the figure 7.a one observes the restoring pulse. Because the short circuit conditions disappeared, (the voltage from XF1 decreased), this leads to restoring of the pulses through the UA gate and the current through the load (brown line in figure 7.b). he converter works normally till 00 ms, when the load current rise again and the pulses through gate UA (fig. 7.a) are blocked, and the load current drops to zero (brown line in figure 7.b). At 15 ms a restoring pulse is applied, but in this case the short circuit condition maintains. So, the PWM pulses pass through the UA gate only while the restoring pulse is applied, after that they are blocked again. he same is happening with the load current. It shows an increase behind the 5 A limit only during the restoring pulse, after that it drops again to zero. So, the scheme fulfil all the requirements. 5 Conclusions One have followed modelling and simulation of the converter functional blocks in MULISIM in order to realize an experimental DC-DC boost converter in laboratory. he functional blocks of the studied converter were implemented in MULISIM and have an operation according to the intended purpose. Both the actual converter scheme, the PWM generator and the short circuit protection work normally. he short circuit scheme works good for the conditions it was designed. he operation restoring is obtained by a return push button with normal open contact, drive by a human operator. his operation is good for laboratory conditions, when the operator has a convenient access to the restoring button. In industrial conditions like a aerodrome power source, this operation way may be undesirable, an automat restoring being proffered. his may be achieved using some monostable circuits and will be the subject of future studies. he MULISIM software proved extremely useful in the simulation of the implemented schemes. Although, have been some difficulties regarding the simulation numerical convergence when the scheme complexity rises. For example it was very difficult to obtain a correct simulation for the ensemble scheme which include all the functional blocks. References: [1] Sathya1 P., Natarajan R. Design and Implementation of 1V/V Closed loop Boost Converter for Solar Powered LED Lighting System. International Journal of Engineering and echnology (IJE), ISSN , pp. 5-; [] Rashid M. H. Power Electronics Circuits, Devices, And Applications, rd edition, University of West Florida, Pearson Prentice Hall, 00; [] Amala. A., Parameshwari P., Pallavi P. Quasi resonant ZVS boost converter. okaraju Rangaraju Institute of Engineering & echnology Bachupally, Hyderabad-90, 011; [] Biswal M., Sabyasachi S. A Study on Recent DC-DC Converters. International Journal of Engineering Research and Applications (IJERA), ISSN: 8-9, Vol., Issue, November- December 01, pp.57-; [5] raphical System Design uide to Power Electronics Co-Simulation with Multisim and LabVIEW; [] Chellappan M.V. Fuel cell based battery-less UPS system. Master of Science, August 008, available online; [7] Misoc F. A comparative study of dc-dc converters effects on the output characteristic of direct ethanol fuel cells and NI-Cd Batteries. Master of Sciences, Kansas State University, 007; [8] udosie A. N. Cap. 11- Aircraft as-urbine Engine s Control Based on the Fuel Injection Control, pp MULDER, Max- AERONAUICS AND ASRONAUICS, Editura INECH, Rijeka, Croatia, ISBN ISBN: