ZSCT1555 PRECISION SINGLE CELL TIMER ISSUE 2 - MAY 1998 DEVICE DESCRIPTION FEATURES APPLICATIONS SCHEMATIC DIAGRAM
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1 PRECISION SINGLE CELL TIMER ZSCT555 ISSUE 2 - MAY 998 DEVICE DESCRIPTION These devices are precision timing circuits for generation of accurate time delays or oscillation. Advanced circuit design means that these devices can operate from a single battery cell with the minimum of quiescent current. In monostable mode time delays are controlled by a single resistor and capacitor network. In astable mode the frequency and duty cycle can be accurately and independently controlled with two external resistors and one capacitor. The threshold and trigger levels are normally set as a proportion of V CC by internal resistors. These levels can be programmed by the use of the control input pin. When the trigger input reduces to a value below the trigger level, the flip-flop is set and the output goes high. With the trigger input above the trigger level and the threshold input above the threshold level, the flip-flop is reset SCHEMATIC DIAGRAM and the output goes low. The reset pin has priority over all the other inputs and is used to start new timing cycles. A low on the reset input causes the flip-flop to reset forcing the output low. Whenever the output is forced low then the internal discharge transistor is turned on. FEATURES.9V supply operating voltage guaranteed Pin connections comparable with 555 series timers Very low quiescent current 7 µa SO8 and DIL8 packages Operating temperature range compatible with battery technologies APPLICATIONS Portable and battery powered equipment Low voltage and low power systems 8 VCC CONTROL 5 6 THRESH 2 TRIGGER 7 DISCHARGE 3 OUTPUT RESET GND -3
2 ZSCT555 ABSOLUTE MAXIMUM RATINGS Supply Voltage 9V Input Voltages 9V (Cont, Reset, Thres, Trig) Output Current ma Operating Temperature -2 to C Storage Temperature -55 to 5 C Power Dissipation (Tamb=25 C) DIL8 625mW SO8 625mW Recommended Operating Conditions Supply Voltage.9V(min) 6V(max) Input Voltages 6V(max) (Cont, Reset, Thres, Trig) Output Current Sink ma(max) Source 5µA(max) ELECTRICAL CHARACTERISTICS TEST CONDITIONS (Unless otherwise stated):t amb = 25 C,V CC =.5V SYMBOL PARAMETER CONDITIONS LIMITS UNITS MIN. TYP. MAX. V CC Supply Voltage.9 6 V I CC Supply Current no load V CC = 5V, no load V TH Threshold Voltage V CC = 5V I TH Threshold Current (Note ) 2 na V TR Trigger Voltage V V CC = 5V I TR Trigger Current na t PD Trigger Propagation delay Delay from trigger to output 2 µs V RS Reset Voltage..2. V I RS Reset Current V -5 - µa I DS Discharge switch Off-state current na V DS V CT Discharge switch On-state voltage Control Voltage (Open Circuit) I DS =.2mA V CC = 5V, I DS =.3mA V CC = 5V V OL Output Voltage (Low) I OL =ma I OL =5mA V CC =5V, I OL =ma V CC =5V, I OL =ma V OH Output Voltage (High) I OH = µa V CC = 5V, I OH = 5µA ma V mv V V V -32
3 ELECTRICAL CHARACTERISTICS (Continued) TEST CONDITIONS (Unless otherwise stated):t amb =25 C,V CC =.5V SYMBOL PARAMETER CONDITIONS LIMITS UNITS MIN. TYP. MAX. t R Output pulse rise time C L = pf V CC =5V, C L =pf t F Output pulse fall time C L = pf V CC =5V, C L =pf t IA (m) t V (m) t T (m) t IA (a) t V (a) t T (a) Timing error, Monostable Initial accuracy (Note 2) Drift with supply voltage Drift with temperature Timing error, Astable Initial accuracy (Note 2) Drift with supply voltage Drift with temperature RA= to 5 kω RB= to 5 kω C T = 68nF RA= to 5 kω RB= to 5 kω C T = 68nF f A Astable maximum frequency RA=2 kω RB= kω C T =7pF ZSCT µs ns % %/V ppm/ C % %/V ppm/ C 33 khz Note : This will influence the maximum values of RA and RB (RA MAX =MΩ,RB MAX =.5MΩ) Note 2: Is defined as the difference between the measured value and the average value of a random sample taken on a batch basis -33
4 ZSCT555 TYPICAL CHARACTERISTICS Minimum Pulse Width (µs) Propagation Delay (µs) C. Lowest Voltage Level of Trigger Pulse (xvcc) Minimum Pulse Width Required for Triggering + C Vcc=.5v Rout/Vcc = K Vcc=.5v Rout/Vcc=K..2 Lowest Voltage Level of Trigger Pulse (xvcc) Output Propagation Delay Minimum Pulse Width (µs) Propagation Delay (µs) C + C Vcc=5v Rout/Vcc = K..2 Lowest Voltage Level of Trigger Pulse (xvcc) Minimum Pulse Width Required for Triggering Vcc=5v Rout/Vcc=K..2 Lowest Voltage Level of Trigger Pulse (xvcc) Output Propagation Delay 2.5 Supply Current (µa) C Pulse Duration relative to Vcc=5v Supply Voltage (V) Supply Current v Supply Voltage Supply Voltage (V) Normalized Output Pulse Duration v Supply Voltage 6-3
5 ZSCT555 TYPICAL CHARACTERISTICS. Vcc=.5v.5 Vcc=5v Vcc - Vout (V) C Vcc - Vout (V) C.... High-Level Output Current (ma) Output High Voltage Drop v Output Current High Level Output Current (ma) Output High Voltage Drop v Output Current Low Level Output Voltage (V) 2. Vcc=.5v C... Low Level Output Current (ma) Output Low Voltage Drop v Output Current Low Level Output Voltage (V). Vcc=5v C... Low Level Output Current (ma) Output Low Voltage Drop v Output Current Discharge Transistor Voltage (V) Vcc=.5v... + C.. Sink Current (ma) Discharge Transistor Voltage v Sink Current Discharge Transistor Voltage (V) Vcc=5v... + C.. Sink Current (ma) Discharge Transistor Voltage v Sink Current -35
6 ZSCT555 FUNCTIONAL DIAGRAM FUNCTIONAL TABLE RESET TRIGGER VALUE THRESHOLD VOLTAGE OUTPUT DISCHARGE SWITCH Low N/A N/A Low On High <V CC /5 N/A High Off High >V CC /5 >V CC /5 Low On High >V CC /5 <V CC /5 As Previously established POWER DERATING TABLE Package TA 25 C Power Rating Derating Factor Above TA=25 C T A =7 C Power Rating T A =85 C Power Rating N8 625mW 6.25mW/ C 33mW 25mW D8 625mW 6.25mW/ C 33mW 25mW -36
7 ZSCT555 APPLICATIONS INFORMATION Many configurations of the ZSCT555 are possible. The following gives a selection of a few of these using the most basic monostable and astable connections. The final application example in astable mode shows the device optimum use for low voltage and power economy in a single cell boost converter. Monostable Operation Figure shows connection of the timer as a one-shot whose pulse period is independent of supply voltage. Initially the capacitor is held discharged. The application of a negative going trigger pulse sets an internal flip flop which allows the capacitor to start to charge up via RA and forces the output high. The voltage on the capacitor increases for time t, where t =.63RAC T, at the end of this period the voltage on the capacitor is.8 V CC. At this point the flip flop resets, the capacitor is discharged and the output is driven low. Figure 2 Figure 3 gives an easy selection of RA and C T values for various time delays. C - Capacitance (uf).. RA k. us us ms ms ms s s Figure 3 Time Delay M M This configuration of circuit can be used as a frequency divider by adjusting the timing period. Figure indicates a divide by three. Figure Figure 2 shows the timing diagram for this function. During the output high period further trigger pulses are locked out however the circuit can be reset by application of a negative going pulse on the reset pin. Once the output is driven low it remains in this state until the application of the next trigger pulse. If the reset function is not used then it is recommended to connect to V CC to eliminate any possibility of false triggering. Figure -37
8 ZSCT555 Figure 5 shows the monostable mode used as a pulse width modulator. Here the trigger pin is supplied with a continuous pulse train, the resulting output pulse width is modulated by a signal applied to the control pin. Astable operation The configuration of Figure 7 produces a free running multivibrator circuit whose frequency is independent of supply voltage. The ratio of resistors RA and RB precisely sets the circuit duty cycle. The capacitor is charged and discharged between thresholds at.2v CC and.8v CC. Oscillation frequency (f) and duty cycle (d) can be calculated using the following equations:- f =.62/(RA + 2RB)C T d = RB /(RA + 2RB) Figure 5 Figure 6 shows typical waveform examples. Figure 7 Figure 8 shows the waveforms generated in this mode of operation. Figure 6 Figure 8-38
9 ZSCT555 Figure 9 gives an easy selection for RA, RB and C T values. Figure shows the result of modulation with a triangle wave input to the control pin. C - Capacitance (uf).. k M M (RA+2RB).. k k k Figure 9 Free Running Frequency (Hz) Similar to the PWM circuit of Figure 5 the astable circuit can be configured with modulation of the control input as shown in Figure. The result is a pulse position modulated, PPM, circuit where the pulse position is altered by the control input voltage. Figure Figure -39
10 ZSCT555 The circuit of Figure 2 shows the device in astable mode operating as part of a single cell boost converter. This circuit generates a 5 volt supply from a single battery cell. The circuit output voltage is maintained down to.9 volts input and power economy is optimised for extended battery life. CONNECTION DIAGRAM ORDERING INFORMATION Part Number Package Part Mark ZSCT555D8 DIL8 ZSCT555 Figure 2 ZSCT555N8 SO8 ZSCT555-32
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