FR V, 5A, 500KHz Synchronous PWM-Buck DC/DC Converter. Description. Features. Applications. Pin Assignments. Ordering Information

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1 2V, 5A, 500KHz Synchronous PWM-Buck DC/DC Converter Description is a high-efficiency synchronous step-down DC/DC converter that employs a special process technique to obtain very low R DS (ON) for the internal metal oxide semiconductor field-effect transistor (MOSFE). he input operation voltage is in a wide range from 4.75V to 2V, and continuous load current capability is 5A. Control circuit is designed by a particular current mode which provides fast transient response and eases loop stabilization. his product has a very low standby current less than μa in shutdown mode. When the pin voltage is less than 0.4V, will turn off. Fault protection includes over current protection (OCP), under voltage lockout protection (UVLO) and over temperature protection (OP) function. his high-efficiency current mode step-down Green Power Converter offers the standard SOP-8 package with an exposed pad. Pin Assignments SP Package (SOP-8 Exposed Pad) Features High Efficiency up to 90% Internal MOSFE R DS (ON): 0mΩ 20mΩ Internal Compensation Input Operation Voltage Range: 4.75V to 2V 5A Continuous Output Current Output Voltage down to 0.805V 500KHz Oscillation Frequency Sync to External Clock from 300KHz to 800KHz Cycle-by-Cycle Current Limit Under Voltage Lockout Over-emperature Protection with Auto Recovery <μa Shutdown Current hermal Enhanced SOP-8 (Exposed Pad) Package RoHS Compliant Applications Networking Equipment OLPC, Netbook Distributed Power System LCD Monitor, V, SB External HDD Security System Ordering Information R: ape/reel LX LX BS VCC FB SHDN/S G: Green C: Green Package ype SP: SOP-8 (Exposed Pad) Figure. Pin Assignment of -Preliminary 0.4-OC-202

2 ypical Application Circuit C4 0.μF 4.75V to 8V C 22μF/25V CERAMIC C3 0.μF R3 00KΩ 7 VCC 5 SHDN/S 8,9 4 BS L.8μH LX 2,3 VOU.2V R 4.99KΩ/% FB 6 R2 0KΩ/% C6 (optional) C2 47μF/6.3V CERAMIC Figure 2. Output.2V Application Circuit C4 0.μF 8V to 2V C5 330μF/25V EC x C 22μF/25V CERAMIC R3 00KΩ 7 VCC 5 SHDN/S 4 BS L.8μH LX 2,3 VOU.2V R 4.99KΩ/% FB 6 C6 (optional) C2 47μF/6.3V CERAMIC C3 0.μF 8,9 R2 0KΩ/% Figure 3. High Input Voltage Application Circuit -Preliminary 0.4-OC-202 2

3 Functional Pin Description I/O Pin Name Pin No. Pin Function I FB 6 I O VCC 7 I 5 O LX 2,3 O BS 4 Voltage Feedback Input Pin. FB and VOU are connected by a resistive voltage divider. his IC senses feedback voltage via FB and regulates it at 805mV. Power Supply Input Pin. Drive 4.75V~2V voltage to this pin to power on this chip. A 22µF ceramic bypass capacitor is connected between and to eliminate noise. Bias Supply Output Pin. A capacitor rating between 0.00µF~µF must be connected from this pin to. his pin provides a digital control to turn the converter on or off. For automatic start-up, connect the pin to pin with a 00KΩ resistor. An external clock from 300KHz to 800KHz can be applied to the pin to change oscillation frequency. Power Switching Output Pin. his is the output pin that internal high-side NMOS switches to supply power. High-Side Gate-Drive BS Input. A capacitor rating between 0.0µF~0.µF must be connected from this pin to LX. It can boost the gate drive to fully turn on the internal high-side NMOS. I 8 Ground Pin. his pin is connected to the exposed pad with copper. I Exposed Pad 9 Ground Pin. he exposed pad must be soldered to a large PCB area and connected to for maximum power dissipation. Block Diagram SHDN/S M Oscillator 50KHz / 500KHz CLK Current Sense Amplifier - 5V SHDN/S VCC Regulator VCC Vref2 - Current Limit Comparator Control Logic High-Side MOSFE BS LX FB Vref - Error Amplifier Rcomp Ccomp - PWM Comparator Current Limit Low-Side - Low-Side MOSFE Figure 4. Block Diagram of -Preliminary 0.4-OC-202 3

4 Absolute Maximum Ratings (Note) Input Supply Voltage V to 23V Enable Voltage V to 23V LX Voltage V to V BS Voltage V BS V to 6V All Other Pins Voltage V to 6V Maximum Junction emperature ( J ) C Storage emperature ( S ) C to 50 C Lead emperature (Soldering, 0sec.) C Package hermal Resistance (θ JA ) (Note2) SOP-8 (Exposed Pad) C/W Package hermal Resistance (θ JC ) SOP-8 (Exposed Pad) C/W Note :Stresses beyond those listed under Absolute Maximum Ratings" may cause permanent damage to the device. Note 2:PCB heat sink copper area = 0mm 2. Recommended Operating Conditions Input Supply Voltage V to 2V Operation emperature Range C to 85 C -Preliminary 0.4-OC-202 4

5 Electrical Characteristics (=2V, A=25 C, unless otherwise specified.) Parameter Symbol Conditions Min yp Max Unit Input Supply Voltage V Shutdown Supply Current I SD =0V μa Quiescent Supply Current I DDQ =2V, V FB=V.5 ma Feedback Voltage V FB 4.75V 2V mv High-Side MOSFE R DS(ON) (Note2) HSR DS(ON) 0 mω Low-Side MOSFE R DS(ON) (Note2) LSR DS(ON) 20 mω MOSFE Leakage Current (Leak) =0V, =0V 0 0 μa High-Side MOSFE Current Limit (Note2) I LIMI 8 A Maximum Duty Cycle D MAX V FB=0.7V 90 % Oscillation frequency F LX KHz Short-Circuit Oscillation Frequency F LX(Short) V FB=0.3V 50 KHz Sync Frequency Range F SYNC KHz Input UVLO hreshold VUVLO(Vth) Rising 4 V Under Voltage Lockout hreshold Hysteresis VUVLO(Hys) 200 mv Input Low Voltage (L) 0.4 V Input High Voltage (H) 2.0 V Input Current =2V 2 μa VCC Regulator V CC 4.5 V Soft-Start ime SS 600 μs hermal Shutdown hreshold (Note 2) SD 70 C Note 2:Guarantee by design. -Preliminary 0.4-OC-202 5

6 Frequency (khz) Current Limit (A) Efficiency (%) Vfb (V) Efficiency (%) Efficiency (%) ypical Performance Curves =2V, =3.3V, C=22μF, C2=47μF, L=.8μ, A=25 C, unless otherwise noted =.2V =5V =2V =3.3V =2V =2V Load Current (A) Load Current (A) Figure 5. Efficiency vs. Loading Figure 6. Efficiency vs. Loading =5V Load Current (A) Figure 7. Efficiency vs. Loading =2V =2V Case emperature ( Degrees C ) Figure 8. Feedback Voltage vs. emperature Case emperature ( Degrees C ) Figure 9. Frequency vs. emperature emperature ( ) Figure 0. Current Limit vs. emperature -Preliminary 0.4-OC-202 6

7 ypical Performance Curves (Continued) =2V, =3.3V, C=22μF, C2=47μF, L=.8μ, A=25 C, unless otherwise noted. I OU =0A I OU =5A 50mV/div. (AC) 200mV/div. (AC) 50mV/div. (AC) 50mV/div. (AC) 0V/div. 0V/div. 2A/div. 2μs/div. 2μs/div. Figure. DC Ripple Waveform Figure 2. DC Ripple Waveform I OU =0A I OU =5A 0V/div. 0V/div. 200μs/div. 200μs/div. Figure 3. Startup hrough Waveform Figure 4. Startup hrough Waveform I OU =0A I OU =5A 0V/div. 0V/div. 40ms/div. 80μs/div. Figure 5. Shutdown hrough Waveform Figure 6. Shutdown hrough Waveform -Preliminary 0.4-OC-202 7

8 ypical Performance Curves (Continued) =2V, =3.3V, C=22μF, C2=47μF, L=.8μ, A=25 C, unless otherwise noted. I OU =0A I OU =5A 0V/div. 0V/div. 2ms/div. Figure 7. Startup hrough Waveform 2ms/div. Figure 8. Startup hrough Waveform I OU =0A I OU =5A 0V/div. 0V/div. 200ms/div. 200ms/div. Figure 9. Shutdown hrough Waveform Figure 20. Shutdown hrough Waveform I OU = 0A to 5A 200mV/div. 0V/div. 400μs/div. Figure 2. Load ransient Waveform 20μs/div. Figure 22. Short Protect Waveform -Preliminary 0.4-OC-202 8

9 Function Description Introduction is a constant-frequency current-mode step-down synchronous DC/DC converter. It regulates input voltage from 4.75V to 2V and provides 5A of continuous load current. o achieve bias power supply, contains an internal voltage regulator to support the internal circuits. For applications in which is less than 4.5V, output decreases and a 0.µF ceramic capacitor are required for decoupling. If is greater than 4.5V, the output of the regulator will be in full regulation. he error amplifier compares the FB voltage with the internal 0.805V reference. And the voltage of error amplifier output is compared to the switch current to control the RS flip-flop. At the beginning of each clock cycle, the high-side NMOS turns on when the oscillator sets the RS flip-flop, and turns off when current comparator resets the RS flip-flop. hen the low-side NMOS will turn on until the clock period ends. Internal Soft-Start he internal soft-start function is used to eliminate the output voltage overshooting during start-up. When the chip initiates, the internal reference voltage will rise slowly to 0.805V and the internal COMP signal will rise slowly to achieve output voltage. he soft-start time is approximate 600μs. SHDN/S he pin provides digital control to turn on/turn off the regulator. For automatic start-up, tie and with a resister, as shown in the figure. he recommended value of R3 is 00KΩ. he can be synchronized with an external clock from 300KHz to 800KHz by using the pin. R3 Device Protection:. Input Under Voltage Lockout When the power of is on, the internal circuits will be held inactive until exceeds the input UVLO threshold voltage. he regulator will be disabled when falls below the input UVLO threshold voltage. he hysteretic of the UVLO comparator is 200mV. 2. Short Circuit Protection he provides short circuit protection function to prevent the device damaged from short condition. When the short condition occurs and the feedback voltage drops lower than 40% of the reference, the oscillator frequency will be reduced to 50KHz to prevent the inductor current increasing beyond the current limit. In the meantime, the current limit will also be reduced to lower the short current. Once the short condition is removed, the frequency and current limit will return to normal. 3. Over Current Protection he over current protection function is implemented using cycle-by-cycle current limit architecture. he inductor current is monitored by measuring the high-side MOSFE series sense resistor voltage. When the load current increases, the inductor current will also increase. When the peak inductor current reaches the current limit threshold, the output voltage will start to drop. When the over current condition is removed, the output voltage will return to the regulated value. 4. Over emperature Protection he incorporates an over temperature protection circuit to protect itself from overheating. When the junction temperature exceeds the thermal shutdown threshold temperature, the regulator will shutdown. When the junction temperature is less than the recovery threshold temperature, the chip will re-enable. -Preliminary 0.4-OC-202 9

10 Application Information Output Voltage Setting he output voltage is set by using a resistive divider from the output to FB. he FB pin regulated voltage is 0.805V. hus the output voltage is: =0.805 R R2 able lists recommended values of R and R2 for most used output voltage. able Recommended Resistance Values R (%) R2 (%) 5V 30.9kΩ 5.76kΩ 3.3V 30.9kΩ 9.76kΩ 2.5V 4.99kΩ 2.32kΩ.8V 4.99kΩ 3.92kΩ.2V 4.99kΩ 0kΩ Resistors R and R2 should be placed close to the FB pin to prevent stray pickup. Input Capacitor Selection he use of the input capacitor is filtering the input voltage ripple and the MOSFES switching spike voltage. Because the input current to the step-down converter is discontinuous, the input capacitor is required to supply the current to the converter to keep the DC input voltage. he capacitor voltage rating should be.25 to.5 times greater than the maximum input voltage. he input capacitor ripple current RMS value is calculated as: A low ESR capacitor is required to keep the noise minimum. Ceramic capacitors are better, but tantalum or low ESR electrolytic capacitors may also suffice. When using tantalum or electrolytic capacitors, a 0.μF ceramic capacitor should be placed as close to the IC as possible. It is recommended that the input EC capacitor should be added for applications if the suffers high spike input voltage (ex. hot plug test). It can eliminate the spike voltage and induce the IC damage from high input voltage stress. 8V to 2V C5 330μF/25V EC x C 22μF/25V MLCC x Output Capacitor Selection he output capacitor is used to keep the DC output voltage and supply the load transient current. When operating in constant current mode, the output ripple is determined by four components: R PPL t = R PPL ( t R PPL ( R (t R PPL ( L (t (t he following figures show the form of the ripple contributions. V RIPPLE(ESR) (t) (RM = = Where D is the duty cycle of the power MOSFE. his function reaches the maximum value at D=0.5 and the equivalent RMS current is equal to I OU /2. he following diagram is the graphical representation of above equation. 5A 4.5A 4A 3.5A V RIPPLE(ESL) (t) V RIPPLE(C) (t) (t) (t) (t) -Preliminary 0.4-OC-202 0

11 Application Information (Continued) V NOISE (t) = V RIPPLE (t) R PPL ( R, p p = R PPL ( L, p p = R PPL (, p p = F (t) L L L L 8 F 2 L Where F OSC is the switching frequency, L is the inductance value, is the input voltage, ESR is the equivalent series resistance value of the output capacitor, ESL is the equivalent series inductance value of the output capacitor and the C OU is the output capacitor. Low ESR capacitors are preferred to use. Ceramic, tantalum or low ESR electrolytic capacitors can be used depending on the output ripple requirements. When using the ceramic capacitors, the ESL component is usually negligible. It is important to use the proper method to eliminate high frequency noise when measuring the output ripple. he figure shows how to locate the probe across the capacitor when measuring output ripple. Remove the scope probe plastic jacket in order to expose the ground at the tip of the probe. It gives a very short connection from the probe ground to the capacitor and eliminates noise. Probe Ground R Inductor Selection he output inductor is used for storing energy and filtering output ripple current. But the trade-off condition often happens between maximum energy storage and the physical size of the inductor. he first consideration for selecting the output inductor is to make sure that the inductance is large enough to keep the converter in the continuous current mode. hat will lower ripple current and result in lower output ripple voltage. he Δ L is inductor peak-to-peak ripple current: L= F L he following diagram is an example to graphical represent Δ L equation. =2V, F OSC=500KHz A good compromise value between size and efficiency is to set the peak-to-peak inductor ripple current Δ L equal to 30% of the maximum load current. But setting the peak-to-peak inductor ripple current Δ L between 20%~50% of the maximum load current is also acceptable. hen the inductance can be calculated with the following equation: L=0. L=.8μ L=2.2μ L=4.7μ (MA L= F L o guarantee sufficient output current, peak inductor current must be lower than the high-side MOSFE current limit. he peak inductor current is shown as below: P AK= (MA L 2 VOU Ceramic Capacitor -Preliminary 0.4-OC-202

12 R3 C4 Application Information (Continued) Feedforward Capacitor Selection Internal compensation function allows users saving time in design and saving cost by reducing the number of external components. he use of a feedforward capacitor C6 in the feedback network is recommended to improve the transient response or higher phase margin. FB VOU For optimizing the feedforward capacitor, knowing the cross frequency is the first thing. he cross frequency (or the converter bandwidth) can be determined by using a network analyzer. When getting the cross frequency with no feedforward capacitor identified, the value of feedforward capacitor C6 can be calculated with the following equation: R R2 C6 PCB Layout Recommendation he device s performance and stability are dramatically affected by PCB layout. It is recommended to follow these general guidelines shown as below:. Place the input capacitors and output capacitors as close to the device as possible. he traces which connect to these capacitors should be as short and wide as possible to minimize parasitic inductance and resistance. 2. Place feedback resistors close to the FB pin. 3. Keep the sensitive signal (FB) away from the switching signal (LX). 4. he exposed pad of the package should be soldered to an equivalent area of metal on the PCB. his area should connect to the plane and have multiple via connections to the back of the PCB as well as connections to intermediate PCB layers. he plane area connecting to the exposed pad should be maximized to improve thermal performance. 5. Multi-layer PCB design is recommended. = 2 F R R R R2 R2 C3 R Where F CROSS is the cross frequency. o reduce transient ripple, the feedforward capacitor value can be increased to push the cross frequency to higher region. Although this can improve transient response, it also decreases phase margin and causes more ringing. In the other hand, if more phase margin is desired, the feedforward capacitor value can be decreased to push the cross frequency to lower region. In general, the feedforward capacitor range is between 0pF to nf. External Diode Selection For 5V input applications, it is recommended to add an external bootstrap diode. his helps improving efficiency. he bootstrap diode can be a low cost one such as N448. D N448 C5 C Exposed Pad LX L VOU Figure 23. Recommended PCB Layout Diagram C2 5V BS C4 LX -Preliminary 0.4-OC-202 2

13 Outline Information SOP-8 (Exposed Pad) Package (Unit: mm) SYMBOLS UNI DIMENSION IN MILLIMEER MIN MAX A A A B D D E E e H L Note:Followed From JEDEC MO-02-E. Carrier Dimensions Life Support Policy Fitipower s products are not authorized for use as critical components in life support devices or other medical systems. -Preliminary 0.4-OC-202 3