description/ordering information

Transcription

1 0.4% Initial Voltage Tolerance 0.2-Ω Typical Output Impedance Fast Turnon ns Sink Current Capability... ma to 00 ma Low Reference Current (REF) Adjustable Output Voltage...V I(ref) to 36 V D PACKAGE (TOP VIEW) JG OR PW PACKAGE (TOP VIEW) LP PACKAGE (TOP VIEW) CATHODE ANODE ANODE REF ANODE ANODE CATHODE REF ANODE CATHODE ANODE REF No internal connection ANODE terminals are connected internally. No internal connection KTP PACKAGE (TOP VIEW) FK PACKAGE (TOP VIEW) ANODE CATHODE ANODE REF CATHODE REF The ANODE terminal is in electrical contact with the mounting base ANODE description/ordering information The is a precision programmable reference with specified thermal stability over automotive, commercial, and military temperature ranges. The output voltage can be set to any value between V I(ref) (approximately 2.5 V) and 36 V with two external resistors (see Figure 6). This device has a typical output impedance of 0.2 Ω. Active output circuitry provides a very sharp turnon characteristic, making the device an excellent replacement for Zener diodes and other types of references in applications such as onboard regulation, adjustable power supplies, and switching power supplies. The C is characterized for operation over the commercial temperature range of 0 C to 70 C. The Q is characterized for operation over the full automotive temperature range of 40 C to 25 C. The M is characterized for operation over the full military temperature range of 55 C to 25 C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2004, Texas Instruments Incorporated

2 description/ordering information (continued) symbol TA 0 C to 70 C 40 C to 25 C ORDERING INFORMATION PACKAGE ORDERABLE PART NUMBER TOP-SIDE MARKING POWER-FLEX (KTP) Reel of 3000 CKTPR C Tube of 75 CD SOIC (D) Reel of 2500 CDR 43C TO-226 / TO-92 (LP) TSSOP (PW) SOIC (D) TO-226 / TO-92 (LP) TSSOP (PW) Bulk of 000 Reel of 2000 Tube of 50 Reel of 2000 Tube of 75 Reel of 2500 Bulk of 000 Reel of 2000 Tube of 50 Reel of 2000 CLP CLPR CPW CPWR QD QDR QLP QLPR QPW QPWR C T43 QD QLP T43QPW CDIP (JG) Tube of 50 MJG MJG 55 C to 25 C LCCC (FK) Tube of 55 MFK MFK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at REF ANODE CATHODE functional block diagram CATHODE REF + Vref ANODE 2

3 equivalent schematic CATHODE 800 Ω 800 Ω REF 8 20 pf 50 Ω 3.28 kω 4 kω 2.4 kω 7.2 kω 20 pf 0 kω kω ANODE 2, 3, 6, Ω All component values are nominal. Pin numbers shown are for the D package. absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Cathode voltage, V KA (see Note ) V Continuous cathode current range, I KA ma to 50 ma Reference input current range, I I(ref) µa to 0 ma Package thermal impedance, θ JA (see Notes 2 and 3): D package C/W (see Notes 2 and 4): KTP package C/W (see Notes 2 and 3): LP package C/W (see Notes 2 and 3): PW package C/W Package thermal impedance, θ JC (see Notes 5 and 6): FK package C/W JG package C/W Operating virtual junction temperature, T J C Lead temperature,6 mm (/6 inch) from case for 0 seconds C Storage temperature range, T stg C to 50 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES:. All voltage values are with respect to ANODE, unless otherwise noted. 2. Maximum power dissipation is a function of TJ(max), θ JA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) TA)/θ JA. Operating at the absolute maximum TJ of 50 C can affect reliability. 3. The package thermal impedance is calculated in accordance with JESD The package thermal impedance is calculated in accordance with JESD Maximum power dissipation is a function of TJ(max), θ JC, and TC. The maximum allowable power dissipation at any allowable case temperature is PD = (TJ(max) TC)/θ JC. Operating at the absolute maximum TJ of 50 C can affect reliability. 6. The package thermal impedance is calculated in accordance with MIL-STD

4 recommended operating conditions MIN MAX UNIT VKA Cathode voltage VI(ref) 36 V IKA Cathode current 00 ma C 0 70 TA Operating free-air temperature Q CC M electrical characteristics at specified free-air temperature, I KA = 0 ma (unless otherwise noted) C PARAMETER TEST CONDITIONS TA TEST CIRCUIT MIN TYP MAX VI(ref) Reference input voltage VKA = VI(ref) VI(dev) V I(ref) V KA 25 C Full range Figure Deviation of reference input voltage over full temperature range VKA = VI(ref) Full range Figure 4 20 mv Ratio of change in reference input voltage to the change in cathode voltage II(ref) Reference input current R = 0 kω, R2 = II(dev) Imin UNIT mv VKA = 3 V to 36 V Full range Figure 2. 2 mv/v 25 C Full range Figure Deviation of reference input current over full temperature range R = 0 kω, R2 = Full range Figure µa Minimum cathode current for regulation Ioff Off-state cathode current VKA = 36 V, VI(ref) = 0 zka Output impedance VKA = VI(ref) 25 C Figure 0.45 ma VKA = VI(ref), f khz, IKA = ma to 00 ma 25 C Full range Figure µaa µaa 25 C Figure Ω Full range is 0 C to 70 C for C-suffix devices. The deviation parameters VI(dev) and II(dev) are defined as the differences between the maximum and minimum values obtained over the rated temperature range. The average full-range temperature coefficient of the reference input voltage VI(ref) is defined as: C V I(dev) VI(ref) ppm 0 V at I(ref) 25 6 C T A where: TA is the rated operating temperature range of the device. Max VI(ref) Min VI(ref) VI(dev) VI(ref) is positive or negative, depending on whether minimum VI(ref) or maximum VI(ref), respectively, occurs at the lower temperature. The output impedance is defined as: zka V KA I KA When the device is operating with two external resistors (see Figure 2), the total dynamic impedance of the circuit is given by: z V I, which is approximately equal to zka R R2. TA 4

5 electrical characteristics at specified free-air temperature, I KA = 0 ma (unless otherwise noted) VI(ref) VI(dev) V I(ref) V KA II(ref) II(dev) Imin Ioff zka Q M PARAMETER TEST CONDITIONS TA TEST CIRCUIT MIN TYP MAX MIN TYP MAX Reference input voltage Deviation of reference input voltage over full temperature range Ratio of change in reference input voltage to the change in cathode voltage Reference input current Deviation of reference input current over full temperature range Minimum cathode current for regulation Off-state cathode current Output impedance VKA = VI(ref) VKA = VI(ref) VKA = 3 V to 36 V 25 C Full Figure range Full range Full range UNIT mv Figure * mv Figure mv/v 25 C R = 0 kω, R2 = Full Figure 2 range 4 5 R = 0 kω, R2 = Full range Figure * µa VKA = VI(ref) 25 C Figure ma 25 C VKA = 36 V, VI(ref) = 0 Full Figure 3 range 2 2 VKA = VI(ref), f khz, IKA = ma to 00 ma 25 C Figure Ω *On products compliant to MIL-PRF-38535, this parameter is not production tested. Full range is 40 C to 25 C for Q-suffix devices and 55 C to 25 C for M-suffix devices. The deviation parameters VI(dev) and II(dev) are defined as the differences between the maximum and minimum values obtained over the rated temperature range. The average full-range temperature coefficient of the reference input voltage VI(ref) is defined as: µa µa C V I(dev) VI(ref) ppm 0 V at I(ref) 25 6 C T A where: TA is the rated operating temperature range of the device. Max VI(ref) Min VI(ref) VI(dev) VI(ref) is positive or negative, depending on whether minimum VI(ref) or maximum VI(ref), respectively, occurs at the lower temperature. The output impedance is defined as: zka V KA I KA When the device is operating with two external resistors (see Figure 2), the total dynamic impedance of the circuit is given by: z V I, which is approximately equal to zka R R2. TA 5

6 PARAMETER MEASUREMENT INFORMATION Input VKA Input VKA IKA R II(ref) IKA VI(ref) R2 VI(ref) V KA V I(ref) R R2 I I(ref) R Figure. Test Circuit for V (KA) = V ref Figure 2. Test Circuit for V (KA) > V ref Input Ioff VKA Figure 3. Test Circuit for I off TYPICAL CHARACTERISTICS Table of Graphs FIGURE Reference voltage vs Free-air temperature 4 Reference current vs Free-air temperature 5 Cathode current vs Cathode voltage 6, 7 Off-state cathode current vs Free-air temperature 8 Ratio of delta reference voltage to delta cathode voltage vs Free-air temperature 9 Equivalent input-noise voltage vs Frequency 0 Equivalent input-noise voltage over a 0-second period Small-signal voltage amplification vs Frequency 2 Reference impedance vs Frequency 3 Pulse response 4 Stability boundary conditions 5 6

7 TYPICAL CHARACTERISTICS Reference Voltage V V I(ref) VI(ref) = VKA IKA = 0 ma REFEREE VOLTAGE vs FREE-AIR TEMPERATURE I I(ref) Reference Current µ A REFEREE CURRENT vs FREE-AIR TEMPERATURE IKA = 0 ma R = 0 kω R2 = TA Free-Air Temperature C Figure TA Free-Air Temperature C Figure VKA = VI(ref) TA = 25 C CATHODE CURRENT vs CATHODE VOLTAGE VKA = VI(ref) TA = 25 C CATHODE CURRENT vs CATHODE VOLTAGE I KA Cathode Current ma I KA Cathode Current µ A VKA Cathode Voltage V Figure VKA Cathode Voltage V Figure 7 Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices. 7

8 TYPICAL CHARACTERISTICS I Off-State Cathode Current µ A KA(off) OFF-STATE CATHODE CURRENT vs FREE-AIR TEMPERATURE VKA = 36 V VI(ref) = 0 V I(ref) / V KA mv/v RATIO OF DELTA REFEREE VOLTAGE TO DELTA CATHODE VOLTAGE vs FREE-AIR TEMPERATURE VKA = 3 V to 36 V TA Free-Air Temperature C TA Free-Air Temperature C Figure 8 Figure 9 V n Equivalent Input-Noise Voltage nv/ Hz EQUIVALENT INPUT-NOISE VOLTAGE vs FREQUEY IO = 0 ma TA = 25 C k f Frequency Hz 0 k 00 k Figure 0 Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices. 8

9 TYPICAL CHARACTERISTICS 6 5 EQUIVALENT INPUT-NOISE VOLTAGE OVER A 0-SECOND PERIOD V n Equivalent Input-Noise Voltage µv t Time s f = 0. to 0 Hz IKA = 0 ma TA = 25 C V kω 500 µf 90 Ω (DUT) 2000 µf 820 Ω 6 Ω 0. µf 60 kω + VCC TLE2027 AV = 0 V/mV 6 Ω 6 Ω µf µf VCC + TLE kω AV = 2 V/V 33 kω 2.2 µf CRO MΩ VEE VEE TEST CIRCUIT FOR 0.-Hz TO 0-Hz EQUIVALENT INPUT-NOISE VOLTAGE Figure 9

10 TYPICAL CHARACTERISTICS Small-Signal Voltage Amplification db SMALL-SIGNAL VOLTAGE AMPLIFICATION vs FREQUEY IKA = 0 ma TA = 25 C Output I(K) 5 kω 230 Ω 9 µf kω GND TEST CIRCUIT FOR VOLTAGE AMPLIFICATION A V 0 k 0 k 00 k f Frequency Hz M 0 M Figure 2 00 REFEREE IMPEDAE vs FREQUEY IKA = ma to 00 ma TA = 25 C kω Output zka KA Reference Impedance O Ω 0 50 Ω + I(K) GND TEST CIRCUIT FOR REFEREE IMPEDAE 0. k 0 k 00 k M 0 M f Frequency Hz Figure 3 0

11 TYPICAL CHARACTERISTICS 6 5 TA = 25 C PULSE RESPONSE Input VI 220 Ω Output Input and Output Voltages V Output Pulse Generator f = 00 khz 50 Ω TEST CIRCUIT FOR PULSE RESPONSE GND t Time µs Figure 4 50 Ω STABILITY BOUNDARY CONDITIONS A-VKA = VI(ref) B-VKA = 5 V C-VKA = 0 V D-VKA = 5 V IKA = 0 ma TA = 25 C CL IKA + VI VBATT Cathode Current ma I KA Stable A B D C Stable TEST CIRCUIT FOR CURVE A R = 0 kω IKA 50 Ω CL Load Capacitance µf The areas under the curves represent conditions that may cause the device to oscillate. For curves B, C, and D, R2 and V+ are adjusted to establish the initial VKA and IKA conditions, with CL = 0. VBATT and CL then are adjusted to determine the ranges of stability. 0 CL VI + R2 VBATT TEST CIRCUIT FOR CURVES B, C, AND D Figure 5

12 APPLICATION INFORMATION Table of Application Circuits APPLICATION FIGURE Shunt regulator 6 Single-supply comparator with temperature-compensated threshold 7 Precision high-current series regulator 8 Output control of a three-terminal fixed regulator 9 Higher-current shunt regulator 20 Crowbar 2 Precision 5-V,.5-A, 0.5% regulator 22 5-V precision regulator 23 PWM converter with 0.5% reference 24 Voltage monitor 25 Delay timer 26 Precision current limiter 27 Precision constant-current sink 28 V(BATT) R VO V(BATT) R 0.% VI(ref) R2 0.% Input VO Von 2 V Voff V(BATT) V O R R2 V I(ref) VIT = 2.5 V GND NOTE A: R should provide cathode current ma to the at minimum V(BATT). Figure 6. Shunt Regulator Figure 7. Single-Supply Comparator With Temperature-Compensated Threshold 2

13 APPLICATION INFORMATION V(BATT) V(BATT) In R 30 Ω 2N2222 2N2222 Common µa7805 Out R VO 0.0 µf 4.7 kω R2 0.% R 0.% VO R2 NOTE A: V O R R2 V I(ref) R should provide cathode current ma to the at minimum V(BATT). Figure 8. Precision High-Current Series Regulator V R R2 V I(ref) Min V = VI(ref) + 5 V Figure 9. Output Control of a Three-Terminal Fixed Regulator V(BATT) VO V(BATT) R VO R R C R2 R2 V trip R R2 V I(ref) V O R R2 V I(ref) Figure 20. Higher-Current Shunt Regulator NOTE A: Refer to the stability boundary conditions in Figure 5 to determine allowable values for C. Figure 2. Crowbar 3

14 APPLICATION INFORMATION V(BATT) VO = 5 V In V(BATT) 8.2 kω LM37 Adjust Out 243 Ω 0.% VO = 5 V,.5 A, 0.5% Rb 27.4 kω 0.% 243 Ω 0.% 27.4 kω 0.% NOTE A: Rb should provide cathode current ma to the. Figure 22. Precision 5-V,.5-A, 0.5% Regulator Figure V Precision Regulator 2 V 6.8 kω VCC 5 V +0.5% 0 kω 0 kω 0.% 0 kω 0.% X Not Used + TL598 Feedback Figure 24. PWM Converter With 0.5% Reference 4

15 APPLICATION INFORMATION V(BATT) R3 RA RB R4 2 V 680 Ω R 2 kω R2A R2B Low Limit RB R2B V I(ref) High Limit RA R2A V I(ref) NOTE A: LED on When Low Limit < V(BATT) < High Limit Select R3 and R4 to provide the desired LED intensity and cathode current ma to the. Figure 25. Voltage Monitor On C Off Delay R C I 2 V I (2 V) V I(ref) Figure 26. Delay Timer V(BATT) R RCL 0.% IO V(BATT) IO V I(ref) I O I R KA CL RS 0.% R V (BATT) I O h FE I KA V I(ref) I O R S Figure 27. Precision Current Limiter Figure 28. Precision Constant-Current Sink 5

16 PACKAGE OPTION ADDENDUM 2-Jun-2005 PACKAGING INFORMATION Orderable Device Status () Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) Q2A ACTIVE LCCC FK 20 TBD POST-PLATE Level QPA ACTIVE CDIP JG 8 TBD A42 SNPB Level VPA ACTIVE CDIP JG 8 TBD A42 SNPB Level--- CD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CDE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CDR ACTIVE SOIC D Green (RoHS & no Sb/Br) CDRE4 ACTIVE SOIC D Green (RoHS & no Sb/Br) CDRG4 ACTIVE SOIC D Green (RoHS & no Sb/Br) CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CKTPR OBSOLETE PFM KTP 2 TBD Call TI Call TI Level--260C-UNLIM Level--260C-UNLIM Level--260C-UNLIM Level--260C-UNLIM Level--260C-UNLIM CLP ACTIVE TO-92 LP TBD CU SNPB Level--- CLPM OBSOLETE TO-92 LP 3 TBD Call TI Call TI CLPR ACTIVE TO-92 LP TBD CU SNPB Level--- CPW ACTIVE TSSOP PW 8 50 Pb-Free (RoHS) CPWE4 ACTIVE TSSOP PW 8 50 Pb-Free (RoHS) CPWR ACTIVE TSSOP PW Pb-Free (RoHS) CPWRE4 ACTIVE TSSOP PW Pb-Free (RoHS) CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Level--250C-UNLIM Level--250C-UNLIM Level--250C-UNLIM Level--250C-UNLIM MFK ACTIVE LCCC FK 20 TBD POST-PLATE Level--- MFKB ACTIVE LCCC FK 20 TBD POST-PLATE Level--- MJG ACTIVE CDIP JG 8 TBD A42 SNPB Level--- MJGB ACTIVE CDIP JG 8 TBD A42 SNPB Level--- QD ACTIVE SOIC D 8 75 Pb-Free (RoHS) QDR ACTIVE SOIC D Pb-Free (RoHS) CU NIPDAU CU NIPDAU Level-2-250C- YEAR/ Level--235C-UNLIM Level-2-250C- YEAR/ Level--235C-UNLIM QLP ACTIVE TO-92 LP TBD Call TI Level--220C-UNLIM QLPR ACTIVE TO-92 LP TBD Call TI Level--220C-UNLIM QPWR ACTIVE TSSOP PW TBD CU NIPDAU Level--250C-UNLIM () The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements Addendum-Page

17 PACKAGE OPTION ADDENDUM 2-Jun-2005 for all 6 substances, including the requirement that lead not exceed 0.% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

18 MECHANICAL DATA MCER00A JANUARY 995 REVISED JANUARY 997 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE (0,6) (9,00) (7,) (6,22) (,65) (,4) (,60) 0.05 (0,38) (0,5) MIN 0.30 (7,87) (7,37) (5,08) MAX Seating Plane 0.30 (3,30) MIN 0.00 (2,54) (0,58) 0.05 (0,38) 0.04 (0,36) (0,20) /C 08/96 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification. E. Falls within MIL STD 835 GDIP-T8

19 MECHANICAL DATA MLCC006B OCTOBER 996 FK (S-CQCC-N**) 28 TERMINAL SHOWN LEADLESS CERAMIC CHIP CARRIER NO. OF TERMINALS ** MIN A MAX MIN B MAX (8,69) (9,09) (7,80) (9,09) A SQ B SQ (,23) (6,26) (8,78) (23,83).4 (28,99) (,63) (6,76) 0.76 (9,32) (24,43).65 (29,59) (0,3) (2,58) (2,58) (2,6).047 (26,6) (,63) (4,22) (4,22) (2,8).063 (27,0) (0,5) 0.00 (0,25) (2,03) (,63) (0,5) 0.00 (0,25) (,40) (,4) (,4) (0,89) (0,7) (0,54) (,27) (,4) (0,89) / D 0/96 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a metal lid. D. The terminals are gold plated. E. Falls within JEDEC MS-004

20 MECHANICAL DATA MPSF00F JANUARY 996 REVISED JANUARY 2002 KTP (R-PSFM-G2) PowerFLEX PLASTIC FLANGE-MOUNT PACKAGE (6,7) (5,9) (5,79) 0.28 (5,54) (2,03) (,78) (,27) (,02) 0.30 (3,30) NOM 0.00 (0,25) NOM 0.38 (9,68) 0.37 (9,42) 0.25 (5,46) NOM (6,27) (6,02) (7,29) (7,03) Thermal Tab (See Note C) 0.00 (2,54) (2,29) (0,8) MAX Seating Plane (2,29) 0.80 (4,57) 0.03 (0,79) (0,63) 0.00 (0,25) M (0,3) 0.00 (0,02) (0,0) 0.00 (0,25) NOM Gage Plane (,9) (0,94) 0.00 (0,25) /M 0/02 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. The center lead is in electrical contact with the thermal tab. D. Dimensions do not include mold protrusions, not to exceed (0,5). E. Falls within JEDEC TO-252 variation AC. PowerFLEX is a trademark of Texas Instruments.

21

22 MECHANICAL DATA MSOT002A OCTOBER 994 REVISED NOVEMBER 200 LP (O-PBCY-W3) PLASTIC CYLINDRICAL PACKAGE (5,2) 0.65 (4,9) DIA 0.75 (4,44) 0.25 (3,7) 0.20 (5,34) 0.70 (4,32) 0.57 (4,00) MAX Seating Plane (,27) C (2,70) MIN 0.04 (2,65) FORMED LEAD OPTION (0,56) 0.06 (0,4) STRAIGHT LEAD OPTION D 0.06 (0,4) 0.04 (0,35) 0.35 (3,43) MIN (,40) (,4) 0.05 (2,67) (2,4) (2,67) (2,03) 0.05 (2,67) (2,03) /C 0/0 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Lead dimensions are not controlled within this area D. FAlls within JEDEC TO -226 Variation AA (TO-226 replaces TO-92) E. Shipping Method: Straight lead option available in bulk pack only. Formed lead option available in tape & reel or ammo pack.

23 MECHANICAL DATA MSOT002A OCTOBER 994 REVISED NOVEMBER 200 LP (O-PBCY-W3) PLASTIC CYLINDRICAL PACKAGE (3,70) (,70).260 (32,00) (23,00) (6,50) 0.60 (5,50) (2,50) (0,50) MIN (9,75) (8,50) (,00) (8,50) (9,00) (9,00) 0.27 (5,50) (7,50) 0.4 (2,90) (2,40) 0.4 (2,90) 0.69 (4,30) (2,40) 0.46 (3,70) (6,75) (5,95) 0.52 (3,00) (2,40) DIA TAPE & REEL /C 0/0 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Tape and Reel information for the Format Lead Option package. 2

24 MECHANICAL DATA MTSS00C JANUARY 995 REVISED FEBRUARY 999 PW (R-PDSO-G**) 4 PINS SHOWN PLASTIC SMALL-OUTLINE PACKAGE 0,30 0,65 0,0 M 0, ,50 4,30 6,60 6,20 0,5 NOM Gage Plane A ,25 0,75 0,50,20 MAX 0,5 0,05 Seating Plane 0,0 DIM PINS ** A MAX 3,0 5,0 5,0 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9, /F 0/97 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,5. D. Falls within JEDEC MO-53

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