Coupled symbolic-numerical model reduction using the hierarchical structure of nonlinear electrical circuits

Transcription

1 Coupled symbolic-numerical model reduction using the hierarchical structure of nonlinear electrical circuits Model Reduction for Complex Dynamical Systems (ModRed ( 2010) TU Berlin, Berlin, Germany, December 2-4, 2010 Oliver Schmidt Patrick Lang Slide 1

2 Outline Introduction Hierarchical Modelling and Model Reduction Implementations and Applications Slide 2

3 Outline Introduction and Foundations Analysis and Reduction Methods Symbolic Techniques Hierarchical Modelling and Model Reduction Implementations and Applications Slide 3

4 Analysis and Reduction Methods numerical techniques parameters given as numerical values applicable to very large systems no qualitative insights symbolic techniques symbolic parameters not for too large circuits (complexity) analytical description of functional relations and dependences (qualitative insights) helpful in early stages of design process Slide 4

5 Symbolic Techniques original DAE reference solution reduced DAE original reduced error functione error bound ε numerical analysisa DAE F R R 1 R 2 R k DAE G y F = A( F, u ) E( y, y ) < ε F G y G = A( G, u ) Slide 5

6 Symbolic Techniques algebraic manipulations x = f ( y) 0= g( x, y) term cancellations F j : N i= 1 t ( x) = 0 i ( f ( y y) 0= g ), N Gj : t ( x ɶ ) = 0 i k i= 1 original reduced Slide 6

7 Outline Introduction and Foundations Hierarchical Modelling and Model Reduction Hierarchical Modelling Hierarchical Model Reduction Algorithm Subsystem Reduction Subsystem Sensitivities Subsystem Ranking Implementations and Applications Slide 7

8 SyreNe Subproject 5 original DAE reduced DAE original reduced numerical efficiency applicability to large systems analytical insights parameterized behavioral models coupling Slide 8

9 Hierarchical Structure system level f i Phase comparator Loop filter F(s) A=1 VCO block level f o IN + - VDD VSS OUT transistor level level of components hierarchical layout Drain SiO 2 Gate Metal Source different subsystems, coupled by an interconnecting structure P N Bulk P Slide 9

10 Hierarchical Reduction idea: exploitation of hierarchy reduce subsystems separately replace subsystems by reduced models advantages faster processing of smaller problems coupling of different techniques recursive approach possible level concept larger nonlinear circuits processable entire system f ( x, y, z ) = 0 f ( x, y, z ) = 0 f 3 f ( x 0 3 ( x, y 3 1, z, y 3 1, x 2, y 2, x, y, x ) = 0 f 3 3 4, y 4 ( x 4 4 ) = 0 subsystem 1 subsystem 2 subsystem 3 subsystem 4 netlist based DAE PDE, y 4, z 4 ) = 0 Slide 10

11 Hierarchical Reduction Algorithm summary choose reduction methods for separated subsystems compute several reduced models for each subsystem compute subsystem sensitivities hierarchical reduction by means of subsystem ranking and suitable replacements guaranteed accuracy by checking the accumulated error after each replacement Slide 11

12 Subsystem Reduction Workflow simulate subsystem in test bench (a), record voltage potentials at subsystem terminals connect subsystem terminals to voltage sources (b) d sub- system a setup of describing system of equations and reduction (c) sub- system test bench removal of sources yields reduced subsystem (d) c sub- system b Slide 12

13 Subsystem Sensitivities relation between errors of subsystem and entire system not available determine degree of reduction of subsystems by influence on entire system simulate original system replace Ti by reduced system Ti,k simulate perturbed entire system compute error on output of entire system T3... T3,1 T3,m entire system T1 T2 T3 T4 entire system T1 T2 T3,k T4 Slide 13

14 Subsystem Sensitivities Definition Definition Subsystem Sensitivity electrical circuit entire system T1 T2 T3 T4 reduction information, e.g. or =r3k(t (T3) T3,k 3,k=r =r3k error function sensitivity of : entire system T1 T2 T3,k T4 Slide 14

15 Subsystem Ranking for each subsystem order the entries of the sensitivity vector increasingly w.r.t. the error in each step of the hierarchical reduction take the minimum of all first entries in the ordered sensitivity vectors replace the respective subsystem by the corresponding model check the accumulated error Slide 15

16 Subsystem Ranking entire system T1 T2 T3 T4 Slide 16

17 Subsystem Ranking entire system T1 T2 T3 T4 Slide 17

18 Subsystem Ranking entire system T1 T2 T3 T4 Slide 18

19 Subsystem Ranking entire system T1 T2 T3 T4 Slide 19

20 Subsystem Ranking entire system T1 T2 T3 T4 Slide 20

21 Subsystem Ranking entire system T1 T2 T3 T4 Slide 21

22 Subsystem Ranking entire system T1 T2 T3 T4 Slide 22

23 Subsystem Ranking entire system T1 T2 T3 T4 Slide 23

24 Subsystem Ranking entire system T1 T2 T3 T4 Slide 24

25 Subsystem Ranking entire system T1 T2 T3 T4 Slide 25

26 Subsystem Ranking entire system T1 T2 T3 T4 Slide 26

27 Subsystem Ranking entire system T1 T2 T3 T4 Slide 27

28 Subsystem Ranking entire system T1 T2 T3 T4 Slide 28

29 Subsystem Ranking entire system T1 T2 T3 T4 Slide 29

30 Subsystem Ranking entire system T1 T2 T3 T4 Slide 30

31 Subsystem Ranking entire system T1 T2 T3 T4 Slide 31

32 Subsystem Ranking entire system T1 T2 T3 T4 etc. Slide 32

33 Outline Introduction and Foundations Hierarchical Modelling and Model Reduction Implementations and Applications Implementations Hierarchical Reduction of a Differential Amplifier Hierarchical Reduction of an Operationial Amplifier Slide 33

34 Implementations hierarchical reduction algorithm has been implemented in ReduceSubcircuits computation of reduced subsystem models yields entire system with all reduced subsystem models appended (advantage: possibility for easy switching among different reduced models) SensitivityAnalysis computes sensitivities of each subsystem returns sensitivity vectors with entries ordered increasingly w.r.t. the error HierarchicalReduction computes ranking in accordance with the subsystem sensitivities and performs subsystem replacements in the corresponding order yields hierarchically reduced entire system with all reduced subsystem models appended Slide 34

35 Example Differential Amplifier differential amplifier specification discretized PDE transmission line models (20 line segments each) sine wave excitation: 2 V, 100 khz full system: 167 eq., 645 terms non-hierarchical symbolic reduction (2h 11min) 3% error: 124 eq., 416 terms 12 V -12 V Slide 35

36 Example Differential Amplifier differential amplifier specification discretized PDE transmission line models (20 line segments each) sine wave excitation: 2 V, 100 khz full system: 167 eq., 645 terms non-hierarchical symbolic reduction (2h 11min) 3% error: 124 eq., 416 terms 10% error: 44 eq., 284 terms 12 V -12 V Slide 36

37 Example Differential Amplifier differential amplifier specification discretized PDE transmission line models (20 line segments each) sine wave excitation: 2 V, 100 khz full system: 167 eq., 645 terms non-hierarchical symbolic reduction (2h 11min) 3% error: 124 eq., 416 terms 10% error: 44 eq., 284 terms 12 V -12 V L8 L1 L9 DUT2 DUT Slide 37

38 Example Differential Amplifier differential amplifier specification discretized PDE transmission line models (20 line segments each) sine wave excitation: 2 V, 100 khz full system: 167 eq., 645 terms non-hierarchical symbolic reduction (2h 11min) 3% error: 124 eq., 416 terms 10% error: 44 eq., 284 terms hierarchical coupled symbolicnumerical reduction (4min 50sec) 3% error: 62 eq., 315 terms 12 V -12 V L8 L1 L9 DUT2 DUT Slide 38

39 Example Differential Amplifier differential amplifier specification discretized PDE transmission line models (20 line segments each) sine wave excitation: 2 V, 100 khz full system: 167 eq., 645 terms non-hierarchical symbolic reduction (2h 11min) 3% error: 124 eq., 416 terms 10% error: 44 eq., 284 terms hierarchical coupled symbolicnumerical reduction (4min 50sec) 3% error: 62 eq., 315 terms 10% error: 60 eq., 249 terms 12 V -12 V L8 L1 L9 DUT2 DUT Slide 39

40 Example Differential Amplifier differential amplifier 12 V specification L8 discretized PDE transmission line models (20 line segments each) sine wave excitation: 2 V, 100 khz L1 DUT2 cooperation with SyreNe-SP3, TU Berlin (T. Stykel, A. Steinbrecher) reduction of L1 using PABTEC (BT), reduction of L8, L9 using Arnoldi, symbolic reduction of DUT, DUT2-12 V L9 DUT full system: 191 eq., 695 terms hierarchically reduced system: time cost: 8min 20sec 3% error: 96 eq., 2114 terms Slide 40

41 Example Differential Amplifier differential amplifier 12 V specification L8 discretized PDE transmission line models (20 line segments each) sine wave excitation: 2 V, 100 khz L1 DUT2 cooperation with SyreNe-SP3, TU Berlin (T. Stykel, A. Steinbrecher) reduction of L1 using PABTEC (BT), reduction of L8, L9 using Arnoldi, symbolic reduction of DUT, DUT2-12 V L9 DUT full system: 191 eq., 695 terms hierarchically reduced system: time cost: 8min 20sec 3% error: 96 eq., 2114 terms 10% error: 84 eq., 1190 terms Slide 41

42 Example Operational Amplifier operational amplifier op741 specification 7 subsystems symbolic reductions error bounds [%] {2,10,20,30,50,70,90,100} 10% error (entire system) transient analysis L² error function input: sine wave excitation, 0.8 V amplitude, 1 khz frequency, T=[0 s, s] Slide 42

43 Example Operational Amplifier operational amplifier op741 full system: 215 eq., 1050 terms non-hierarchical symbolic reduction 10% permitted error 97 eq., 593 terms time cost: ~10,5h Slide 43

44 Example Operational Amplifier operational amplifier op741 full system: 215 eq., 1050 terms non-hierarchical symbolic reduction 10% permitted error 97 eq., 593 terms time cost: ~10,5h hierarchical reduction 10% permitted error 153 eq., 464 terms time cost: 2h 22min Slide 44

45 Earlier Results compared to non-hierarchical approach significant savings in time for both system reduction and system simulation models with similar or better quality w.r.t. number of equations and terms error Slide 45

46 Earlier Results further excitations (operational amplifier) pulse sum of three sine waves sine wave Slide 46

47 Earlier Results further excitations (differential amplifier) pulse sum of sine waves sum of pulses Slide 47

48 Thank you for your attention. Slide 48