Low Offset Voltage: 5mV (Max.) Rail-to-Rail Input / Output. Quiescent Current: 40μA per Amplifier (Typ.) Gain-Bandwidth Product: 1MHz (Typ.
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1 MHz, Low Power, CMOS, EMI Hardened, ailtoail Dual Operational Amplifier. Features SingleSupply Operation from. ~ 5.5 Low Offset oltage: 5m (Max.) ailtoail Input / Output Quiescent Current: 40μA per Amplifier (Typ.) GainBandwidth Product: MHz (Typ.) Operating Temperature: 40 C ~ 5 C Low Input Bias Current: 0pA (Typ.) Available in SOIC and MSOP8 Packages. General Description The GT7358 is a single supply, low power CMOS dual operational amplifier; these amplifiers offer bandwidth of MHz, railtorail inputs and outputs, and singlesupply operation from. to 5.5. The embedded antif filter can significantly increase the F immunity without extra components. Typical low quiescent supply current of 80μA in dual operational amplifiers within one chip and very low input bias current of 0pA make the devices an ideal choice for low offset, low power consumption and high impedance applications such as smoke detectors, photodiode amplifiers, and other sensors. The GT7358 is available in SOIC and MSOP8 packages. The extended temperature range of 40 o C to 5 o C over all supply voltages offers additional design flexibility. 3. Applications Portable Equipment Medical Instrumentation Mobile Communications BatteryPowered Instruments Smoke Detector Handheld Test Equipment Sensor Interface 4. Pin Configuration 4. GT7358 SOIC and MSOP8 (Top iew) OUTA 8 DD INA 3 MAKING 7 6 OUTB INA INB SS 4 5 INB Figure. Pin Assignment Diagram (SOIC and MSOP8 Package) Note: Please see section Part Markings for detailed Marking Information. Copyright 00 Giantec Semiconductor Inc. (Giantec). All rights reserved. Giantec reserves the right to make changes to this specification and its products at any time without notice. Giantec products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for critical medical or surgical equipment, aerospace or military, or other applications planned to support or sustain life. It is the customer's obligation to optimize the design in their own products for the best performance and optimization on the functionality and etc. Giantec assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and prior placing orders for products. A0 /6
2 5. Application Information 5. Size GT7358 series op amps are unitygain stable and suitable for a wide range of generalpurpose applications. The small footprints of the GT7358 series packages save space on printed circuit boards and enable the design of smaller electronic products. 5. Power Supply Bypassing and Board Layout GT7358 series operates from a single. to 5.5 supply or dual ±. to ±.75 supplies. For best performance, a 0.μF ceramic capacitor should be placed close to the DD pin in single supply operation. For dual supply operation, both DD and SS supplies should be bypassed to ground with separate 0.μF ceramic capacitors. 5.3 Low Supply Current The low supply current (typical 80μA) of GT7358 series will help to maximize battery life. They are ideal for battery powered systems 5.4 Operating oltage GT7358 series operate under wide input supply voltage (. to 5.5). In addition, all temperature specifications apply from 40 o C to 5 o C. Most behavior remains unchanged throughout the full operating voltage range. These guarantees ensure operation throughout the single LiIon battery lifetime 5.5 ailtoail Input The input commonmode range of GT7358 series extends 00m beyond the supply rails ( SS0. to DD0.). This is achieved by using complementary input stage. For normal operation, inputs should be limited to this range. 5.6 ailtoail Output ailtoail output swing provides maximum possible dynamic range at the output. This is particularly important when operating in low supply voltages. The output voltage of GT7358 series can typically swing to less than 0m from supply rail in light resistive loads (>00kΩ), and 60m of supply rail in moderate resistive loads (0kΩ). 5.7 Capacitive Load Tolerance The GT7358 series can directly drive 50pF capacitive load in unitygain without oscillation. Increasing the gain enhances the amplifier s ability to drive greater capacitive loads. In unitygain configurations, the capacitive load drive can be improved by inserting an isolation resistor ISO in series with the capacitive load, as shown in Figure. ISO OUT IN C L Figure. Indirectly Driving a Capacitive Load Using Isolation esistor The bigger the ISO resistor value, the more stable OUT will be. However, if there is a resistive load L in parallel with the capacitive load, a voltage divider (proportional to ISO/ L) is formed, this will result in a gain error. The circuit in Figure 3 is an improvement to the one in Figure. F provides the DC accuracy by feedforward the IN to L. C F and ISO serve to counteract the loss of phase margin by feeding the high frequency component of the output signal back to the amplifier s inverting input, thereby preserving the phase margin in the overall feedback loop. Capacitive drive can be increased A0 /6
3 by increasing the value of C F. This in turn will slow down the pulse response. C F F ISO OUT IN C L L Figure 3. Indirectly Driving a Capacitive Load with DC Accuracy 5.8 Differential amplifier The differential amplifier allows the subtraction of two input voltages or cancellation of a signal common the two inputs. It is useful as a computational amplifier in making a differential to singleend conversion or in rejecting a common mode signal. Figure 4. shown the differential amplifier using GT7358. IN 3 OUT IP EF 4 Figure 4. Differential Amplifier OUT ( 3 4 ) 4 IN ( IP 3 4 ) 3 EF If the resistor ratios are equal (i.e. = 3 and = 4), then OUT ( IPIN) EF 5.9 Instrumentation Amplifier The input impedance of the previous differential amplifier is set by the resistors,, 3, and 4. To maintain the high input impedance, one can use a voltage follower in front of each input as shown in the following two instrumentation amplifiers. 5.0 ThreeOpAmp Instrumentation Amplifier The dual GT7358 can be used to build a threeopamp instrumentation amplifier as shown in Figure 5. A0 3/6
4 IM IP 3 OUT EF 4 Figure 5. ThreeOpAmp Instrumentation Amplifier The amplifier in Figure 5 is a high input impedance differential amplifier with gain of /. The two differential voltage followers assure the high input impedance of the amplifier. o 4 ( )( IP IN) 3 5. TwoOpAmp Instrumentation Amplifier GT7358 can also be used to make a high input impedance twoopamp instrumentation amplifier as shown in Figure IM IP OUT Figure 6. TwoOpAmp Instrumentation Amplifier Where = 3 and = 4. If all resistors are equal, then o =( IP IN ) A0 4/6
5 5. SingleSupply Inverting Amplifier The inverting amplifier is shown in Figure 6. The capacitor C is used to block the DC signal going into the AC signal source IN. The value of and C set the cutoff frequency to ƒ C=/(π C ). The DC gain is defined by OUT=( / ) IN IP C IN 3 OUT 4 Figure 7. Single Supply Inverting Amplifier 5.3 Low Pass Active Filter The low pass active filter is shown in Figure 8. The DC gain is defined by /. The filter has a 0dB/decade rolloff after its corner frequency ƒ C=/(π 3C ). C IN OUT 3 Figure 8. Low Pass Active Filter 5.4 SallenKey nd Order Active LowPass Filter GT7358 can be used to form a nd order SallenKey active lowpass filter as shown in Figure 9. The transfer function from IN to OUT is given by OUT CC LP ( S) ALP IN S S( ) C C C C A CC Where the DC gain is defined by A LP= 3/ 4, and the corner frequency is given by C C C The pole quality factor is given by A0 5/6
6 C Q C C C ALP C Let == and C=C=C, the corner frequency and the pole quality factor can be simplified as below C C And Q= 3/ 4 C IN C 3 OUT 4 Figure 9. SanllenKey nd Order Active LowPass Filter 5.5 SallenKey nd Order highpass Active Filter The nd order Sallenkey highpass filter can be built by simply interchanging those frequency selective components,, C, and C as shown in Figure 0. C C IN OUT 3 4 Figure 0. SanllenKey nd Order Active HighPass Filter OUT IN ( S) S S ( C S AHP A C C HP ) C C Where A HP = 3 / 4 A0 6/6
7 6. Electrical Characteristics 6. Absolute Maximum atings Condition Min Max Power Supply oltage ( DD to ss) Analog Input oltage (IN or IN) ss0.5 DD0.5 PDB Input oltage ss0.5 7 Operating Temperature ange 40 C 5 C Junction Temperature 50 C Storage Temperature ange 65 C 50 C Lead Temperature (soldering, 0sec) 300 C Package Thermal esistance (T A=5 ) SOIC, θ JA 30 C MSOP8, θ JA 0 C Note: Stress greater than those listed under Absolute Maximum atings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions outside those indicated in the operational sections of this specification are not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. A0 7/6
8 6. Electrical Characteristics ( DD = 5, ss = 0, CM = 0, OUT = DD /, L =00K tied to DD /, SHDNB = DD, T A = 40 C to 5 C, unless otherwise noted. Typical values are at T A =5 C.) (Notes ) Parameter Symbol Conditions Min. Typ. Max. Units Supplyoltage ange Quiescent Supply Current (per Amplifier) DD Guaranteed by the PS test. 5.5 DD = μa Input Offset oltage OS m Input Offset oltage Tempco Δ OS/ΔT μ/ C Input Bias Current I B (Note ) 0 pa Input Offset Current I OS (Note ) 0 pa Input CommonMode oltage ange CM 0. DD0. CommonMode ejection atio CM DD=5.5 ss0. CM DD db ss CM db PowerSupply ejection atio PS DD =.5 to db OpenLoop oltage Gain A DD=5, L=00k, 0.05 O 4.95 DD=5, L=5k, 0.05 O db db Output oltage Swing OUT IN IN 0m DD OH 6 m L = 00k to DD/ OL SS 6 m IN IN 0m DD OH 60 m L = 5k to DD/ OL SS 60 m Output ShortCircuit Current I SC Sinking or Sourcing 40 ma Gain Bandwidth Product GBW A = / MHz Slew ate S A = / 0.6 /μs Settling Time t S To 0.%, OUT = step A = / 5 μs Over Load ecovery Time IN Gain= S μs Input oltage Noise Density e n ƒ = 0kHz 0 n/hz Note : All devices are 00% production tested at T A = 5 C ; all specifications over the automotive temperature range is guaranteed by design, not production tested. Note : Parameter is guaranteed by design. A0 8/6
9 6.3 Typical characteristics At T A =5 C, L =00 kω connected to S / and OUT = S /, unless otherwise noted. A0 9/6
10 At T A =5 C, L =00 kω connected to S / and OUT = S /, unless otherwise noted. Sourcing Current IQ Sinking Current I SC s=±.5 G=5 IN=500m G=, FB=00KΩ G=, FB=00KΩ Phase ising Edge Gain Falling Edge A0 0/6
11 7. Ordering Information GT XXXX XX X X Temperature ange I A3 Industrial: 40 C ~85 C Automotive: 40 C~5 C Pb Status G GEEN Package Type: G S SOIC MSOP Part Number Giantec Prefix GT Giantec Order Number Package Description Package Option GT7358GGA3T SOIC Tape and eel 4000 GT7358SGA3T MSOP8 Tape and eel 4000 A0 /6
12 8. Part Markings 8. GT7358GGA3 (Top iew) G T G G A3 Lot Number Y Y W W S GT7358GGA3 Lot Number States the last 9 characters of the wafer lot information Pin Indicator YY Seal Year 00 = = = 099 WW Seal Week 0 = Week 0 = Week... 5 = Week 5 5 = Week 5 S Subcon Code J = ASESH L = ASEKS Die ersion A0 /6
13 8. GT7358SGA3 (Top iew) G T Lot Number Y Y W W S GT7358 GT7358SGA3 Lot Number States the last 7 characters of the wafer lot information Pin Indicator YY Seal Year 00 = = = 099 WW Seal Week 0 = Week 0 = Week... 5 = Week 5 5 = Week 5 S Subcon Code J = ASESH L = ASEKS Die ersion A0 3/6
14 9. Package Information 9. SOIC Detail A D E E ZD b Detail A A GAUGE PLANE e A SEATING PLANE L L Θ SYMBOLS DIMENSIONS IN MILLIMETES DIMENSIONS IN INCHES MIN NOM MAX MIN NOM MAX A A b D E E e L BSC BSC L ZD Θ BSC EF BSC. 0.0 EF. 8 Note:. Controlling Dimension:MM. Dimension D and E do not include Mold protrusion 3. Dimension b does not include dambar protrusion/intrusion. 4. efer to Jedec standard MS0 5. Drawing is not to scale A0 4/6
15 9. MSOP8 D e C L E E (4X) A θ A b A SYMBOLS DIMENSIONS IN MILLIMETES DIMENSIONS IN INCHES MIN NOM MAX MIN NOM MAX A A A b C D E E e L 4.90 BSC 0.65 BSC BSC 0.06 BSC 0.0 Θ Note:. Controlling Dimension:MM. Dimension D and E do not include Mold protrusion 3. efer to Jedec standard MO87 4. Drawing is not to scale A0 5/6
16 0. evision History evision Date Descriptions A0 Sept.,0 Initial ersion A0 6/6
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