200MHz, High Speed, CMOS, Rail-to-Rail Operational Amplifier. Low Offset Voltage: 10mV (Max.) Rail-to-Rail Input / Output

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1 00MHz, High Speed, CMOS, Rail-to-Rail Operational Amplifier Advanced. Features Single-Supply Operation from +.5 ~ +5.5 Low Offset oltage: 0m (Max.) Rail-to-Rail Input / Output Quiescent Current:7.8mA (Typ.) Gain-Bandwidth Product: 00MHz (Typ.) Operating Temperature: -40 C ~ +5 C Low Input Bias Current: 0pA (Typ.) Available in MSOP8 and SOP8 Packages. General Description The GT7 is wideband, low-noise, low-distortion operational amplifier, that offer rail-to-rail output and single-supply operation down to.5. They draw 7.8mA of quiescent supply current, as well as low input voltage-noise density (3n/Hz) and low input current-noise density (400fA/Hz). These features make the devices an ideal choice for applications that require low distortion and low noise. The GT7 has output which swing rail-to-rail and their input common-mode voltage range includes ground and offer wide bandwidth to 00MHz (G=+).They are specified over the extended industrial temperature range (-45 o C ~ 5 o C).The single GT7 is available in space-saving, MSOP8 and SOP-8 packages. 3. Applications Portable Equipment Medical Instrumentation Mobile Communications Handheld Test Equipment Smoke Detector Imaging/video Sensor Interface 4. Pin Configuration 4. GT7 MSOP8 and SOP8 (Top iew) Figure. Pin Assignment Diagram (MSOP8 and SOP8 Package) Note: Please see section Part Markings for detailed Marking Information. Copyright 00 Giantec Semiconductor Inc. (Giantec). All rights reserved. Giantec reserves the right to make changes to this specification and its products at any time without notice. Giantec products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for critical medical or surgical equipment, aerospace or military, or other applications planned to support or sustain life. It is the customer's obligation to optimize the design in their own products for the best performance and optimization on the functionality and etc. Giantec assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and prior placing orders for products. A0 /9

2 5. Application Information 5. Size GT7 series op amps are unity-gain stable and suitable for a wide range of general-purpose applications. The small footprints of the GT7 series packages save space on printed circuit boards and enable the design of smaller electronic products. 5. Power Supply Bypassing and Board Layout GT7 series operates from a single.5 to 5.5 supply or dual ±.5 to ±.75 supplies. For best performance, a 0.μF ceramic capacitor should be placed close to the DD pin in single supply operation. For dual supply operation, both DD and SS supplies should be bypassed to ground with separate 0.μF ceramic capacitors. 5.3 Low Supply Current The low supply current (typical 7.8mA) of GT7 series will help to maximize battery life. They are ideal for battery powered systems 5.4 Operating oltage GT7 series operate under wide input supply voltage (. to 5.5). In addition, all temperature specifications apply from -40 o C to +5 o C. Most behavior remains unchanged throughout the full operating voltage range. These guarantees ensure operation throughout the single Li-Ion battery lifetime 5.5 Rail-to-Rail Input The input common-mode range of GT7 series extends 00m beyond the supply rails ( SS -0. to DD +0.). This is achieved by using complementary input stage. For normal operation, inputs should be limited to this range. 5.6 Rail-to-Rail Output Rail-to-Rail output swing provides maximum possible dynamic range at the output. This is particularly important when operating in low supply voltages. The output voltage of GT7 series can typically swing to less than 0m from supply rail in light resistive loads (>00kΩ), and 60m of supply rail in moderate resistive loads (0kΩ). 5.7 Capacitive Load Tolerance The GT7 series can directly drive 00pF capacitive load in unity-gain without oscillation. Increasing the gain enhances the amplifier s ability to drive greater capacitive loads. In unity-gain configurations, the capacitive load drive can be improved by inserting an isolation resistor R ISO in series with the capacitive load, as shown in Figure. - R ISO OUT IN + C L Figure. Indirectly Driving a Capacitive Load Using Isolation Resistor The bigger the R ISO resistor value, the more stable OUT will be. However, if there is a resistive load R L in parallel with the capacitive load, a voltage divider (proportional to R ISO /R L ) is formed, this will result in a gain error. The circuit in Figure 3 is an improvement to the one in Figure. R F provides the DC accuracy by feed-forward the IN to R L. C F and R ISO serve to counteract the loss of phase margin by feeding the high frequency component of the output signal back to the amplifier s inverting input, thereby preserving the phase margin in the overall feedback loop. Capacitive drive can be increased A0 /9

3 by increasing the value of C F. This in turn will slow down the pulse response. Figure 3. Indirectly Driving a Capacitive Load with DC Accuracy 5.8 Differential amplifier The differential amplifier allows the subtraction of two input voltages or cancellation of a signal common the two inputs. It is useful as a computational amplifier in making a differential to single-end conversion or in rejecting a common mode signal. Figure 4. shown the differential amplifier using GT7. OUT ( R R R3 R 4 ) R4 R IN R R ( IP R R R3 R 4 ) Figure 4. Differential Amplifier R3 R REF If the resistor ratios are equal (i.e. R =R 3 and R =R 4 ), then OUT R R ( IP IN) REF 5.9 Instrumentation Amplifier The input impedance of the previous differential amplifier is set by the resistors R, R, R 3, and R 4. To maintain the high input impedance, one can use a voltage follower in front of each input as shown in the following two instrumentation amplifiers. 5.0 Three-Op-Amp Instrumentation Amplifier The triple GT7 can be used to build a three-op-amp instrumentation amplifier as shown in Figure 5. A0 3/9

4 Figure 5. Instrument Amplifier The amplifier in Figure 5 is a high input impedance differential amplifier with gain of R /R. The two differential voltage followers assure the high input impedance of the amplifier. 5.Two-Op-Amp Instrumentation Amplifier GT7 can also be used to make a high input impedance two-op-amp instrumentation amplifier as shown in Figure 6. Figure 6. Instrument Amplifier o R ( 4 )( ) R 3 Where R =R 3 and R =R 4. If all resistors are equal, then o =( - ) 5. Single-Supply Inverting Amplifier The inverting amplifier is shown in Figure 6. The capacitor C is used to block the DC signal going into the AC signal source IN. The value of R and C set the cut-off frequency to f C =/(πr C ). The DC gain is defined by OUT =-(R /R ) IN A0 4/9

5 Figure 7. Instrument Amplifier 5.3 Low Pass Active Filter The low pass active filter is shown in Figure 8. The DC gain is defined by R /R. The filter has a -0dB/decade roll-off after its corner frequency ƒ C =/(πr 3 C ). C R IN R - + OUT R 3 Figure 8. Low Pass Active Filter 5.4 Sallen-Key nd Order Active Low-Pass Filter GT7 can be used to form a nd order Sallen-Key active low-pass filter as shown in Figure 9. The transfer function from IN to OUT is given by OUT C CR R LP ( S) A IN S S( LP ) C R C R CR CR A C CR R Where the DC gain is defined by A LP =+R 3 /R 4, and the corner frequency is given by A0 5/9

6 C C C R R The pole quality factor is given by C Q C R C R C R ALP C R Let R=R=R and C=C=C, the corner frequency and the pole quality factor can be simplified as below C CR And Q=-R 3/ R 4 Figure 9. Sanllen-Key nd Order Active Low-Pass Filter 5.5 Sallen-Key nd Order high-pass Active Filter The nd order Sallen-key high-pass filter can be built by simply interchanging those frequency selective components R, R, C, and C as shown in Figure 0. Figure 0. Sanllen-Key nd Order Active High-Pass Filter OUT IN ( S) S S ( CR S CR A HP A CR HP ) CC R R Where A HP =+R 3 /R 4 A0 6/9

7 6. Electrical Characteristics 6. Absolute Maximum Ratings Condition Min Max Power Supply oltage ( DD to ss) Analog Input oltage (IN+ or IN-) ss-0.5 DD +0.5 PDB Input oltage ss Operating Temperature Range -40 C +5 C Junction Temperature +50 C Storage Temperature Range -65 C +50 C Lead Temperature (soldering, 0sec) +300 C Package Thermal Resistance (T A =+5 C) MSOP8, θ JA 90 C SOP8, θ JA 30 C Note: Stress greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions outside those indicated in the operational sections of this specification are not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. A0 7/9

8 6. Electrical Characteristics ( DD = +5, ss = 0, CM = 0, OUT = DD /, R L =00K tied to DD /, SHDNB = DD, T A = -40 C to +5 C, unless otherwise noted. Typical values are at T A =+5 C.) (Notes,) Parameter Symbol Conditions Min. Typ. Max. Units Supply-oltage Range Guaranteed by the PSRR test Quiescent Supply Current (per Amplifier) DD DD = ma T A =5 C Input Offset oltage OS T A =-40 C~+85 C m T A =-40 C~+5 C Input Offset oltage Tempco Δ OS /ΔT - - μ/ C Input Bias Current I B (Note 3) pa Input Offset Current I OS (Note 3) pa Input Common-Mode oltage Range CM Guaranteed by the T A = 5C CMRR test, T A = -40C ~ +5C DD +0. ss-0. CM DD +0. T A = 5C Common-Mode Rejection Ratio CMRR ss CM 5 DD T A = 5C db ss-0. CM DD +0. T A = -40C ~ +5C Power-Supply Rejection Ratio PSRR DD = +.5 to db R L = 0k to DD / OUT = 00m to DD -5m Open-Loop oltage Gain A R L = k to DD / OUT = 00m to DD -50m db R L = 500 to DD / OUT = 350m to DD -500m Output oltage Swing OUT IN+ - IN- 0m DD - OH R L = 0k to DD / OL - SS IN+ - IN- 0m DD - OH R L = k to DD / OL - SS m IN+ - IN- 0m DD - OH R L = 500 to DD / OL - SS Output Short-Circuit Current I SC Sinking or Sourcing ma -3 db Gain Bandwidth Product GBW A = +/ MHz Slew Rate SR A = +/ /μs A0 8/9

9 Parameter Symbol Conditions Min. Typ. Max. Units Input Capacitance Cin.5 pf Differential Phase error (NTSC) DP G=,R L =50Ω Deg Differential Gain error (NTSC) DG G=,R L =50Ω db Settling Time t S To 0.0%, OUT = step A = +/ Capacitive-Load Stability Cload No sustained oscillations Av=+/ Ns 00 pf Over Load Recovery Time IN Gain= S - - μs Input oltage Noise Density e n ƒ = KHz f=30khz n/hz Input Current Noise Density in F=KHz fa/hz Total Harmonic Distortion plus Noise THD+N ƒ C =5MHZ, OUT =p-p,g= db Note : All devices are 00% production tested at T A = +5 C; all specifications over the automotive temperature range is guaranteed by design, not production tested. Note : Parameter is guaranteed by design. Note 3: Peak-to-peak input noise voltage is defined as six times rms value of input noise voltage. A0 9/9

10 6.3 Typical characteristics 0.dB Gain Flatness vs. Frequency; G=+ Gain vs. Frequency vs Supply Gain vs. Frequency vs Temperature Normalized Gain vs. Frequency; DD =5 STB_RL=K A0 0/9

11 G=+; RF=K; PP =0.; DD =.5 G=+; RF=K; PP =0.; DD =5 G=+;RF=00; Rl=50 PP =0.; DD =.5 G=-0; RF=K; PP=0.; DD=5 G=+; RF=K; PP =0.; DD =.5 G=+; RF=K; PP =0.; DD =5 A0 /9

12 G=+; RF=00 ; Rl=50 PP =0.; DD =.5 G=+; RF=00 ; Rl=50 PP =0.; DD =5 G=+0; RF=K; PP =0.; DD =.5 G=+0;RF=K; PP =0.; DD =5 A0 /9

13 Non-Inverting Small Signal Step Response Non-Inverting Large Signal Step Response Overload Recovery Time Output Settling Time(large signal) Output Settling Time(small signal) Rail-To-Rail A0 3/9

14 7. Ordering Information GT XXXX - XX X X Temperature Range I Industrial: -40 C~+5 C Pb Status G GREEN Package Type: S G MSOP8 SOP8 Part Number Giantec Prefix GT Giantec Order Number Package Description Package Option GT7-SGI-TR MSOP8 Tape and Reel 3000 GT7-GGI-TR SOP8 Tape and Reel 4000 A0 4/9

15 8. Part Markings 8. GT7-SGI (Top iew) G T 7 S G I Lot Number Y Y W W S GT7SGI Lot Number States the last 9 characters of the wafer lot information Pin Indicator YY Seal Year 00 = = = 099 WW Seal Week 0 = Week 0 = Week... 5 = Week 5 5 = Week 5 S Subcon Code J = ASESH L = ASEKS Die ersion A0 5/9

16 8. GT7-GGI (Top iew) G T 7 G G I Lot Number Y Y W W S GT7GGI Lot Number States the last 9 characters of the wafer lot information Pin Indicator YY Seal Year 00 = = = 099 WW Seal Week 0 = Week 0 = Week... 5 = Week 5 5 = Week 5 S Subcon Code J = ASESH L = ASEKS Die ersion A0 6/9

17 9. Package Information 9. MSOP8 SYMBOLS DIMENSIONS IN MILLIMETERS DIMENSIONS IN INCHES MIN NOM MAX MIN NOM MAX A A A b C D E E e L BSC 0.65 BSC BSC 0.06 BSC Θ A0 7/9

18 9. SOP8 A0 8/9

19 0. Revision History Revision Date Descriptions A0 Sept.,03 Initial ersion A0 9/9

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