Not Recommended for New Designs

Transcription

1 Not Recommended for New Designs The MAX9 was manufactured for Maxim by an outside wafer foundry using a process that is no longer available. It is not recommended for new designs. A Maxim replacement or an industry second-source may be available. The data sheet remains available for existing users. The other parts on the following data sheet are not affected. For further information, please see the Quickiew data sheet for this part or contact technical support for assistance.

2 9-; Rev ; 9/9 Single/Dual/Quad, Micropower, General Description The dual MAX9, quad MAX9, and single MAX9 operational amplifiers combine excellent DC accuracy with rail-to-rail operation at the input and output. Since the common-mode voltage extends from CC to EE, the devices can operate from either a single supply (+. to +) or split supplies (±. to ±). Each op amp requires less than µa supply current. Even with this low current, the op amps are capable of driving a kω load, and the input referred voltage noise is only n/ Hz. In addition, these op amps can drive loads in excess of nf. The precision performance of the MAX9/MAX9/ MAX9, combined with their wide input and output dynamic range, low-voltage single-supply operation, and very low supply current, makes them an ideal choice for battery-operated equipment and other low-voltage applications. The are available in DIP and SO packages in the industry-standard op-amp pin configurations. The MAX9 is also available in the smallest 8-pin SO: the µmax package. Applications Portable Equipment Battery-Powered Instruments Data Acquisition Signal Conditioning Low-oltage Applications Typical Operating Circuit Features Low-oltage Single-Supply Operation (+. to +) Rail-to-Rail Input Common-Mode oltage Range Rail-to-Rail Output Swing khz Gain-Bandwidth Product Unity-Gain Stable µa Max Quiescent Current per Op Amp No Phase Reversal for Overdriven Inputs µ Offset oltage High oltage Gain (8) High CMRR (9) and PSRR () Drives kω Load Drives Large Capacitive Loads MAX9 Available in µmax Package8-Pin SO Ordering Information PART TEMP. RANGE PIN-PACKAGE MAX9CPA MAX9CSA MAX9C/D C to + C C to + C C to + C 8 Plastic DIP 8 SO Dice* MAX9EPA - C to +8 C 8 Plastic DIP MAX9ESA - C to +8 C 8 SO MAX9MJA - C to + C 8 CERDIP Ordering Information continued at end of data sheet. *Dice are specified at TA = + C, DC parameters only. Pin Configurations TOP IEW + DD OUT IN- 8 OUT ANALOG INPUT k MAX9 k AIN MAX8 (ADC) DOUT SCLK CS SHDN REF GND 8 SERIAL INTERFACE.9 IN+ EE NULL IN- IN+ EE MAX9 DIP/SO MAX9 8 IN- IN+ N.C. OUT NULL INPUT SIGNAL CONDITIONING FOR LOW-OLTAGE ADC DIP/SO/µMAX Pin Configurations continued at end of data sheet. Maxim Integrated Products For free samples & the latest literature: or phone

3 ABSOLUTE MAXIMUM RATINGS Supply oltage ( to EE )... Common-Mode Input oltage...( +.) to ( EE -.) Differential Input oltage...±( - EE ) Input Current (IN+, IN-, NULL, NULL)...±mA Output Short-Circuit Duration...Indefinite short circuit to either supply oltage Applied to NULL Pins... to EE Continuous Power Dissipation (T A = + C) 8-Pin Plastic DIP (derate 9.9mW/ C above + C)...mW 8-Pin SO (derate.88mw/ C above + C)...mW 8-Pin CERDIP (derate 8.mW/ C above + C)...mW 8-Pin µmax (derate.mw/ C above + C)...mW Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS ( =. to, EE = GND, CM =, = /, T A = + C, unless otherwise noted.) PARAMETER Input Offset oltage Input Bias Current Input Offset Current Differential Input Resistance Common-Mode Input oltage Range Common-Mode Rejection Ratio Power-Supply Rejection Ratio Large-Signal oltage Gain (Note ) Output oltage Swing (Note ) Output Short-Circuit Current Operating Supply oltage Range Supply Current (per amplifier) CM = = / CONDITIONS -Pin Plastic DIP (derate.mw/ C above + C)...mW -Pin SO (derate 8.mW/ C above + C)...mW -Pin CERDIP (derate 9.9mW/ C above + C)...mW Operating Temperature Ranges MAX9_C... C to + C MAX9_E...- C to +8 C MAX9_M...- C to + C Junction Temperatures MAX9_C /E...+ C MAX9_M...+ C Storage Temperature Range...- C to + C Lead Temperature (soldering, sec)...+ C MIN TYP MAX ± ± ± ± ±. ± ( EE -.) CM ( +.) 9 =. to 88 =., Sourcing 9 R L = kω, =. to. Sinking 9 =.,, Sourcing 9 =. to. Sinking 8 9 =., Sourcing 98 8 R L = kω, =. to. Sinking 9 =.,, Sourcing 98 =. to. Sinking 8 98 R L = kω OH OL EE +. EE +. OH OL EE +. EE +. =. =.. EE UNITS µ na na MΩ ma µa

4 AC ELECTRICAL CHARACTERISTICS ( =. to, EE = GND, T A = + C, unless otherwise noted.) Gain-Bandwidth Product Phase Margin Gain Margin Slew Rate Time Turn-On Time PARAMETER Total Harmonic Distortion Input Noise-oltage Density Input Noise-Current Density Amp-Amp Isolation DC ELECTRICAL CHARACTERISTICS ( =. to, EE = GND, CM =, = /, T A = C to + C, unless otherwise noted.) PARAMETER Input Offset oltage Input Offset oltage Tempco Input Bias Current Input Offset Current Common-Mode Input oltage Range Common-Mode Rejection Ratio Power-Supply Rejection Ratio Large-Signal oltage Gain (Note ) Output oltage Swing (Note ) Operating Supply oltage Range Supply Current (per amplifier) CONDITIONS R L = kω, C L = pf R L = kω, C L = pf R L = kω, C L = pf, C L = pf, = p-p, A = +, f = khz R L = kω, C L = pf To.%, step = to step, = /, A = + f = khz f = khz f = khz ( EE -.) CM ( +.) =. to =., R L = kω, Sourcing =. to. Sinking =.,, =. to. =., R L = kω, =. to. =.,, =. to. R L = kω CM = = / CONDITIONS Sourcing MIN TYP MAX MIN TYP MAX ± ± ± ± EE Sinking Sourcing 9 Sinking 88 Sourcing 9 Sinking 8 OH -. OL EE +. OH -. OL EE +... =. = UNITS khz degrees % /µs µs µs n/ Hz pa/ Hz UNITS µ µ/ C na na µa

5 DC ELECTRICAL CHARACTERISTICS ( =. to, EE = GND, CM =, = /, T A = - C to +8 C, unless otherwise noted.) PARAMETER Input Offset oltage Input Offset oltage Tempco Input Bias Current Input Offset Current Common-Mode Input oltage Range Common-Mode Rejection Ratio Power-Supply Rejection Ratio Large-Signal oltage Gain (Note ) Output oltage Swing (Note ) CONDITIONS ( EE -.) CM ( +.) 8 =. to, CM = 8 =., R L = kω, Sourcing 8 =. to. Sinking 8 =.,, Sourcing 9 =. to. Sinking =., R L = kω, Sourcing 9 =. to. Sinking 8 =.,, Sourcing 9 =. to. Sinking R L = kω OH -. OL MIN TYP MAX ± ±9 ± ±8 EE EE +. EE +. Operating Supply-oltage Range.. Supply Current (per amplifier) CM = = / OH OL =. = 8 UNITS µ µ/ C na na µa

6 DC ELECTRICAL CHARACTERISTICS ( =. to, EE = GND, CM =, = /, T A = - C to + C, unless otherwise noted.) PARAMETER Input Offset oltage Input Offset oltage Tempco Input Bias Current Input Offset Current Common-Mode Input oltage Range Common-Mode Rejection Ratio Power-Supply Rejection Ratio Large-Signal oltage Gain (Note ) Output oltage Swing (Note ) Operating Supply-oltage Range Supply Current (per amplifier) CONDITIONS MIN TYP MAX ±. ± ± ± EE ( EE -.) CM ( +.) =. to =., R L = kω, Sourcing 8 =. to. Sinking =.,, Sourcing 9 =. to. Sinking =., R L = kω, Sourcing 8 =. to. Sinking 8 =.,, Sourcing 9 =. to. Sinking R L = kω OH -. OL EE +. OH -. OL EE +... CM = = / =. = UNITS m µ/ C na na µa Note : R L to EE for sourcing and OH tests; R L to for sinking and OL tests.

7 Typical Operating Characteristics (T A = + C, =, EE =, unless otherwise noted.) GAIN () CHANNEL SEPARATION () PHASE GAIN AND PHASE vs. FREQUENCY GAIN MAX A = + NO LOAD -.. -, FREQUENCY (khz) CHANNEL SEPARATION vs. FREQUENCY =..., FREQUENCY (khz) MAX9- PHASE (DEG) OFFSET OLTAGE (µ) GAIN () GAIN AND PHASE vs. FREQUENCY PHASE GAIN MAX C L = pf - A = + - R L = -.., FREQUENCY (khz) OFFSET OLTAGE vs. TEMPERATURE TEMPERATURE ( C) CM = MAX9- PHASE (DEG) PSRR () CMRR () POWER-SUPPLY REJECTION RATIO vs. FREQUENCY EE =. -.. FREQUENCY (khz) 9 COMMON-MODE REJECTION RATIO vs. TEMPERATURE CM = TO + CM = - TO +. CM = -. TO +. CM = -. TO +. CM = -. TO TEMPERATURE ( C) MAX9- MAX9- INPUT BIAS CURRENT (na) INPUT BIAS CURRENT vs. COMMON-MODE OLTAGE =. - CM () = MAX9- INPUT BIAS CURRENT (na) INPUT BIAS CURRENT vs. TEMPERATURE CM = CM = - = TEMPERATURE ( C) = =. MAX9-8 SUPPLY CURRENT PER OP AMP (µa) SUPPLY CURRENT PER AMPLIFIER vs. TEMPERATURE = CM = / = TEMPERATURE ( C) =. MAX9-9

8 Single/Dual/Quad, Micropower, Typical Operating Characteristics (continued) (T A = + C, =, EE =, unless otherwise noted.) GAIN () GAIN () 9 9 LARGE-SIGNAL GAIN vs. OUTPUT OLTAGE R L = kω R L = MΩ = + R L TO EE - (m) LARGE-SIGNAL GAIN vs. OUTPUT OLTAGE R L = MΩ R L = kω = + R L TO (m) MAX9- MAX9- GAIN () GAIN () 9 9 LARGE-SIGNAL GAIN vs. OUTPUT OLTAGE R L = MΩ R L = kω = +. R L TO EE - (m) LARGE-SIGNAL GAIN vs. OUTPUT OLTAGE R L = kω R L = MΩ = +. R L TO (m) MAX9- MAX9- LARGE-SIGNAL GAIN () LARGE-SIGNAL GAIN () R L TO EE LARGE-SIGNAL GAIN vs. TEMPERATURE,. < < ( -.) R L TO = +. = TEMPERATURE ( C) LARGE-SIGNAL GAIN vs. TEMPERATURE R L = kω,. < < ( -.) R L TO R L TO EE = TEMPERATURE ( C) = + MAX9- MAX9- OUT MIN (m) MINIMUM OUTPUT OLTAGE vs. TEMPERATURE R L TO =, =, R L = kω =., =., R L = kω TEMPERATURE ( C) MAX9- (CC - OUT) (m) MAXIMUM OUTPUT OLTAGE vs. TEMPERATURE R L TO EE =, TEMPERATURE ( C) =., =, R L = kω =., R L = kω MAX9- OUTPUT IMPEDANCE (Ω) OUTPUT IMPEDANCE vs. FREQUENCY CM = =....,, FREQUENCY (khz) MAX9-8

9 Typical Operating Characteristics (continued) (T A = + C, =, EE =, unless otherwise noted.) OLTAGE-NOISE DENSITY (n/ Hz) THD + NOISE (%) OLTAGE-NOISE DENSITY vs. FREQUENCY INPUT REFERRED.. FREQUENCY (khz).. TOTAL HARMONIC DISTORTION + NOISE vs. FREQUENCY A = + P-P SIGNAL khz LOWPASS FILTER TO GND MAX9-9 MAX9- CURRENT-NOISE DENSITY (pa/ Hz) THD + NOISE (%) CURRENT-NOISE DENSITY vs. FREQUENCY INPUT REFERRED.. FREQUENCY (khz) TOTAL HARMONIC DISTORTION + NOISE vs. PEAK-TO-PEAK SIGNAL AMPLITUDE A = + khz SINE khz FILTER R L TO GND R L = kω R L = kω MAX9- MAX9-. NO LOAD, FREQUENCY (Hz) PEAK-TO-PEAK SIGNAL AMPLITUDE () SMALL-SIGNAL TRANSIENT RESPONSE SMALL-SIGNAL TRANSIENT RESPONSE µs/div = +, A = +, µs/div = +, A = -, 8

10 Typical Operating Characteristics (continued) (T A = + C, =, EE =, unless otherwise noted.) LARGE-SIGNAL TRANSIENT RESPONSE µs/div = +, A = +, /div /div LARGE-SIGNAL TRANSIENT RESPONSE µs/div = +, A = -, Pin Description /div /div MAX9 PIN MAX9 MAX9 NAME FUNCTION OUT Amplifier Output, NULL Offset Null Input. Connect to a kω potentiometer for offset-voltage trimming. Connect wiper to EE (Figure ). IN- Inverting Input IN- Amplifier Inverting Input IN+ Noninverting Input IN+ Amplifier Noninverting Input EE Negative Power-Supply Pin. Connect to ground or a negative voltage. IN+ Amplifier Noninverting Input OUT Amplifier Output IN- Amplifier Inverting Input OUT Amplifier Output 8 Positive Power-Supply Pin. Connect to (+) terminal of power supply. 8 OUT Amplifier Output 9 IN- Amplifier Inverting Input IN+ Amplifier Noninverting Input IN+ Amplifier Noninverting Input IN- Amplifier Inverting Input OUT Amplifier Output 8 N.C. No Connect. Not internally connected. 9

11 Applications Information The dual MAX9, quad MAX9, and single MAX9 op amps combine excellent DC accuracy with rail-torail operation at both input and output. With their precision performance, wide dynamic range at low supply voltages, and very low supply current, these op amps are ideal for battery-operated equipment and other lowvoltage applications. Rail-to-Rail Inputs and Outputs The s input common-mode range extends. beyond the positive and negative supply rails, with excellent common-mode rejection. Beyond the specified common-mode range, the outputs are guaranteed not to undergo phase reversal or latchup. Therefore, the can be used in applications with common-mode signals at or even beyond the supplies, without the problems associated with typical op amps. The s output voltage swings to within m of the supplies with a kω load. This rail-to-rail swing at the input and output substantially increases the dynamic range, especially in low supplyvoltage applications. Figure shows the input and output waveforms for the MAX9, configured as a unity-gain noninverting buffer operating from a single + supply. The input signal is.p-p, khz sinusoid centered at +.. The output amplitude is approximately.9p-p. Input Offset oltage Rail-to-rail common-mode swing at the input is obtained by two complementary input stages in parallel, which feed a folded cascaded stage. The PNP stage is active for input voltages close to the negative rail, and the NPN stage is active for input voltages close to the positive rail. The offsets of the two pairs are trimmed; however, there is some small residual mismatch between them. This mismatch results in a two-level input offset characteristic, with a transition region between the levels occurring at a common-mode voltage of approximately.. Unlike other rail-to-rail op amps, the transition region has been widened to approximately m in order to minimize the slight degradation in CMRR caused by this mismatch. To adjust the MAX9 s input offset voltage (µ max at + C), connect a kω trim potentiometer between the two NULL pins (pins and ), with the wiper connected to EE (pin ) (Figure ). The trim range of this circuit is ±m. External offset adjustment is not available for the dual MAX9 or quad MAX9. The input bias currents of the are typically less than na. The bias current flows into the device when the NPN input stage is active, and it flows out when the PNP input stage is active. To reduce the offset error caused by input bias current flowing through external source resistances, match the effective resistance seen at each input. Connect resistor R between the noninverting input and ground when using k NULL MAX9 EE NULL Figure. Rail-to-Rail Input and Output (oltage Follower Circuit, CC = +, EE = ) Figure. Offset Null Circuit

12 the op amp in an inverting configuration (Figure a); connect resistor R between the noninverting input and the input signal when using the op amp in a noninverting configuration (Figure b). Select R to equal the parallel combination of R and R. High source resistances will degrade noise performance, due to the thermal noise of the resistor and the input current noise (which is multiplied by the source resistance). Input Stage Protection Circuitry The include internal protection circuitry that prevents damage to the precision input stage from large differential input voltages. This protection circuitry consists of back-to-back diodes between IN+ and IN- with two.kω resistors in series R R MAX9_ (Figure ). The diodes limit the differential voltage applied to the amplifiers internal circuitry to no more than F, where F is the diodes forward-voltage drop (about. at + C). Input bias current for the ICs (±na typical) is specified for the small differential input voltages. For large differential input voltages (exceeding F ), this protection circuitry increases the input current at IN+ and IN-: ( ) - F Input Current = x.kω For comparator applications requiring large differential voltages (greater than F ), you can limit the input current that flows through the diodes with external resistors IN+.kΩ TO INTERNAL CIRCUITRY MAX9 MAX9 MAX9 R R = R II R IN.kΩ TO INTERNAL CIRCUITRY Figure a. Reducing Offset Error Due to Bias Current: Inverting Configuration Figure. Input Stage Protection Circuitry R, UNSTABLE REGION MAX9-FG R = R II R MAX9_ R R CAPACITIE LOAD (pf) = + = / R L TO EE A = + RESISTIE LOAD (kω) Figure b. Reducing Offset Error Due to Bias Current: Figure. Capacitive-Load Stable Region Sourcing Current Noninverting Configuration

13 in series with IN-, IN+, or both. Series resistors are not recommended for amplifier applications, as they may increase input offsets and decrease amplifier bandwidth. Output Loading and Stability Even with their low quiescent current of less than µa per op amp, the are well suited for driving loads up to kω while maintaining DC accuracy. Stability while driving heavy capacitive loads is another key advantage over comparable CMOS railto-rail op amps. In op amp circuits, driving large capacitive loads increases the likelihood of oscillation. This is especially true for circuits with high loop gains, such as a unitygain voltage follower. The output impedance and a capacitive load form an RC network that adds a pole to the loop response and induces phase lag. If the pole frequency is low enoughas when driving a large capacitive loadthe circuit phase margin is degraded, leading to either an under-damped pulse response or oscillation. µs/div µs/div Figure. MAX9 oltage Follower with pf Load (R L = ) Figure b. MAX9 oltage Follower with pf Load R L = kω µs/div µs/div Figure a. MAX9 oltage Follower with pf Load R L = kω Figure c. MAX9 oltage Follower with pf Load R L =

14 The can drive capacitive loads in excess of pf under certain conditions (Figure ). When driving capacitive loads, the greatest potential for instability occurs when the op amp is sourcing approximately µa. Even in this case, stability is maintained with up to pf of output capacitance. If the output sources either more or less current, stability is increased. These devices perform well with a pf pure capacitive load (Figure ). Figure shows the performance with a pf load in parallel with various load resistors. MAX9_ R S C L To increase stability while driving large capacitive loads, connect a pull-up resistor at the output to decrease the current that the amplifier must source. If the amplifier is made to sink current rather than source, stability is further increased. Frequency stability can be improved by adding an output isolation resistor (RS) to the voltage-follower circuit (Figure 8). This resistor improves the phase margin of the circuit by isolating the load capacitor from the op amp s output. Figure 9a shows the MAX9 driving,pf (RL kω), while Figure 9b adds a Ω isolation resistor. µs/div Figure 8. Capacitive-Load Driving Circuit Figure 9b. Driving a,pf Capacitive Load with a Ω Isolation Resistor + k k MAX9 µs/div Figure 9a. Driving a,pf Capacitive Load Figure. Power-Up Test Configuration

15 µs/div Figure a. Power-Up Settling Time ( = +) /div m/div Because the have excellent stability, no isolation resistor is required, except in the most demanding applications. This is beneficial because an isolation resistor would degrade the lowfrequency performance of the circuit. Power-Up Settling Time The have a typical supply current of µa per op amp. Although supply current is already low, it is sometimes desirable to reduce it further by powering down the op amp and associated ICs for periods of time. For example, when using a MAX9 to buffer the inputs to a multi-channel analog-to-digital converter (ADC), much of the circuitry could be powered down between data samples to increase battery life. If samples are taken infrequently, the op amps, along with the ADC, may be powered down most of the time. When power is reapplied to the MAX9/MAX9/ MAX9, it takes some time for the voltages on the supply pin and the output pin of the op amp to settle. Supply settling time depends on the supply voltage, the value of the bypass capacitor, the output impedance of the incoming supply, and any lead resistance or inductance between components. Op amp settling time depends primarily on the output voltage and is slew-rate limited. With the noninverting input to a voltage follower held at mid-supply (Figure ), when the supply steps from to CC, the output settles in approximately µs for CC = + (Figure a) or µs for CC = + (Figure b). µs/div Figure b. Power-Up Settling Time ( = +) /div /div Power Supplies and Layout The operate from a single. to power supply, or from dual supplies of ±. to ±. For single-supply operation, bypass the power supply with a µf capacitor in parallel with a.µf ceramic capacitor. If operating from dual supplies, bypass each supply to ground. Good layout improves performance by decreasing the amount of stray capacitance at the op amp s inputs and output. To decrease stray capacitance, minimize both trace lengths and resistor leads and place external components close to the op amp s pins. Rail-to-Rail Buffers The Typical Operating Circuit shows a MAX9 gain-oftwo buffer driving the analog input to a MAX8 -bit ADC. Both devices run from a single supply, and the converter s internal reference is.9. The MAX9 s typical input offset voltage is µ. This results in an error at the ADC input of µ, or less than half of one least significant bit (LSB). Without offset trimming, the op amp contributes negligible error to the conversion result.

16 _Ordering Information (continued) PART TEMP. RANGE PIN-PACKAGE MAX9CPD C to + C Plastic DIP MAX9CSD C to + C SO MAX9EPD - C to +8 C Plastic DIP MAX9ESD - C to +8 C SO MAX9MJD - C to + C CERDIP MAX9CPA C to + C 8 Plastic DIP MAX9CSA C to + C 8 SO MAX9CUA C to + C 8 µmax MAX9C/D C to + C Dice* MAX9EPA - C to +8 C 8 Plastic DIP MAX9ESA - C to +8 C 8 SO MAX9MJA - C to + C 8 CERDIP * Dice are specified at T A = + C, DC parameters only. Pin Configurations (continued) Chip Topographies EE IN+ MAX9 IN- IN+ IN-.9" (.mm) MAX9 OUT.8" (.8mm) OUT TOP IEW NULL IN- OUT OUT IN- IN+ IN- IN+." (.mm) IN+ MAX9 EE IN+ IN+ OUT IN- IN- 9 OUT DIP/SO 8 OUT EE." (.9mm) NULL TRANSISTOR COUNT: (single MAX9) 8 (dual MAX9) (quad MAX9) SUBSTRATE CONNECTED TO EE

17 Package Information e D B E A A H.mm. in C L α DIM A A B C D E e H L α 8-PIN µmax MICROMAX SMALL-OUTLINE PACKAGE MIN INCHES. MAX MILLIMETERS MIN MAX D e D B A A.mm.in. C L -8 DIM A A B C E e H L MIN INCHES. MAX MILLIMETERS MIN MAX E H Narrow SO SMALL-OUTLINE PACKAGE (. in.) DIM D D D PINS 8 INCHES MIN MAX.9..9 MILLIMETERS MIN MAX A Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, San Gabriel Drive, Sunnyvale, CA 98 (8) - 99 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.