SMC4866NA. Single N-Channel MOSFET DESCRIPTION FEATURES VDS = 30V, ID = 42A APPLICATIONS PART NUMBER INFORMATION
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1 MC866NA ingle N-Channel MOFET DECRIPTION MC866 is the N-Channel enhancement mode power field effect transistors are using trench DMO technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior,fast switching performance, and withstand high energy pulse in the avalanche and commutation mode. PART NUMBER INFORMATION FEATURE VD = 3V, ID = 2A RD(ON) =7mΩ(Typ.)@VG = V RD(ON) =mω(typ.)@vg =.5V % UI and Rg tested APPLICATION Power Management DC/DC Converters MC 866 NA - TR G a b c d e a : Company name. b : Product erial number. c : Package code NA:DFN3.3X3.3A-8 d : Handling code TR:Tape&Reel e : Green produce code G:RoH Compliant D D D D G Pin DFN3.3X3.3A-8 G D ABOLUTE MAXIMUM RATING (TA = 25 C Unless otherwise noted ) ymbol Parameter Rating Units VD Drain-ource Voltage 3 V VG Gate-ource Voltage ±2 V 2 A ID Pulsed Drain Current B TC= C 26 A IDM Pulsed Drain Current B A ID PD Continuous Drain Current A Power Dissipation A TA=25 C 5 A TA=7 C 2 A TA=25 C 3. W TA=7 C 2 W IA Avalanche Current A F 2 A EA ingle Pulse Avalanche energy L=.mH A F 28.8 mj PD Power Dissipation B 25 W TC= C W TJ Operation Junction Temperature -55/5 C TTG torage Temperature Range -55/5 C THERMAL REITANCE ymbol Parameter Typ Max Units RθJA Thermal Resistance Junction to Ambient AC t s Thermal Resistance Junction to Ambient AC 7 C/W teady-tate RθJC Thermal Resistance Junction to Case A 5 MC866NA Rev.A
2 ELECTRICAL CHARACTERITIC(TA = 25 C Unless otherwise noted ) MC866NA ymbol Parameter Condition Min Typ Max Unit tatic Parameters Drain-ource Breakdown BVD VG =V,ID =25μA 3 V Voltage VG(th) Gate Threshold Voltage VD =VG,ID =25μA V IG Gate Leakage Current VD =V,VG=±2V ± na ID Zero Gate Voltage Drain Current VD =3V,VG =V, TJ =25 C μa VD =2V,VG =V, TJ =75 C Drain-source On-Resistance D VG =V,ID=5A 7 9 mω VG =.5V,ID=A 3 Gfs Forward Transconductance VD =V,ID=-A 3 RD(ON) Diode Characteristics VD Diode Forward Voltage D I=A,VG=V.7 V I Continuous ource Current 2.5 A trr Reverse Recovery Time 8 ns I=A, dl/dt=a/μs Qrr Reverse Recovery Charge.6 nc Dynamic and witching Parameters Qg Total Gate Charge (V) 9.6 Qg Qgs Total Gate Charge (.5V) Gate-ource Charge VD =5V,VG =V ID =A Qgd Gate-Drain Charge Ciss Input Capacitance VD =5V,VG =V Coss Output Capacitance 2 29 f =MHz Crss Reverse Transfer Capacitance 72 Rg Gate Resistance VG=V, VD=V, F=MHZ Ω td(on) 2 Turn-On Time E tr VDD=5V, VG=V,.6 n td(off) RG=3Ω, ID=A 26 Turn-Off Time E tf 7.8 Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. A. The value of RθJA is measured with the device in a still air environment with maximum junction temperature TJ(MAX)= 5 C (initial temperature TA=25 C). B. The power dissipation PD is based on TJ(MAX)=5 C,using junction-to-case thermal resistance (RθJC) is more useful in additional heat sinking is used C. urface mounted on FR- board using sq in pad, 2 oz Cu, in a still air environment with TA=25 C. D. The data tested by pulsed, pulse width 3u, duty cycle 2% E. Pulsed width limited by maximum junction temperature. F. The EA data shows Max, tested and pulse width limited by maximum junction temperature 5 C (initial temperature Tj=25 C). The products and product specifications contained herein are subject to change without notice to improve performance characteristics. Consult us, or our representatives before use, to confirm that the information in this datasheet is up to date We assume no responsibility for any infringement of patents, patent rights, or other rights arising from the use of any information and circuitry in this datasheet. nc pf MC866NA Rev.A 2
3 Normalized Threshold Voltage Ptot-Power(W) VG(V) Capacitance(pF) RD(ON)(mΩ) MC866NA TYPICAL CHARACTERITIC V 5.V 6.V VG=.5V 6 TA=25 C VG=V 8 VG=.5V VG=V 2 VG=3.5V VG=3V VD-Drain ource Voltage(V) Output Characteristics Drain-ource On Resistance 8 VD=5V ID=A Ciss 2 2 Coss Qg-Gate Charge(nC) Gate Charge Crss VD-Drain ource Voltage(V) Capacitance Gate Threshold Voltage Power Dissipation MC866NA Rev.A 3
4 Normalized Transient Thermal Resistance Normalized On Resistance MC866NA TYPICAL CHARACTERITIC VG=V 3.2 VG=.5V RD(ON) vs Junction Temperature TC-Case Temperature( C) Drain Current vs TC ID (A) ingle Pulse... Maximum afe Operation Area VD Voltage (V) us us ms DC.. Duty= quare Wave Pulse Duration(ec) Thermal Transient Impedance t t2 Duty Cycle, D=t/t2 VG Ton Toff V Qg VD Td(on) Tr Td(off) Tf Qgs Qgd 9% % Charge VG Gate Chrge Waveform witching Time Waveform MC866NA Rev.A
5 MC866NA POD-38B_DFN3.3X3.3A-8 PACKAGE DIMENION ymbol Dimensions In Millimeters Dimensions In Inches Min. Max. Min. Max. A b c D D D D E E E e.65bc..26bc. H L L M Ɵ 2 5 Recommended Land Pattern MC866NA Rev.A 5
Pin 1. Symbol Parameter Rating Units VDSS Drain-Source Voltage 30 V VGSS Gate-Source Voltage ±20 V TA=25 C 18 A TA=70 C 14 A
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650V Cascode GaN FET in TO-220 (source tab) Description The TPH3208PS 650V, 110mΩ gallium nitride (GaN) FET is a normally-off device. Transphorm GaN FETs offer better efficiency through lower gate charge,
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M25N3Q-HF N-hannel RoH evice Halogen Free Features - ingle rive Requirement..2(5.).5(4.7).(.25).7(.7) - Low On-resistance. - Fast witching haracteristic. - ynamic dv/dt rating..57(4.).5(3.).244(6.2).22(5.)
More informationSUPER-SEMI SUPER-MOSFET. Super Junction Metal Oxide Semiconductor Field Effect Transistor. 800V Super Junction Power Transistor SS*80R380S
SUPER-SEMI SUPER-MOSFET Super Junction Metal Oxide Semiconductor Field Effect Transistor 800V Super Junction Power Transistor SS*80R380S Rev. 1.2 Oct. 2017 September, 2013 SJ-FET SSF80R380S/SSP80R380S/SSW80R380S/SSA80R380S
More informationS2 6 1 S1 3 D2 2 G1. Pin configuration (Top view) Parameter Symbol 10 S Steady State Unit Drain-Source Voltage V DS +20 Gate-Source Voltage V GS 6
Descriptions Features and Applications The SOT-363 is N-Channel enhancement MOS Field Effect Transistor. Uses advanced trench technology and design to provide excellent R DS (ON) with low gate charge.
More informationI2-PAK I-PAK. TC = 25 C unless otherwise noted D2-PAK/D-PAK I2-PAK / I-PAK/ TO-220
General Description This Power MOSFET is produced Features using Maple semi s Advanced Super-Junction technology. - 7.6A, 500V, R DS(on) typ. = 0.5Ω@V GS = 10 V This advanced technology has - been Low
More informationSPP2303. P-Channel Enhancement Mode MOSFET
DESCRIPTION The is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored to
More informationVDS (V) min 600 VTDS (V) max 750 RDS(on) (mω) max* 180. Qrr (nc) typ 54. * Dynamic R(on)
600V Cascode GaN FET in TO-220 (drain tab) Description The 600V, 150mΩ gallium nitride (GaN) FET is a normally-off device. Transphorm GaN FETs offer better efficiency through lower gate charge, faster
More informationFeatures. Description. Table 1: Device summary Order code Marking Package Packaging STR1P2UH7 1L2U SOT-23 Tape and reel
P-channel 20 V, 0.087 Ω typ., 1.4 A STripFET H7 Power MOSFET in a SOT-23 package Datasheet - production data Features Order code VDS RDS(on) max ID STR1P2UH7 20 V 0.1 Ω @ 4.5 1.4 A Very low on-resistance
More informationFeatures. Description. Table 1: Device summary Order code Marking Package Packaging STL220N6F7 220N6F7 PowerFLAT TM 5x6 Tape and reel
N-channel 60 V, 1.2 mω typ., 120 A STripFET F7 Power MOSFET in a PowerFLAT 5x6 package Datasheet - production data Features Order code VDS RDS(on) max. ID STL220N6F7 60 V 1.4 mω 120 A Among the lowest
More informationSPP1433. P-Channel Enhancement Mode MOSFET
DESCRIPTION The SPP1433 is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored
More informationFeatures. Description. Table 1: Device summary Order code Marking Package Packaging STT3P2UH7 3L2U SOT23-6L Tape and reel
P-channel 20 V, 0.087 Ω typ., 3 A STripFET H7 Power MOSFET in a SOT23-6L package Datasheet - production data Features Order code VDS RDS(on) max ID STT3P2UH7 20 V 0.1 Ω @ 4.5 3 A SOT23-6L Very low on-resistance
More informationPFU70R360G / PFD70R360G
FEATURES New technology for high voltage device Low RDS(on) low conduction losses Small package Ultra low gate charge cause lower driving requirement 100% avalanche tested Halogen Free APPLICATION Power
More informationP-Channel Enhancement Mode MOSFET
DESCRIPTION The SPP2319W is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored
More informationP-channel -30 V, 0.01 Ω typ., A, STripFET H6 Power MOSFET in an SO-8 package. Features. Description
P-channel -30 V, 0.01 Ω typ., -12.5 A, STripFET H6 Power MOSFET in an SO-8 package Datasheet - production data Features Order code VDS RDS(on) max ID STS10P3LLH6-30 V 0.012 Ω -12.5 A Very low on-resistance
More informationVDS (V) min 600 VTDS (V) max 750 RDS(on) (mω) max* 63. Qrr (nc) typ 136. * Dynamic R(on)
600V Cascode GaN FET in TO-247 (source tab) Not recommended for new designs see TP65H050WS Description The TPH3205WS 600V, 52mΩ gallium nitride (GaN) FET is a normally-off device. Transphorm GaN FETs offer
More informationFeatures. Description. Table 1: Device summary Order code Marking Package Packing STF140N6F7 140N6F7 TO-220FP Tube
N-channel 60 V, 0.0031 Ω typ., 70 A STripFET F7 Power MOSFET in a TO-220FP package Datasheet - production data Features Order code VDS RDS(on) max. ID PTOT STF140N6F7 60 V 0.0035 Ω 70 A 33 W Among the
More informationAutomotive-grade N-channel 40 V, 1.3 mω typ., 120 A STripFET F7 Power MOSFET in a PowerFLAT 5x6 package. Features. Description
Automotive-grade N-channel 40 V, 1.3 mω typ., 120 A STripFET F7 Power MOSFET in a PowerFLAT 5x6 package Datasheet - production data Features Order code V DS RDS(on) max ID STL210N4F7AG 40 V 1.6 mω 120
More informationSPP2301D. P-Channel Enhancement Mode MOSFET
DESCRIPTION The SPP2301D is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored
More informationVDS (V) min 650 VTDS (V) max 800 RDS(on) (mω) max* 60. Qrr (nc) typ 136. Qg (nc) typ 28. * Dynamic RDS(on)
650V Cascode GaN FET in TO-247 (source tab) Description The TPH3205WSB 650V, 49mΩ gallium nitride (GaN) FET is a normally-off device. Transphorm GaN FETs offer better efficiency through lower gate charge,
More information0.156(3.95) 0.151(3.85) Symbol BVDSS VGS ID -9.5 A IDM -160 A. EAS mj TSTG
M5P3Q8-HF P-hannel RoH evice Halogen Free Features - imple drive requirement - Low on-resistance - Fast switching speed Mechanical data.2(5.).89(4.8).(.25).8(.9).65(.65).57(.45) - Epoxy : UL 94- rated
More informationFeatures. Description. Table 1: Device summary Order code Marking Package Packing STN3NF06L 3NF06L SOT-223 Tape and reel
N-channel 60 V, 0.07 Ω typ., 4 A STripFET II Power MOSFET in a SOT-223 package Datasheet - production data Features Order code VDS RDS(on) max. ID STN3NF06L 60 V 0.1 Ω 4 A Exceptional dv/dt capability
More informationSPP3413. P-Channel Enhancement Mode MOSFET
DESCRIPTION The SPP3413 is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored
More informationSPN166T06 N-Channel Enhancement Mode MOSFET
DESCRIPTION The SPN166T06 is the N-Channel logic enhancement mode power field effect transistor which is produced using super high cell density DMOS trench technology. This high density process is especially
More informationTPH3205WSB. 650V Cascode GaN FET in TO-247 (source tab)
650V Cascode GaN FET in TO-247 (source tab) Description The TPH3205WSB 650V, 52mΩ gallium nitride (GaN) FET is a normally-off device. Transphorm GaN FETs offer better efficiency through lower gate charge,
More informationAM8205 MOSFET+SCHOTTKY DIODE 20V DUAL N-CHANNEL ENHANCEMENT MODE
DESCRIPTION The is the Dual N-Channel logic enhancement mode power field effect transistor which is produced using high cell density. Advanced trench technology to provide excellent RDS(ON). This high
More informationSPP2305. P-Channel Enhancement Mode MOSFET
DESCRIPTION The is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored to
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