CYStech Electronics Corp.

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1 Page No. : / 8 N-Channel Enhancement Mode Power MOSFET BVDSS ID@VGS=V, TC=25 C Features ID@VGS=V, TA=25 C Low On Resistance Simple Drive Requirement Low Gate Charge Fast Switching Characteristic Insulating package, front/back side insulating voltage=25v(ac) RoHS compliant package RDS(ON)@VGS=V, ID=A V 34A 9A mω(typ) Symbol Outline TO-22FP G:Gate D:Drain S:Source G D S Ordering Information Device Package Shipping --UB-S TO-22FP (RoHS compliant) 5 pcs/tube, 2 tubes/box, 4 boxes / carton Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and green compound products Packing spec, UB : 5 pcs / tube, 2 tubes/box Product rank, zero for no rank products Product name

2 Page No. : 2/ 8 Absolute Maximum Ratings (TC=25 C) Parameter Symbol Limits Unit Drain-Source Voltage (Note ) VDS Gate-Source Voltage VGS ±2 Continuous Drain C, VGS=V (Note ) 34* ID Continuous Drain C, VGS=V (Note ) 24* Continuous Drain C, VGS=V (Note 2) 9 IDSM Continuous Drain C, VGS=V (Note 2) 7.2 Pulsed Drain VGS=V IDM 36* Avalanche Current IAS 34 Single Pulse Avalanche L=.5mH, ID=34 Amps, VDD=5V (Note 4) EAS 289 Repetitive Avalanche Energy (Note 3) EAR 4.2 Power Dissipation TC=25 C (Note ) 36 PD TC= C (Note ) 8 TA=25 C (Note 2) 2. PDSM TA=7 C (Note 2).3 Maximum Temperature for Lead at.63 in(.6mm) from case for seconds TL 3 Maximum Temperature for Package Body for seconds TPKG 26 Operating Junction and Storage Temperature Tj, Tstg -55~+75 *Drain current limited by maximum junction temperature V A mj W C Thermal Data Parameter Symbol Value Unit Thermal Resistance, Junction-to-case, max RθJC 4.2 Thermal Resistance, Junction-to-ambient, max (Note 2) RθJA 6 C/W Note :.The power dissipation PD is based on TJ(MAX)=75 C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. 2. The value of RθJA is measured with the device mounted on in²fr-4 board with 2 oz. copper, in a still air environment with TA=25 C. The power dissipation PDSM is based on RθJA and the maximum allowed junction temperature of 5 C. The value in any given application depends on the user s specific board design, and the maximum temperature of 75 C may be used if the PCB allows it. 3. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=75 C. Ratings are based on low frequency and low duty cycles to keep initial TJ=25 C. 4. % tested by condition of VDD=5V, ID=2A, L=.5mH, VGS=V.

3 Page No. : 3/ 8 Characteristics (Tj=25 C, unless otherwise specified) Symbol Min. Typ. Max. Unit Test Conditions Static BVDSS - - V VGS=V, ID=25μA BVDSS/ Tj mv/ C Reference to 25 C, ID=25μA VGS(th) V VDS = VGS, ID=25μA *GFS S VDS =V, ID=A IGSS - - ± na VGS=±2V IDSS - - VDS =8V, VGS =V μa VDS =8V, VGS =V, Tj=55 C *RDS(ON) mω VGS =V, ID=A Dynamic *Qg *Qgs nc VDD=5V, ID=22A,VGS=V *Qgd *td(on) *tr *td(off) *tf Ciss Coss Crss Source-Drain Diode *IS ns pf VDD=5V, ID=A, VGS=V, RG=4.7Ω VGS=V, VDS=3V, f=mhz *ISM A *VSD V IS=22A, VGS=V *trr ns *Qrr nc VGS=V, IF=22A, dif/dt=a/μs *Pulse Test : Pulse Width 3μs, Duty Cycle 2%

4 Page No. : 4/ 8 Typical Characteristics ID, Drain Current (A) Typical Output Characteristics V, 9V, 8V VGS=5V VDS, Drain-Source Voltage(V) 7V 6V 5.5V BVDSS, Normalized Drain-Source Breakdown Voltage Brekdown Voltage vs Ambient Temperature ID=25μA, VGS=V Tj, Junction Temperature( C) Static Drain-Source On-State resistance vs Drain Current Reverse Drain Current vs Source-Drain Voltage.2 RDS(on), Static Drain-Source On-State Resistance(mΩ) VGS=6V VGS=V VSD, Source-Drain Voltage(V) VGS=V Tj=25 C Tj=5 C. ID, Drain Current(A) IDR, Reverse Drain Current(A) RDS(on), Static Drain-Source On- State Resistance(mΩ) Static Drain-Source On-State Resistance vs Gate-Source Voltage ID=A RDS(on), Normalized Static Drain- Source On-State Resistance Drain-Source On-State Resistance vs Junction Tempearture VGS=V, ID=A RDS(ON)@Tj=25 C : mω typ VGS, Gate-Source Voltage(V) Tj, Junction Temperature( C)

5 Page No. : 5/ 8 Typical Characteristics(Cont.) Capacitance vs Drain-to-Source Voltage Threshold Voltage vs Junction Tempearture Capacitance---(pF) Crss Ciss Coss VGS(th), Normalized Threshold Voltage ID=25μA ID=mA VDS, Drain-Source Voltage(V) Tj, Junction Temperature( C) Forward Transfer Admittance vs Drain Current Gate Charge Characteristics GFS, Forward Transfer Admittance(S). VDS=V VDS=5V Ta=25 C Pulsed VGS, Gate-Source Voltage(V) VDS=2V VDS=5V VDS=8V ID=22A.... ID, Drain Current(A) Maximum Safe Operating Area Qg, Total Gate Charge(nC) Maximum Drain Current vs Case Temperature 4 35 ID, Drain Current(A) RDSON Limited TC=25 C, Tj=75 C VGS=V, RθJC=4.2 C/W Single Pulse μs μs ms ms ms DC ID, Maximum Drain Current(A) VGS=V, RθJC=4.2 C/W.. VDS, Drain-Source Voltage(V) TC, Case Temperature( C)

6 Page No. : 6/ 8 Typical Characteristics(Cont.) ID, Drain Current(A) Typical Transfer Characteristics VDS=V VGS, Gate-Source Voltage(V) Power (W) Single Pulse Power Rating, Junction to Case TJ(MAX)=75 C TC=25 C RθJC=4.2 C/W.... Pulse Width(s) Transient Thermal Response Curves D=.5 r(t), Normalized Effective Transient Thermal Resistance RθJC(t)=r(t)*RθJC 2.Duty Factor, D=t/t2 3.TJM-TC=PDM*RθJC(t) 4.RθJC=4.2 C/W Single Pulse..E-4.E-3.E-2.E-.E+.E+ t, Square Wave Pulse Duration(s)

7 Page No. : 7/ 8 Recommended wave soldering condition Product Peak Temperature Soldering Time Pb-free devices 26 +/-5 C 5 +/- seconds Recommended temperature profile for IR reflow Profile feature Sn-Pb eutectic Assembly Pb-free Assembly Average ramp-up rate (Tsmax to Tp) 3 C/second max. 3 C/second max. Preheat Temperature Min(TS min) Temperature Max(TS max) Time(ts min to ts max) C 5 C 6-2 seconds 5 C 2 C 6-8 seconds Time maintained above: Temperature (TL) Time (tl) 83 C 6-5 seconds 27 C 6-5 seconds Peak Temperature(TP) 24 +/-5 C 26 +/-5 C Time within 5 C of actual peak temperature(tp) -3 seconds 2-4 seconds Ramp down rate 6 C/second max. 6 C/second max. Time 25 C to peak temperature 6 minutes max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface.

8 Page No. : 8/ 8 TO-22FP Dimension Marking: Device Name Date Code E NR 3-Lead TO-22FP Plastic Package CYStek Package Code: FP Style: Pin.Gate 2.Drain 3.Source *Typical DIM Inches Millimeters Inches Millimeters DIM Min. Max. Min. Max. Min. Max. Min. Max. A G A.5 REF.3 REF H.38 REF 3.5 REF A H.55 REF.4 REF A H b J.3 REF.8 REF b K.2.5 REF b2.47 REF.2 REF L c L D L E M.67 REF.7 REF e. * 2.54* N.2 REF.3 REF F.6 REF 2.7 REF Notes:.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material: Lead: Pure tin plated. Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-. Important Notice: All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. CYStek reserves the right to make changes to its products without notice. CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.

CYStech Electronics Corp.

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