Halfband IIR Filter Alternatives for On-Board Digital Channelisation

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1 Halband IIR Filter Alternatives or On-Board Digital Channelisation Adem Coskun 1, Izzet Kale 2, and Richard C. S. Morling 3 University o Westminster, London, United Kingdom, W1W 6UW Robert Hughes 4, and Stephen Brown 5 Astrium Ltd, Hertordshire, United Kingdom, SG1 2AS, and Piero Angeletti 6 European Space Agency, Noordwijk, The Netherlands For on-board processors, digital ilters are employed to perorm various Digital Signal Processing (DSP) tasks especially during the channelisation process or demultiplexing the incoming channels as well as multiplexing or their re-transmission back to the ground. In this paper we will ocus on the Hal-Band (HB) ilters, which are the choice on various ilter bank approaches. Implementing a HB ilter, the conventional choice is a Finite Impulse Response (FIR) ilter due to its simple mathematical orm and its ability to have a linear phase response which does not cause any phase distortion during its processing. However, in some cases (where some distortion in the phase is tolerated) Ininite Impulse Response (IIR) ilters would also be a good choice to implement a HB ilter due to lower complexity in its structure in comparison to an FIR ilter. Our studies have shown that it is possible to obtain reductions o up to 35% both in terms o circuit area and power when FIR HB ilters are replaced with their IIR counterparts with only a small distortion in the phase response in 1 Senior Lecturer, Department o Electronic Network and Computer Engineering, Senior Research Fellow, Applied DSP and VLSI Research Group, a.coskun@wmin.ac.uk,not Member. 2 Head, Department o Electronic Network and Computer Engineering, Director, Applied DSP and VLSI Research Group, kalei@wmin.ac.uk, Not Member. 3 Proessor, Electronic Network and Computer Engineering, d.morling@westminster.ac.uk, Not Member. 4 Head, Digital System Design, Payload Products, Astrium Ltd, robert.hughes@astrium.eads.net Not Member. 5 6 Systems Engineer, Astrium Ltd, stephen.brown@astrium.eads.net, Not Member. Head, RF Equipment and Technology Section, piero.angeletti@esa.int, Member.

2 return without any compromise in the overall perormance. In this paper we will talk about three alternatives or implementing a HB IIR ilter, which are 1) Balanced Model Truncated (BMT) derived IIR 2) HB IIR using Lowpass-to-Lowpass Frequency Transormation (LLFT) and 3) HB almost-linear phase IIR. A comparative study on the estimated complexity and power dissipation o each approach will also be presented. I. Introduction Communication satellites (comsat) are one o the primary building blocks o today s telecommunications inra-structure. For mobile, ixed and broadcast services, meeting civil as well as military needs, comsats are in use at many levels o modern communication systems. On the other hand, Digital Signal Processing (DSP) becomes a necessity than a choice with the increasing needs or lexibility in order to make best use o the scarce resources o the communication payloads. DSP is a low power, low cost and highly reliable approach boosting the perormance o the satellite communication links. Whether regenerative or transparent, processing communication payloads accommodate digital onboard processors to perorm advanced digital techniques such as on-board digital beamorming, encoding, decoding, requency conversion, routing, modulation/ demodulation and digital channelisation. This paper will look into the digital ilters, but more speciically Hal-Band (HB) ilters are the subject o interest. The results presented in this paper are only one o the outcomes o a more comprehensive study conducted under the European Space Agency (ESA) contract or designing Eicient Techniques or On-Board Processing, which was a collaborative work carried out by the University o Westminster s Applied DSP and VLSI Research Group and Astrium Ltd., UK. The aim was set to improve On-Board Processing (OBP) perormance or satellite communications in terms o power consumption, integration eiciency, mass and volume. In its entirety the study conducted under this ESA contract has covered Digital Signal Processing (DSP) ilters Multiplexer/demultiplexers and Digital On-Board Beamorming being applicable to the Narrowband (L/S Band) and Broadband transparent payloads (Ku/Ka Band). Astrium s Next Generation Processor (NGP) architecture [1] has been taken as the reerence architecture and the proposed DSP algorithms/architectures were compared with those used within the NGP. A diagram summarising the structure o Astrium s NGP architecture is given in Fig.1. This design (or similar designs) was (were) employed by Astrium in several occasions (like Inmarsat IV and Inmarsat XL (Alphasat I)) or digital on-board processing. The NGP was designed or transparent communication payloads and is composed o our important stages 1 Demultiplexer (Demux), that demultiplexes the incoming signal into a certain number o channels,

3 Figure 1. The unctional diagram or Astrium s Next Generation Processor (NGP) [1] 2 Sub-Channel Switching/Digital BeamForming Network (BFN) that routes each channel towards the desired requency bin or their retransmission along with the beamorming, intererence removal and level control operations. 3 Multiplexer (Mux) that brings the channels back together to be sent back to the ground terminal/terminals. For all these three stages, digital ilters constitute an important part o the digital operation. In this article we will mainly look into the use o digital HB ilters more speciically. O course the conventional way to implement a HB ilter is via the use o a Finite Impulse Response (FIR) ilter. However, there are signiicant savings associated with the Ininite Impulse Response (IIR) ilters too in comparison to the FIR. In the next section three approaches applicable to on-board processors or implementing HB IIR ilters will be presented. Section IV will show some interesting results that have been obtained replacing the FIR ilter with the IIR ilter on the NGP. II. Hal-Band IIR Filters or On-Board Processing Digital channelisation is a powerul approach to decompose the incoming signal into user channels. There are several techniques available in the open literature to perorm the digital channelisation, some o the popular ones are; requency domain iltering, Discrete Fourier Transorm (DFT) ilter bank, Discrete Cosine Transorm (DCT) ilter bank and tree-structured ilter bank approaches [2]. The idea o digital channelisation is depicted in Fig.2, where parallel passband ilters are designed to separate the incoming signal into sub channels. To realize the structure in Fig.2, several individual ilters can be used or more eicient digital ilterbanks can be employed [3]. Hal-band or not, digital ilters occupy a big proportion o digital channelisers.

4 X ( ) Y 0 ( ) 1 K 1 ~ H 0 ( ) ~ H 1 ( ) Y 1 ( ) 1 1 ~ H K 1 ( ) Y K 1 ( ) K 1 K 1 Figure 2. Digital channelisation using ilter banks, where parallel passband ilters are designed to separate the incoming signal into sub channels. As mentioned earlier, when implementing a digital ilter, the conventional choice is a FIR ilter due to its simple mathematical orm and perect linear phase, but indeed an IIR ilter can achieve an equivalent/better perormance. In comparison to FIR ilters IIR ilters are 1 in lower orders to meet an identical speciication (The implementation o a ilter in lower orders not only reduces the complexity but also minimises the number o memory accesses which beneits the system perormance in terms o power dissipation) and, 2 - generally require lower coeicient precision. The main disadvantages o IIR ilters are that they have the potential or instability and limit cycles and the non-linear phase response. On the other hand, i designed with experience they provide better/equivalent perormance against FIR approaches and near linear phase can be achieved i desired. Hal-band ilters are a sub-class o digital ilters which is in use or digital channelisers o various types. Especially or tree-based structures, low-pass or high-pass HB ilters are preerred to gradually divide the spectrum into narrower bands. On the other hand or DFT/DCT ilter banks, HB ilters are in use or realising a near-perect reconstruction o the channels. In the next two sub-sections we will look into how FIR type HB ilters can be replaced by minimum phase and almost-linear phase IIR ilters.

5 Minimum Phase HB IIR Filters I the phase response o the ilter is not a concern, Lowpass-to-Lowpass Frequency Transormation (LLFT) and Balanced Model Truncation (BMT) [6]- [8] are the two good candidates to design a HB IIR ilter. A. Lowpass-to-Lowpass Frequency Transormation: An HB IIR ilter can be designed by perorming a cuto requency adjustment using requency transormation [4]. The concept relies on the substitution o the delayers in an IIR ilter with an all-pass structure. This methodology is applicable to the transormation o HB ilters into a more eicient IIR implementation (The design stages can be ound in [5]) as the HB IIR ilters are ree rom stopband spikes and equi-ripple both in their passband and stopband. B. Balance Model Truncation: It is also possible to approximate an FIR transer unction with an equivalent IIR, accommodating clever analytical solutions. A very eective method or FIR-to-IIR approximation is the truncation o the balanced model called the Balance Model Truncation (BMT) [6]- [8]. The reduction process needs or the minimal, canonically controllable state-space realisation o the complex FIR transer unction. Treating the state-space equations accordingly as given in [7] as well as rejecting the selected singular values reduce the order o the ilter and transorm it into the orm o an IIR. Noteworthy savings can be achieved when the order o the FIR ilter is high. HB Almost-Linear Phase IIR Filter Linear phase and lat magnitude response in the region o interest is the necessity or distortion-ree iltering. Although a lat magnitude response is achievable using IIR ilters, they lack rom having a linear phase response. There are several ways to linearise the phase response o an IIR ilter. The non-linear phase response o any minimum phase ilter can be linearised by making use o a compensator. Thereore, it is possible or both minimum phase ilters obtained over the LLFT and BMT to have almost-linear phase, i accompanied with a phase compensator. However, the use o this extra hardware in turn increases the order and complexity o the ilter, which is contrary to the aim or the FIRto-IIR conversion. In this section we will present an interesting approach to obtain an almost-linear phase IIR ilter directly without the need or any extra hardware. The strategy is to use allpass IIR ilter sections and design the linear phase response by manipulating the ilter coeicients. However, one should note that a perect linear phase would still not be possible through the use o an IIR ilter and that s why we will call the IIR ilter we have designed an almost-linear phase IIR and the aim here is to linearise the phase response o the IIR as much as necessary to meet the speciication and no more. ( ) Assume that the transer unction o a digital ilter is H( z) H( z) e jp, where j H (z) is the magnitude, P ( ) is the phase response, z e, where j 1 and is the requency in radians. It has been shown in [9]-[12] that a ilter in the ollowing orm represents a stable halband IIR ilter H ( z) A0 ( z ) A1 ( z ) z (2.1) 2 which is implemented as shown in Fig.3.

6 A 1-0 (z 2 1) ) A 2 z -1 1 (z 2 ) Figure 3. A stable HB IIR ilter being composed o two allpass ilters A ( 2 ) and A ( 2 ) 0 z 1 z I both A ( z 2 0 ) and A ( z 2 ) 1 are selected to be stable allpass ilters, the phase response o both ilters can be modiied to obtain a hal band ilter. For the ilter in the upper branch K we choose to use A ( z 2 K 0 ) z, as z is the most simplest allpass ilter with a linear K 1 2 phase response. As (2.1) becomes, H( z) 1 2 z z A1 ( z ), A ( z 2 1 ) should satisy 0 K 1 P z A ( 1, z 2 1 ) 1, S For the design o A ( 2 ) a recursive algorithm will be adopted. Being an allpass ilter, z 1 2 jb( ) 1 ( z ) e and its phase response ( ) A B should satisy [9] m, 0 P B( ) m, S where m w represents a linear phase proportional to the requency. The strategy or designing such a ilter can be summarised as ollows taken rom [5] 1. Speciy the required complex magnitude response shape to equal the response o K the A ( z 2 0 ) z delayer within the ilter passband and equal the response o a K 0.5 z delayer in the ilter stopband. Also speciy the requency grid in a logarithmic scale to be denser close to the transition band. 2. Choose the weights, W (n), o the optimization routine equal to unity at all requencies. 3. Perorm weighted least-squares it to the requency response data. 4. Calculate the group delay o the ilter, t (n). 5. Calculate the maxima o the absolute o the group delay unction, t (n), and interpolate the new unction, t * ( n ), which attempts to approximate t (n) through these points. * 6. Update the weights: W ( n) [1 W( n)][1 t ( n)] 1 7. Normalize the maximum value o the weights to unity and scale the rest o them accordingly. 8. I the iteration number is less than the limit, proceed go back to step three, otherwise deliver the answer vector. The use o the minimum or linear phase techniques, presented so ar, have been implemented and tested in order to evaluate and compare their perormance with the existing HB FIR ilter within the NGP in the next section.

7 Table I. Comaprison o several approaches to implement HB ilter or on-board digital channelisation Filter Type RAM use Combinational Logic Total Phase Power Power Area Power response (mw) (mw) (gate count) (mw) Almost Linear Almostlinear Phase HB IIR BMT HB IIR Minimum HB IIR using LLFT Minimum FIR ilter to be replaced Linear III. Design Results The possible savings through the use o the HB IIR ilters, are depicted in Table I, which compares the IIR and FIR approaches both in terms o power dissipation and circuit area. Power dissipation or the designed circuits are in mw and the circuits area is in terms o number o gates (gate count). Memory access is well known to be a power hungry operation. Each read and write operation rom and to the memory brings in an extra cost in terms o power dissipation. Dierent to a terrestrial device, the power use is something that is more precious and should be consumed more economically on satellites and the power saving igures are more o an interest or this project. Thereore the RAM usage power is given separately in Table I. The details o the ilters designed based on the given speciications are not disclosed here, or obvious reasons. Implementing the digital ilters, the number o bits to represent a ilter coeicient has also been optimized. For this purpose the Flipper algorithm (bit lipping) [13] has been employed. The igures or the power dissipation and area used or all HB ilter alternatives are given in Table I, which are the almost-linear phase HB ilter, BMT HB IIR, HB IIR using LLFT and inally the FIR HB ilter taken as it is rom the current NGP design. The RAM access and the combinational logic is presented separately and summed at a seperate column in Table I. It can be concluded that the potential savings i the HB FIR ilter is replaced by the almost-linear phase IIR is approximately 35% both in terms o area and power dissipation. The LLFT technique has also given a very advantageous ilter achieving savings o up to 60% in the circuit area and more than 50% in power consumption. It is clear that i the phase distortion is something that could be ignored then the HB IIR ilters are ar more economical than the FIR ilters used or the on-board processor. It should also be noted that the use o our particular IIR ilter structure causes some latency which is longer than the FIR counterparts. This would subsequently increase the number o samples to be stored in the memory but as can be seen in the Table I, the RAM use is still lower than that o the FIR type ilter.

8 IV. Conclusion The aim o this article was intended to inorm the DSP design engineers that it is indeed possible to get an equivalent perormance using an IIR ilter instead o accommodating an FIR ilter or the comsats digital processors. In the study we have conducted under the ESA contract, this was one o the perormance improvement strategies we adopted. The ilters, within the selected on-board digital channeliser, which is the NGP, have been tested employing their IIR counterparts and the overall system perormance has been evaluated both in terms o complexity and power dissipation. For this paper we have decided to present our results obtained or the HB ilters, which is maybe the most widely used ilter type in satellite on-board digital processors. Especially digital channelisers beneit rom the use o the HB ilters. IIR ilter design techniques either to obtain minimum phase or linear phase have been presented and three interesting approaches were examined or this purpose, which are BMT, LLFT and the almost-linear phase HB IIR ilter design. The design results have shown that the almost-linear phase HB IIR ilter is the most eective candidate to replace the FIR ilters not only because they are area and power eicient but also they have a near linear phase response, i.e. the non-linearity was within the requirements set or this project. This ilter can replace the HB FIR ilter without compromising much on the phase linearity in the passband region as set in the requirements and still providing contiguity in the channelisation. The power and area saved using the almost-linear phase IIR ilter reaches up to 35%, which makes it advantageous to be used instead o an FIR ilter. The results have also shown us that the IIR scene however or non-hal-band ilters will oer a lot more possibilities or complexity reduction, especially i the phase response requirements could be relaxed rom the perect linear-phase, to some intermediate/minimum-phase. The HB ilter designed using the LLFT is the most promising o all i the phase distortion can be ignored. The cost o this ilter is less than hal o the cost or accommodating a HB FIR ilter, translating to almost 50% power and 60% area savings. Reerences [1] Cornield P., Bishop A., Masterton R., Weinberg S., A Generic On-Board Digital Processor suitable or Multiple Missions, Proceedings o the 2nd ESA Workshop on Advanced Flexible Telecom Payloads, Noordwijk, The Netherlands, April [2] Wang C. C., Nguyen T. M. and G. W. Goo, Satellite payload architectures or wideband communications systems, Proceedings o the IEEE Military Communications Conerence Proceedings, Vol. 2, Atlantic City, 1999, pp [3] Hentschel T., Channelization or sotware deined base-stations, Ann. Telecomm., vol. 57, no. 5 6, May June 2002, pp [4] Krukowski A. and Kale I., The Design o Arbitrary-band Multi-path Polyphase IIR Filters, Proceedings o the IEEE International Symposium on Circuits and Systems, Vol. 2, Sydney, 2001, pp [5] Krukowski A. and Kale I., DSP system design: Complexity reduced IIR ilter implementation or practical applications, Boston: Kluwer Academic Publish`ers, [6] Kale I., Gryka J., Cain G.D. and Beliczynski B., FIR ilter order reduction: balanced model truncation and Hankelnorm optimal approximation, Proceedings IEE on Vision, Image and Signal Processing, Volume: 141, No: 3, Page(s): , June [7] Gryka J., Kale I., and Cain G. D., Complex IIR ilter design through balanced model reduction o FIR prototypes, IET Electronic Letters, Vol. 31, no. 16, pp , [8] Kale I., Cain G. D., and Morling R. C. S. Minimum-phase ilter design rom linear-phase startpoint via balanced model truncation, IET Electronic Letters, Vol. 31, no 20, pp , [9] Schussler H. W., Steen P., Recursive Hal-band Filter", International Journal o Electronics and Communication, no. 6 (55), Aug. 2001, pp

9 [10] Lawson, S., On design techniques or approximately linear phase recursive digital ilters", Proceedings o International Conerence on Circuits and Systems, June 1997, pp [11] Lu, W. S., Design o stable IIR digital ilters with equiripple passbands and peak-constrained least squares stopbands, Proceedings o International Conerence on Circuits and Systems, June 1997, pp [12] Krukowski A. and Kale I., Almost linear-phase poly phase IIR low pass/high pass Filter approach," Proceedings o IEEE Int. Symp. Signal Processing Its Applications, Aug 1999, pp [13] Krukowski A. and Kale I., Two approaches or ixed-point ilter design: bit-lipping algorithm and constrained downhill simplex method, Proceedings o IEEE Symposium on Signal Processing and its Applications, Vol.2, Aug 1999, pp

ECE 5655/4655 Laboratory Problems

Assignment #4 ECE 5655/4655 Laboratory Problems Make Note o the Following: Due Monday April 15, 2019 I possible write your lab report in Jupyter notebook I you choose to use the spectrum/network analyzer