ECE 5655/4655 Laboratory Problems

Transcription

1 Assignment #4 ECE 5655/4655 Laboratory Problems Make Note o the Following: Due Monday April 15, 2019 I possible write your lab report in Jupyter notebook I you choose to use the spectrum/network analyzer to obtain ti graphics, just import these graphics iles into Jupyter notebook as well. Problems: Real-Time FIR Digital Filters 1. Linear phase lowpass ilter design rom amplitude response speciications. a.) Design a test ilter using a 48 khz sampling rate. The design is to be an equal ripple lowpass that satisies the amplitude response speciications shown below: H db k 4.0k passband ripple = 0.2 db stopband loss = 50 db 24.0k Hz One design approach is to use MATLAB s datool. I recommend you use the scikit-dsp-comm module ir_design_helper. The details o this are explained in the Jupyter notebook Assignment4_sp2019.ipynb contained in the Python older o Assignment 4 ZIP package, Assignment4_sp2019.zip. Save the coeicients rom the design in a header ile as explained in the Jupyter notebook. Run the ilter in real-time on the FM4 board using the routine: FIR_ilt_loat32(&FIR1,&x,&y,1). b.) Now quantize the coeicients the coeicients in the Jupyter notebook and save out a quantized coeicient header ile, similar to -- s 2

2 Run the ilter on the FM4 using: FIR_ilt_int16(&FIR2,&let_in_sample,&let_out_sample,1,15); Compare measured results with theory results, similar what is shown below or a 78 tap lowpass design. In particular provide magnitude and phase response plots beore and ater quantization. Your plots should use a digital requency axis scaled to the actual sampling requency, e.g., as shown in the Jupyter notebook code cell and plot screen shot below: c.) Finally compare the execution perormance under -o3 optimization o the loat_32 and int_16 design, and compare the loating-point ilter perormance with the CMSIS-DSP FIR ilter unction arm_ir_32(), which has the identical interace to FIR_ilt_32(), except pstate needs to managed dierently as described in Problem 2c. From ARM s CMSIS-DSP Web Site pstate has length equal to numtaps+blocksize-1, here block- Size=1, so in the end pstate has length numtaps. Note: On the ixed-point side arm_ir_- ast_q15()/arm_ir_q15() are the CMSIS-DSP unction equivalent to FIR_ilt_int16(). Measuring timing using GPIO signals is recommended. To be clear, in the end you will have our timing results: (1) FIR_ilt_32(), (2) FIR_ilt_int16(), (3) arm_ir_32(), and arm_ir_ast_q15() or arm_ir_q15(). Note: With the ARM ixed-point unctions the number o ilter coeicients must be greather than our and even! I numtaps is odd the ix is to append one zero coeicient to the end o the ilter and increate numtaps by one. ECE 5655/4655 Page 2 Assignment #4

3 2. Consider an equal-ripple FIR bandpass with amplitude response: H db k passband ripple = 1 db stopband loss = 60 db -- s k 5.0k 7.0k7.5k The objective is to implement this ilter on both channels, let and right. Yes, you will need to instantiate two ilter data structures and two state arrays. a.) Design this ilter in the Jupyter notebook using ir_d.ir_remez_bp(). Note: To get the desired 60 db stopband attenuation you will have to tweak the inal argument N_bump. Export the coeicients to a C header ile as loat32_t. b.) The ilter length in taps should be just over 200. This ilter will not run at s = using ISR-based processing. Show that the ilter will meet real-time requirement at s = 8000 Hz using the CMSIS-DSP unction arm_ir_32(). Obtain the requency response o the ilter (one channel is OK here) using the network analyzer (Agilent o Analog Discovery) and veriy that the critical requencies are scaled accordingly or operating a s = design at reduced sampling rate. Measure the interrupt processing time using the GPIO pin. How ar is this time away rom meeting real-time at s = Hz? c.) To get the design running at s = Hz you are orced to use DMA to increase the processing eiciency. Furthermore you must use the CMSIS-DSP unction arm_ir_32(&fir1, xl, yl, DMA_BUFFER_SIZE); arm_ir_32(&fir2, xr, yr, DMA_BUFFER_SIZE); and its rame based capabilities. Note when using arm_ir_32() with DMA the state array, pstate, will have length DMA_BUFFER_SIZE + N_FIR_Taps -1. Note in this problem the unction FIR_ilt_loat32(&FIR1,xL,yL,DMA_BUFFER_SIZE); is not ast enough to do even one channel. For iltering with DMA you unortunately need the break the rame into let and right channel buers beore using rame-based FIR iltering. For example on the FM4 we have to unpack and then re-pack: void process_dma_buer(void) { int i; uint32_t *txbu, *rxbu; i(tx_proc_buer == PING) txbu = dma_tx_buer_ping; else txbu = dma_tx_buer_pong; i(rx_proc_buer == PING) rxbu = dma_rx_buer_ping; else rxbu = dma_rx_buer_pong; // Unpack DMA buer or(i=0; i<dma_buffer_size ; i++) 24.0k Hz ECE 5655/4655 Page 3 Assignment #4

4 { //*txbu++ = *rxbu++; audio_chr = (rxbu[i] & 0x0000FFFF); audio_chl = ((rxbu[i] >>16)& 0x0000FFFF); xl[i] = FM4_GUI.P_vals[0]*audio_chL; xr[i] = FM4_GUI.P_vals[1]*audio_chR; } // Frame-based processing // TBD // Repack DMA buer or(i=0; i<dma_buffer_size ; i++) { audio_chl = (int16_t) yl[i]; audio_chr = (int16_t) yr[i]; } *txbu++ = ((audio_chl<<16 & 0xFFFF0000)) + (audio_chr & 0x0000FFFF); } tx_buer_empty = 0; rx_buer_ull = 0; Test the ull s = Hz sampling rate design using the DMA processing unction shown above. Obtain a network analyzer plots o the ilter response on both the let and right channels to compare with the Python theory. Measure the rame processing time using the GPIO pin. What is the equivalent time to process one sample per channel? 3. Hilbert transorm ilter design and real-time analytic signal ormation or envelope detection o an AM signal. The basic idea o this problem is to implement the ollowing block diagram: AM modulated carrier at 16 khz with message requency a 1kHz sinusoid at a depth o 80%. s xn n d You get to use a Delay ast square-root here FIR Re FM4 zn rn 1 z 1 FM4 A/D xn z 1 D/A Hilbert Im Envelope DC Block FIR Detector = 48kHz M = 31 taps s = 48kHz xˆ n The Hilbert transorm is discussed in ECE 4625/5625 Communication Systems I. The heart o the matter is that in the requency domain, the Hilbert transorm o a signal phase shits equally all requency components by 90, i.e., Xˆ jsgn X, where X = Fxt, H is the special Hilbert transorming ilter, and n d = H Hilbert X = Headphone Jack ECE 5655/4655 Page 4 Assignment #4

5 sgn 1, 0 1, 0 In the discrete-time domain the results are the same, that is = Xˆ e j2 s jsgn e j2 s Xe j2 s = Here the Hilbert transorming ilter is an FIR ilter o 31 taps which approximates the ideal Hilbert transorming ilter. See the Jupyter notebook or design details, but note that an alternate FIR design, which has a narrow passband centered on 16 khz is now recommended. With this design the passband ripple is very small around 16 khz, e.g, The mean time delay 31-Tap designs with dierent passband deinitions; thus the trade to get a lat gain over a narrow bandwidth in the second design. or signals passing through the ilter is = 15, hence in the above block diagram n d = 15 samples. The second design (orange) will produce a optimum analytic signal when the input is centered on 16 khz and has a narrow spectrum. An analytic signal (a complex signal) is ormed by adding zn = xn + jxˆ n = rn e j n has magnitude rn which is the so-called signal envelope. In this problem we are interested in demodulating an amplitude modulated (AM) carrier o the orm xn A c 1 a 2 m + cos ----n, 2 c = cos --- n xn + jxˆ n. The new signal where 0 a 1 is the AM modulation index, m is the message requency, and c is the carrier requency. When the signal xn is processed into the analytic signal zn, the corresponding envelope is rn A c 1 a 2 m + cos ----n A c A c a 2 m = = + cos ----n s The message signal is proportional to the second term. Hence to complete the processing you need at include a DC blocking ilter to remove the bias term A c. This ilter, shown in the above block diagram, has z-transorm representation s s s ECE 5655/4655 Page 5 Assignment #4

6 H block z 1 z 1 = , 1 z 1 with close to, but less than one. A value o 0.95 works well here. In code you will need to implement the ilter dierence equation yn = yn 1 + xn xn 1 This is best done by creating two global variables to hold the ilter state. In Python code, written to look like C, this might appear as shown below: a.) Validate the system concept in the Jupyter notebook by completing the simulation model already started in Assignment4_sp2019.ipynb. The objective is to veriy that the envelop o the complex signal does indeed contain the original 1 khz message signal. b.) Implement the system on the FM4 board and input an AM test signal with 16 khz carrier requency and 1 khz message sinusoid at 80% modulation. Coniguration o the Analog Discovery waveorm generator is: c.) Compare results captured rom the FM4 headphone output jack with the Python simulation o (a). d.) Going beyond the call, consider increasing the Hilbert FIR length to 63 or 121 to see what improvement you see in the recovered AM message signal. ECE 5655/4655 Page 6 Assignment #4