Thermal Characteristics & Considerations VIMOS Product Portfolio
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1 Thermal Characteristics & Considerations VIMOS Product Portfolio Introduction: This document provide s the RF amplifier design Engineer with a useful reference to aid in thermal TM considerations and calculations, applied to the VIMOS portfolio of RF power transistors. Rather than focusing on junction temperature measurement and modeling techniques, the application note will focus on the basic practical application of device specific thermal characterization data, to calculate the junction temperature given the variables: pulse condition, flange temperature, and power dissipation. It is useful to review terms and symbols commonly used for thermal analysis of characterization of RF Transistors: Symbol / Abbreviation Term Description R (th) K R C Thermal Resistance Thermal Conductivity Thermal Resistance Junction to Case Heat Capacity / Capacitance Measurement of resistance of heat flow through a specific material. The reciprocal of heat conductivity. Measurement of the conductivity of heat flow through a specific material. The reciprocal of thermal resistance. Thermal resistance between the bottom side of the flange/case (c = case) and the semiconductor junction (J-Junction). A measure of a materials capacity to store heat, analogous to a capacitors ability to store charge in electrical circuits. P DISS Power Dissipation The amount of power being dissipated in the RF Transistor. The thermal resistance, from the semiconductor junction to the back side of the flange or case, is identified on RF transistor data sheets in various ways: R(th) R The RF power transistor is comprised of a die of semiconductor material mounted on a metal flange, diamond or ceramic substrate, wire bonds, leads, and a plastic or ceramic lid. The heat is generated in the semiconductor junction and is conducted away via the flange/substrate to the backside of the flange (also known as the case ). The flange is typically mounted to a heat sink in the amplifier application. Although heat is being dissipated through numerous paths, such as convection from the lid or top surface of the device or via conduction from the wire bonds to the leads of the device package, the dominate heat transfer path is from the junction of the semiconductor through any substrates involved to the flange or case of the device, and finally to the heat sink. All other heat transfer paths can be ignored as they are insignificant. REV B
2 The practical application of thermal data provided in data sheets, with regards to the RF amplifier designer, is to obtain the junction temperature given specific flange temperatures. This is easily calculated once the thermal resistance, from the back side of the device flange to the actual semiconductor junction (referred to as R θjc ) is known. Factors that impact the junction temperature include: - thermal resistance of the materials in the heat path - temperature of the materials in the heat path (As temperature rises, the ability for materials to conduct heat generally degrades. For example, with regard to Si the thermal conductivity decreases by about 0.3% per C increase in temperature.) - pulse width and duty cycle (High power pulsed RF transistors contain various materials in the heat path from the semiconductor junction to the back side of the flange have sufficient heat capacitance to absorb and dissipate heat between pulses. As the pulse conditions become more demanding the heat storage of the materials approaches saturation and the effective thermal resistance increases.) - power being dissipated by the device The R θjc values for the various VIMOS products in the ASI portfolio, at the time of this writing, at specific pulse conditions are shown in Table 1.
3 Part Number R(th) PULSE CONDITIONS HVV uS 10% HVV uS 10% HVV TBD 300uS 10% HVV uS 10% HVV uS 10% HVV TBD 10uS 10% HVV uS 5% HVV L uS on 10uS off x 48 repeat every 24ms HVV1011-1L uS on 10uS off x 48 repeat every 24ms HVV uS 5% HVV L uS on 10uS off x 48 repeat every 24ms HVV uS 5% HVV L uS on 10uS off x 48 repeat every 24ms HVV uS 1% HVV uS 1% HVV uS 1% HVV uS 10% HVV uS 10% (Flange Temp = 25 Deg C) Table 1. Thermal resistance from the semiconductor junction to the back side of the device flange.
4 With the thermal resistance data provided on table 1, the junction temperature can be calculated for each of the devices listed, as follows: ( P D R θjc T CASE T J = + ( The HVV is a 300 Watt RF transistor characterized for a 50uS Pulse Width, 5% Duty Cycle, pulse condition. The thermal resistance from the junction to the back side of the flange is shown to be.14 C/W. The device junction temperature will rise 0.14 C higher than the temperature of the back side of the flange, for every watt dissipated. Thermal resistance increases as the material temperature increases, the thermal resistance is only valid for a back side flange temperature of 25 C. A derating factor will need to be considered to obtain a more precise calculation of the junction temperature for higher case temperatures. Assuming a 300 watt RF amplifier design is 50% efficient, then 300 watts of RF output power will be delivered to the load and 300 watts of power will be dissipated in the device itself. In this case the junction temperature can be calculated as follows: (300W x.14w/ C) + 25 C T J = 67 C Calculating the thermal resistance and junction temperature for various pulse conditions is simplified by using an electrical equivalent circuit loaded into a circuit analysis tool. Thermal resistance, heat capacity and temperature have their electrical counter parts; electrical resistance, capacitance and voltage. D. Rice, J. Crowder, and B. Battaglia authored a paper titled Dynamic Models for Predicting the Thermal Behavior of Vertical MOSFET Transistors under Pulsed Conditions. detailing their thermal transient electrical equivalent model for the HVV The model is shown in Figure 1. Figure 2 shows various pulse conditions, drawn to scale, to provide a visual representation of the periods of heating and cooling at various pulse conditions. Following figure 2 are the results of simulations of the maximum junction temperature using an electrical equivalent thermal model. The calculated thermal resistance is shown, which can then be used to calculate the junction temperature under those specific pulse conditions, for various flange temperatures, and dissipation levels.
5 Pulse Period = 3000µS (3mS) 300uS Pulse Width 2700uS Duty Cyle = Pulse Width = 300µS = 10% Pulse Period 3000µS On Off UHF Band Weather & Long Range Radar 300uS Pulse Width,10% Duty Cycle Ground & Air DME, TCAS and IFF MHz 10uS Pulse Width, 10% Duty Cycle TCAS, IFF, Mode-S Applications 50uS Pulse Width, 5% Duty Cycle Airborne DME MHz 10uS Pulse Width, 1% Duty Cycle Ground Based Radar MHz 200uS Pulse Width,10% Duty Cycle Mode S-ELM Interrogator MHz 32uS on/18us off x 48, repeated every 24mS Figure 2. Common pulse conditions for various high power pulsed applications drawn to scale.
6 Voltage at this node is equivalent to the junction temperature V = C R4.5 Ohms R3.4 Ohms R2.26 Ohms R1.2 Ohms C4.033F C3.007F C2.0005F C1.15F Voltage at this node is equivalent to the case temperature V = C - + Current source establishes dissipated power (300 amps = 300 Watts Dissipation) Voltage source establishes case temperature (25 volts = 25 C) Figure 1. Electrical Equivalent Thermal Transient Model. The maximum junction temperature for each of the specific pulse conditions shown in figure 2 have been simulated using the equivalent electrical circuit in figure 1. by pulsing the current source, and measuring the voltage at the node shown above. The voltage source in the model was set to 25 volts, equivalent to having a 25 C flange temperature. The simulation applies to the HVV , HVV05-300, and HVV Once the junction temperature is obtained, the thermal resistance from the junction to the case is calculated and then the junction temperature can be calculated for various power dissipation levels. The maximum voltage at the node shown in the model above is equivalent to the maximum junction temperature in degrees Celsius. The HVV and HVV are simply two die, rather than one, packaged in a larger package. Each die has the same thermal impedance and capacitance characteristics as the model shown above, but the dissipation is roughly twice as high. Therefore an electrical equivalent transient thermal model is simply two of the models (shown in figure 1 above) in parallel. Future planned updates to this document will expound on that model. Devices operating at longer pulse conditions, such as the HVV , HVV0912-0, HVV L, and HVV L feature an internal construction scheme that has significantly lower thermal resistance than that of the shorter pulse devices such as the HVV At the time of this writing the thermal resistance has been measured, modeled, and verified via the internal body diode method. The electrical equivalent thermal transient model has not yet been created.
7 Voltage V1, V / Temperature C UHF Band Weather & Long Range Radar 300uS Pulse Width,10% Duty Cycle Simulation Results of Equivalent Electrical Circuit me, ms time, msec (T J T CASE P D (136-25) ( Junction Temperature C Power Dissipation (watts)
8 Voltage / Temperature V1, V C Ground & Air DME, TCAS and IFF MHz 10uS Pulse Width, 10% Duty Cycle Simulation Results of Equivalent Electrical Circuit (T J T CASE P D (74-25) ( Junction Temperature C me, ms Time (msec) Power Dissipation (watts)
9 Voltage / Temperature V1, V C TCAS, IFF, Mode-S Applications 50uS Pulse Width, 5% Duty Cycle Simulation Results of Equivalent Electrical Circuit (T J T CASE P D (68-25) ( Junction Temperature C me, ms Time (msec) Power Dissipation (watts)
10 Airborne DME MHz 10uS Pulse Width, 1% Duty Cycle Voltage / Temperature V1, V C Simulation Results of Equivalent Electrical Circuit (T J T CASE P D (35-25) ( Junction Temperature C me, ms ec Time, msec Power Dissipation (watts)
11 Voltage / Temperature V1, V C Ground Based Radar MHz 200uS Pulse Width,10% Duty Cycle Simulation Results of Equivalent Electrical Circuit (T J T CASE P D (123-25) ( Junction Temperature C Time me, ms (msec) Power Dissipation (watts)
12 References: D. Rice, J. Crowder, B. Battaglia, Dynamic Models for Predicting the Thermal Behavior of Vertical MOSFET Transistors under Pulsed Conditions Acrian, Inc. Thermal Time Constant for High Piower Pulsed Transistors - Power Flow Calculations Acknowledgements: Special thanks to Srdjan Pajic for circuit simulations and graphs.
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