Pin Configuration. Surface Mount 1.40 x 1.20 x 0.46 mm

Transcription

1 Features For Satellite Radio Applications Usable Bandwidth 5 MHz Low Loss Good Selectivity Ceramic Chip Scale Package (CSP) Singleended Input,, 100Ω or 200Ω Hermetic RoHS compliant (2002/95/EC), Pbfree Pb Package Surface Mount 1.0 x 1.20 x 0.6 mm Pin Configuration Bottom View NOM MAX Pin No. Description 1 Input 3, 2,5 Case ground 0.25 Dimensions shown are nominal in millimeters All tolerances are ±0.10mm Body: Al 2 O 3 ceramic Lid: Kovar or Alloy 2, Au over Ni plated Terminations: Au plating µm, over a 2 6µm Ni plating Subject to change or obsolescence without notice Rev A 0607 TriQuint Semiconductor, Inc. Page 1 of 7

2 Target Electrical Specifications (1) Operating Temperature Range: (2) 0 to +85 o C Parameter (3) Minimum Typical Maximum Unit Center Frequency MHz Maximum Insertion Loss MHz db Absolute Attenuation MHz MHz 2106 MHz 222 MHz 253 MHz 2570 MHz Amplitude Variation MHz db pp Amplitude Balance ( S 31 /S 21 ) MHz db Phase Balance [φ(s 31 )φ(s 21 )] MHz degree Source Impedance (singleended) () 50 Ω Load Impedance (balanced) () 100 Ω Notes: 1. All target specifications are based on TriQuint test circuit shown below 2. In production, devices will be tested at room temperature to a guardbanded specification to ensure electrical compliance over temperature 3. Electrical margin has been built into the design to account for the variations due to temperature drift and manufacturing tolerances. This is the optimum impedance in order to achieve the performance shown db Test Circuit: Actual matching values may vary due to PCB layout and parasitics.7nh Singleended.7nH PCB: PCB5BT V1 Inductor Kit: LQWANN7D series inductors Port extension: 58psec (input), 3psec (output+), 3psec (output) Subject to change or obsolescence without notice Rev A 0607 TriQuint Semiconductor, Inc. Page 2 of 7

3 Typical Performance (at +25 o C) Subject to change or obsolescence without notice Rev A 0607 TriQuint Semiconductor, Inc. Page 3 of 7

4 Target Electrical Specifications (1) Operating Temperature Range: (2) 0 to +85 o C Parameter (3) Minimum Typical Maximum Unit Center Frequency MHz Maximum Insertion Loss MHz db Absolute Attenuation MHz MHz 2106 MHz 222 MHz 253 MHz 2570 MHz Amplitude Variation MHz db pp Amplitude Balance ( S 31 /S 21 ) MHz db Phase Balance [φ(s 31 )φ(s 21 )] MHz degree Source Impedance (singleended) () 50 Ω Load Impedance (balanced) () 200 Ω Notes: 1. All target specifications are based on TriQuint test circuit shown below 2. In production, devices will be tested at room temperature to a guardbanded specification to ensure electrical compliance over temperature 3. Electrical margin has been built into the design to account for the variations due to temperature drift and manufacturing tolerances. This is the optimum impedance in order to achieve the performance shown db Test Circuit: Actual matching values may vary due to PCB layout and parasitics Singleended 18nH PCB: PCB5BT V1 Inductor Kit: LQWANN7D10, LQWAN18NH series inductors Port extension: 58ps (input), 3ps (output +), 3ps (output ) Subject to change or obsolescence without notice Rev A 0607 TriQuint Semiconductor, Inc. Page of 7

5 Typical Performance (at +25 o C) Subject to change or obsolescence without notice Rev A 0607 TriQuint Semiconductor, Inc. Page 5 of 7

6 Matching Schematics.7nH Singleended.7nH Singleended 18nH Marking PCB Footprint Marking code MFG site AD M WWY ID dot Date code 0.35 The date code consists of: WW = 2 digit week, Y = last digit of year, M = manufacturing site code Tape and Reel This footprint represents a recommendation only Dimensions shown are nominal in millimeters Ø3 ID dot Ø1.5 A Ø102 Ø20.2 Ø Direction of travel 0.91 Section AA Ø1.0 A Dimensions shown are nominal in millimeters Packaging quantity: 10,000 units/reel Subject to change or obsolescence without notice Rev A 0607 TriQuint Semiconductor, Inc. Page 6 of 7

7 Maximum Ratings Parameter Symbol Minimum Maximum Unit Operating Temperature Range T o C Storage Temperature Range T stg 0 +1 o C Warnings Electrostatic Sensitive Device (ESD) Avoid ultrasonic exposure Important Notes RoHS Compliance This product complies with EU directive 2002/95/EC (RoHS) Pb Solderability Compatible with JEDEC JSTD020C Pbfree process, 260 C peak reflow temperature (see soldering profile) Links to Additional Technical Information PCB Layout Tips Qualification Flowchart Soldering Profile SParameters RoHS Information Other Technical Information TriQuint s liability is limited only to the Surface Acoustic Wave (SAW) component(s) described in this data sheet. TriQuint does not accept any liability for applications, processes, circuits or assemblies, which are implemented using any TriQuint component described in this data sheet. PO Box Orlando, FL USA Contact Information Phone: +1 (07) Fax: +1 (07) infoproduct@tqs.com Web: Or contact one of our worldwide Network of sales offices, Representatives or distributors Subject to change or obsolescence without notice Rev A 0607 TriQuint Semiconductor, Inc. Page 7 of 7