P-Channel 20 V (D-S) MOSFET

Transcription

1 P-Channel 2 V (-S) MOSFET Si545AEU PROUCT SUMMARY V S (V) R S(on) () (Max.) I (A) a Q g (Typ.) at V GS = V at V GS = V at V GS = -.8 V PowerPAK ChipFET Single S Bottom View Ordering Information: Si545AEU-T-GE3 (Lead (Pb)-free and Halogen-free) 2 S 3 G 4.9 mm 43 nc FEATURES TrenchFET Power MOSFET Thermally Enhanced PowerPAK ChipFET Package - Small Footprint Area - Low On-Resistance % R g and UIS Tested Typical ES Protection: 55 V (HBM) Material categorization: For definitions of compliance please see APPLICATIONS Portable evices such as Smart Phones, Tablet PCs and Mobile Computing - Battery Switch - Load Switch - Power Management Marking Code LC XXX Part # Code ABSOLUTE MAXIMUM RATINGS (T C = 25 C, unless otherwise noted) Lot Traceability and ate Code P-Channel MOSFET Parameter Symbol Limit Unit rain-source Voltage V S - 2 V Gate-Source Voltage V GS ± 8 T C = 25 C - 25 a T C = 7 C - 25 a Continuous rain Current (T J = 5 C) I T A = 25 C - 5 b, c T A = 7 C - 2 b, c A Pulsed rain Current (t = μs) I M - 7 T C = 25 C - 25 a Continuous Source-rain iode Current I S T A = 25 C b, c Single Avalanche Current I AS - 5 L =. mh Single Avalanche Energy E AS mj T C = 25 C 3 T C = 7 C 2 Maximum Power issipation P W T A = 25 C 3. b, c T A = 7 C 2 b, c Operating Junction and Storage Temperature Range T J, T stg - 5 to 5 C Soldering Recommendations (Peak Temperature) d, e 26 THERMAL RESISTANCE RATINGS Parameter Symbol Typical Maximum Unit Maximum Junction-to-Ambient b, f t 5 s R thja 34 4 Maximum Junction-to-Case (rain) Steady State R thjc 3 4 C/W Notes a. Package limited. b. Surface mounted on " x " FR4 board. c. t = 5 s. d. See solder profile ( The PowerPAK ChipFET is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 9 C/W. G S S3-673-Rev. A, 29-Jul-3 ocument Number: THIS OCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PROUCTS ESCRIBE HEREIN AN THIS OCUMENT ARE SUBJECT TO SPECIFIC ISCLAIMERS, SET FORTH AT

2 Si545AEU SPECIFICATIONS (T J = 25 C, unless otherwise noted) Parameter Symbol Test Conditions Min. Typ. Max. Unit Static rain-source Breakdown Voltage V S V GS = V, I = - 25 μa - 2 V V S Temperature Coefficient V S /T J - I = - 25 μa V GS(th) Temperature Coefficient V GS(th) /T J 2.8 mv/ C Gate-Source Threshold Voltage V GS(th) V S = V GS, I = - 25 μa V V S = V, V GS = ± 8 V ± 2 Gate-Source Leakage I GSS V S = V, V GS = ± 4.5 V ±.2 μa V S = - 2 V, V GS = V - Zero Gate Voltage rain Current I SS V S = - 2 V, V GS = V, T J = 55 C - On-State rain Current a I (on) V S - 5 V, V GS = V - A Notes a. Pulse test; pulse width 3 μs, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. V GS = V, I = - A.8.96 rain-source On-State Resistance a R S(on) V GS = V, I = - 5 A..32 V GS = -.8 V, I = - 2 A.7.22 Forward Transconductance a g fs V GS = - V, I = - A 47 S ynamic b Input Capacitance C iss 43 Output Capacitance C oss V S = - V, V GS = V, f = MHz 445 pf Reverse Transfer Capacitance C rss 4 V S = - V, V GS = - 8 V, I = - 4 A 8 2 Total Gate Charge Q g nc Gate-Source Charge Q gs V S = - V, V GS = V, I = - 4 A 7 Gate-rain Charge Q gd.4 Gate Resistance R g f = MHz Turn-On elay Time t d(on) 3 6 Rise Time t r V = - V, R L = 45 9 Turn-Off elay Time t d(off) I - A, V GEN = V, R g = 75 5 Fall Time t f 25 5 Turn-On elay Time t d(on) 2 25 ns Rise Time t r V = - V, R L = 5 Turn-Off elay Time t d(off) I - A, V GEN = - 8 V, R g = 8 6 Fall Time t f 2 4 rain-source Body iode Characteristics Continuous Source-rain iode Current I S T C = 25 C - 25 Pulse iode Forward Current (t = μs) I SM - 7 A Body iode Voltage V S I S = - A, V GS = V V Body iode Reverse Recovery Time t rr 35 7 ns Body iode Reverse Recovery Charge Q rr 2 4 nc I F = - A, di/dt = A/μs, T J = 25 C Reverse Recovery Fall Time t a 2 ns Reverse Recovery Rise Time t b 5 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. S3-673-Rev. A, 29-Jul-3 2 ocument Number: THIS OCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PROUCTS ESCRIBE HEREIN AN THIS OCUMENT ARE SUBJECT TO SPECIFIC ISCLAIMERS, SET FORTH AT

3 Si545AEU TYPICAL CHARACTERISTICS (25 C, unless otherwise noted) I GSS - Gate Current (ma) T J = 25 C I - rain Current (A) T C = 25 C T C = 25 C V GS - Gate-Source Voltage (V) T C = - 55 C V GS - Gate-to-Source Voltage (V) Gate Current vs. Gate-Source Voltage Transfer Characteristics -2.5 I GSS - Gate Current (A) T J = 5 C T J = 25 C R S(on) - On-Resistance (Ω) V GS =.8 V V GS = 2.5 V V GS = 4.5 V V GS - Gate-to-Source Voltage (V) Gate Current vs. Gate-Source Voltage I - rain Current (A) On-Resistance vs. rain Current and Gate Voltage 8 V GS = 5 V thru 2.5 V 7 6 I - rain Current (A) V GS = 2 V C - Capacitance (pf) C iss C oss V S - rain-to-source Voltage (V) Output Characteristics C rss V S - rain-to-source Voltage (V) Capacitance S3-673-Rev. A, 29-Jul-3 3 ocument Number: THIS OCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PROUCTS ESCRIBE HEREIN AN THIS OCUMENT ARE SUBJECT TO SPECIFIC ISCLAIMERS, SET FORTH AT

4 Si545AEU TYPICAL CHARACTERISTICS (25 C, unless otherwise noted) 8.5 V GS - Gate-to-Source Voltage (V) I = 4 A V S = V V S = 5 V V S = 6 V R S(on) - On-Resistance (Ω) T J = 25 C I = A T J = 25 C Q g - Total Gate Charge (nc) Gate Charge V GS - Gate-to-Source Voltage (V) On-Resistance vs. Gate-to-Source Voltage R S(on) - On-Resistance (Normalized) V GS = 4.5 V, 2.5 V ; I = A V GS =.8 V; I = 5 A V GS(th) (V) I = 25 μa T J - Junction Temperature ( C) On-Resistance vs. Junction Temperature T J - Temperature ( C) Threshold Voltage 5 T J = 5 C 4 I S - Source Current (A) T J = 25 C (W) Power V S - Source-to-rain Voltage (V)... Time (s) Soure-rain iode Forward Voltage Single Pulse Power, Junction-to-Ambient S3-673-Rev. A, 29-Jul-3 4 ocument Number: THIS OCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PROUCTS ESCRIBE HEREIN AN THIS OCUMENT ARE SUBJECT TO SPECIFIC ISCLAIMERS, SET FORTH AT

5 Si545AEU TYPICAL CHARACTERISTICS (25 C, unless otherwise noted) Limited by R S(on) * I - rain Current (A). T A = 25 C µs ms ms ms s s C BVSS Limited.. V S - rain-to-source Voltage (V) * V GS > minimum V GS at which R S(on) is specified Safe Operating Area, Junction-to-Ambient I - rain Current (A) Package Limited issipation (W) Power T C - Case Temperature ( C) T C - Case Temperature ( C) Current erating* Power erating * The power dissipation P is based on T J(max.) = 5 C, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit. S3-673-Rev. A, 29-Jul-3 5 ocument Number: THIS OCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PROUCTS ESCRIBE HEREIN AN THIS OCUMENT ARE SUBJECT TO SPECIFIC ISCLAIMERS, SET FORTH AT

6 Si545AEU TYPICAL CHARACTERISTICS (25 C, unless otherwise noted) uty Cycle =.5 Normalized Effective Transient Thermal Impedance t.2. Notes:. P M.5.2 t 2 t. uty Cycle, = t 2 2. Per Unit Base = R thja = 9 C/W 3. T JM - T A = P M Z (t) thja Single Pulse 4. Surface Mounted Square Wave Pulse uration (s) Normalized Thermal Transient Impedance, Junction-to-Ambient uty Cycle =.5 Normalized Effective Transient Thermal Impedance Single Pulse Square Wave Pulse uration (s) Normalized Thermal Transient Impedance, Junction-to-Case maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see S3-673-Rev. A, 29-Jul-3 6 ocument Number: THIS OCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PROUCTS ESCRIBE HEREIN AN THIS OCUMENT ARE SUBJECT TO SPECIFIC ISCLAIMERS, SET FORTH AT

7 PowerPAK ChipFET Case Outline Package Information (8) (7) (6) (5) Pin # indicator E () (2) (3) (4) Side view of single Side view of dual Z A C b e A H K () (2) (3) G(4) L K L 2 2 SI() GI(2) S2(3) G2(4) etail Z E 3 E3 H K2 E2 (8) (7) (6) S(5) Backside view of single pad (8) (7) 2(6) 2(5) K3 Backside view of dual pad IM. MILLIMETERS INCHES MIN. NOM. MAX. MIN. NOM. MAX. A A b C E E E E e.65 BSC.26 BSC H K K K K L C4-63-Rev. E, 2-Jul-4 WG: 594 Note Millimeters will govern Revision: 2-Jul-4 ocument Number: 7323 THIS OCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PROUCTS ESCRIBE HEREIN AN THIS OCUMENT ARE SUBJECT TO SPECIFIC ISCLAIMERS, SET FORTH AT

8 Application Note 826 RECOMMENE MINIMUM PAS FOR PowerPAK ChipFET Single.2 (.8).225 (.9).65 (.26).3 (.2).35 (.4).3 (.2). (.4).25 (.).9 (.75).5 (.59).5 (.2).35 (.4).35 (.4).87 (.74).35 (.2) (.) Recommended Minimum Pads imensions in mm/(inches) Return to Index APPLICATION NOTE ocument Number: Revision: 2-Jan-8 9

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