2 GHz, Ultralow Distortion, Differential RF/IF Amplifier AD8352

Transcription

1 FEATURES 3 db bandwidth of. GHz (AV = +1 db) Single resistor gain adjust: 3 db AV db Single resistor and capacitor distortion adjust Input resistance: 3 kω, independent of gain (AV) Differential or single-ended input to differential output Low noise input stage:.7 nv/ Hz RTI at AV = 1 db Low broadband distortion 1 MHz: 86 HD, 8 HD3 7 MHz: 8 HD, 8 HD3 19 MHz: 81 HD, 87 HD3 OIP3 of 1 dbm at 1 MHz Slew rate: 8 V/ns Fast settling and overdrive recovery of < ns Single-supply operation: 3 V to. V Low power dissipation: 37 ma typical at V Power-down capability: ma at V Fabricated using the high speed XFCB3 SiGe process APPLICATIONS Differential ADC drivers Single-ended-to-differential conversion RF/IF gain blocks SAW filter interfacing GENERAL DESCRIPTION The is a high performance differential amplifier optimized for RF and IF applications. It achieves better than 8 db SFDR performance at frequencies up to MHz, and 6 db beyond MHz, making it an ideal driver for high speed 1-bit to 16-bit analog-to-digital converters (ADCs). Unlike other wideband differential amplifiers, the has buffers that isolate the gain setting resistor (RG) from the signal inputs. As a result, the maintains a constant 3 kω input resistance for gains of 3 db to db, easing matching and input drive requirements. The has a nominal 1 Ω differential output resistance. The device is optimized for wideband, low distortion performance at frequencies beyond MHz. These attributes, together with its wide gain adjust capability, make this device the amplifier of choice for general-purpose IF and broadband applications where low distortion, noise, and power are critical. It is ideally suited for driving not only ADCs but also mixers, pin diode attenuators, surface acoustic wave (SAW) filters, and multielement discrete devices. The device is available in a compact R G GHz, Ultralow Distortion, Differential RF/IF Amplifier C D FUNCTIONAL BLOCK DIAGRAM R D ENB RGP RDP VIP VIN RDN RGN BIAS CELL + Figure 1. VCM VCC VOP VON 3 mm 3 mm, 16-lead LFCSP and operates over a temperature range of C to +8 C. HD3 () Figure. Third Harmonic Distortion (HD3) and IP3 vs. Frequency, Measured Differentially IP3 (dbm) Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 916, Norwood, MA 6-916, U.S.A. Tel: Analog Devices, Inc. All rights reserved. Technical Support

2 TABLE OF CONTENTS Features... 1 Applications... 1 Functional Block Diagram... 1 General Description... 1 Revision History... Specifications... 3 Noise Distortion Specifications... Absolute Maximum Ratings... 6 ESD Caution... 6 Pin Configuration and Function Descriptions... 7 Typical Performance Characteristics... 8 Applications Information Gain and Distortion Adjustment (Differential Input) Single-Ended Input Operation... 1 Narrow-Band, Third-Order Intermodulation Cancellation. 13 High Performance ADC Driving... 1 Layout and Transmission Line Effects... 1 Evaluation Board Evaluation Board Loading Schemes Soldering Information Evaluation Board Schematics Outline Dimensions Ordering Guide REVISION HISTORY /18 Rev. B to Rev. C Changes to Figure 3 and Table... 7 Updated Outline Dimensions Changes to Ordering Guide /8 Rev. A to Rev. B Changes to Features Section... 1 Changes to Figure Changes to Table Added Soldering Information Section Changes to Figure Changes to Ordering Guide /6 Rev. to Rev. A Changes to Absolute Maximum Ratings... 6 Inserted Figure 1, Figure 11, and Figure Inserted Figure 17, Figure 18, and Figure Changes to Figure Changes to Table Changes to Figure Changes to Ordering Guide /6 Revision : Initial Version Rev. C Page of 19

3 SPECIFICATIONS VS = V, R L = Ω differential, RG = 118 Ω (AV = 1 db), f = 1 MHz, T = C; parameters specified differentially (in/out), unless otherwise noted. CD and RD are selected for differential broadband operation (see Table and Table 6). Table 1. Parameter Conditions Min Typ Max Unit DYNAMIC PERFORMANCE 3 db Bandwidth AV = 6 db, VOUT 1. V p-p MHz AV = 1 db, VOUT 1. V p-p MHz AV = 1 db, VOUT 1. V p-p 18 MHz Bandwidth for.1 db Flatness 3 db AV db, VOUT 1. V p-p 19 MHz Bandwidth for. db Flatness 3 db AV db, VOUT 1. V p-p 3 MHz Gain Accuracy Using 1% resistor for RG, db AV db ±1 db Gain Supply Sensitivity VS ± %.6 db/v Gain Temperature Sensitivity C to +8 C mdb/ C Slew Rate RL = 1 kω, VOUT = V step 9 V/ns RL = Ω, VOUT = V step 8 V/ns Settling Time V step to 1% < ns Overdrive Recovery Time VIN = V to V step, VOUT ±1 mv <3 ns Reverse Isolation (S1) 8 db INPUT/OUTPUT CHARACTERISTICS Common-Mode Nominal VCC/ V Voltage Adjustment Range 1. to 3.8 V Maximum Output Voltage Swing 1 db compressed 6 V p-p Output Common-Mode Offset Referenced to VCC/ 1 + mv Output Common-Mode Drift C to +8 C. mv/ C Output Differential Offset Voltage + mv Common-Mode Rejection Ratio (CMRR) 7 db Output Differential Offset Drift C to +8 C.1 mv/ C Input Bias Current ± µa Input Resistance 3 kω Input Capacitance (Single Ended).9 pf Output Resistance 1 Ω Output Capacitance 3 pf POWER INTERFACE Supply Voltage 3. V ENB Threshold 1. V ENB Input Bias Current ENB at 3 V 7 na ENB at.6 V 1 µa Quiescent Current ENB at 3 V ma ENB at.6 V.3 ma Rev. C Page 3 of 19

4 NOISE DISTORTION SPECIFICATIONS VS = V, R L = Ω differential, RG = 118 Ω (AV = 1 db),, T = C; parameters specified differentially, unless otherwise noted. CD and RD are selected for differential broadband operation (see Table and Table 6). See the Applications Information section for single-ended-to-differential performance characteristics. Table. Parameter Conditions Min Typ Max Unit 1 MHz Second/Third Harmonic Distortion 1 RL = 1 kω, VOUT = V p-p 88/ 9 RL = Ω, VOUT = V p-p 86/ 8 Output Third-Order Intercept RL = Ω, f1 = 9. MHz, f = 1. MHz 38 dbm Third-Order IMD RL = 1 kω, f1 = 9. MHz, f = 1. MHz, 86 RL = Ω, f1 = 9. MHz, f = 1. MHz, 81 Noise Spectral Density (RTI).7 nv/ Hz 1 db Compression Point (RTO) 1.7 dbm 7 MHz Second/Third Harmonic Distortion RL = 1 kω, RG = 178 Ω, VOUT = V p-p 83/ 8 RL = Ω, RG = 11 Ω, VOUT = V p-p 8/ 8 Output Third-Order Intercept RL = Ω, f1 = 69. MHz, f = 7. MHz dbm Third-Order IMD RL = 1 kω, f1 = 69. MHz, f = 7. MHz, 91 RL = Ω, f1 = 69. MHz, f = 7. MHz, 83 Noise Spectral Density (RTI).7 nv/ Hz 1 db Compression Point (RTO) 1.7 dbm 1 MHz Second/Third Harmonic Distortion RL = 1 kω, VOUT = V p-p 83/ 83 RL = Ω, VOUT = V p-p 8/ 8 Output Third-Order Intercept RL = Ω, f1 = 99. MHz, f = 1. MHz dbm Third-Order IMD RL = 1 kω, f1 = 99. MHz, f = 1. MHz, 91 RL = Ω, f1 = 99. MHz, f = 1. MHz, 8 Noise Spectral Density (RTI).7 nv/ Hz 1 db Compression Point (RTO) 1.6 dbm 1 MHz Second/Third Harmonic Distortion RL = 1 kω, VOUT = V p-p 83/ 8 RL = Ω, VOUT = V p-p 8/ 8 Output Third-Order Intercept RL = Ω, f1 = 139. MHz, f = 1. MHz 1 dbm Third-Order IMD RL = 1 kω, f1 = 139. MHz, f = 1. MHz, 89 RL = Ω, f1 = 139. MHz, f = 1. MHz, 8 Noise Spectral Density (RTI).7 nv/ Hz 1 db Compression Point (RTO) 1. dbm Rev. C Page of 19

5 Parameter Conditions Min Typ Max Unit 19 MHz Second/Third Harmonic Distortion RL = 1 kω, VOUT = V p-p 8/ 8 RL = Ω, VOUT = V p-p 81/ 87 Output Third-Order Intercept RL = Ω, f1 = 18. MHz, f = 19. MHz 39 dbm Third-Order IMD RL = 1 kω, f1 = 18. MHz, f = 19. MHz, 83 RL = Ω, f1 = 18. MHz, f = 19. MHz, 81 Noise Spectral Density (RTI).7 nv/ Hz 1 db Compression Point (RTO) 1. dbm MHz Second/Third Harmonic Distortion RL = 1 kω, VOUT = V p-p 8/ 76 RL = Ω, VOUT = V p-p 8/ 73 Output Third-Order Intercept RL = Ω, f1 = 39. MHz, f =. MHz 36 dbm Third-Order IMD RL = 1 kω, f1 = 39. MHz, f =. MHz, 8 RL = Ω, f1 = 39. MHz, f =. MHz, 77 Noise Spectral Density (RTI).7 nv/ Hz 1 db Compression Point (RTO) 1.3 dbm 38 MHz Second/Third Harmonic Distortion RL = 1 kω, VOUT = V p-p 7/ 68 RL = Ω, VOUT = V p-p 7/ 69 Output Third-Order Intercept RL = Ω, f1 = 379. MHz, f = 38. MHz 33 dbm Third-Order IMD RL = 1 kω, f1 = 379. MHz, f = 38. MHz, 7 RL = Ω, f1 = 379. MHz, f = 38. MHz, 7 Noise Spectral Density (RTI).7 nv/ Hz 1 db Compression Point (RTO) 1.6 dbm MHz Second/Third Harmonic Distortion RL = Ω, VOUT = V p-p 71/ 6 Output Third-Order Intercept RL = Ω, f1 = 99. MHz, f =. MHz 8 dbm Third-Order IMD RL = Ω, f1 = 99. MHz, f =. MHz, 61 Noise Spectral Density (RTI).7 nv/ Hz 1 db Compression Point (RTO) 13.9 dbm 1 When using the evaluation board at frequencies below MHz, replace the Output Balun T1 with a transformer, such as Mini-Circuits ADT1-1WT to obtain the low frequency balance required for differential HD cancellation. CD and RD can be optimized for broadband operation below 18 MHz. For operation above 3 MHz, CD and RD components are not required. Rev. C Page of 19

6 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating Supply Voltage, VCC. V VIP, VIN VCC +. V Internal Power Dissipation 1 mw θja 91. C/W Maximum Junction Temperature 1 C Operating Temperature Range C to +8 C Storage Temperature Range 6 C to +1 C Lead Temperature (Soldering 6 sec) 3 C Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. ESD CAUTION Rev. C Page 6 of 19

7 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS VIP ENB VCM VCC RDP RGP RGN RDN TOP VIEW (Not to Scale) 1 9 VOP VON VIN VCC NOTES 1. THE EXPOSED PAD MUST BE CONNECTED TO GROUND VIA A LOW IMPEDANCE PATH, BOTH THERMALLY AND ELECTRICALLY. Figure 3. Pin Configuration 78-3 Table. Pin Function Descriptions Pin No. Mnemonic Description 1 RDP Positive Distortion Adjust. RGP Positive Gain Adjust. 3 RGN Negative Gain Adjust. RDN Negative Distortion Adjust. VIN Balanced Differential Input. This pin is biased to VCM, typically ac-coupled. 6, 7, 9, 1 Ground. Connect this pin to low impedance. 8, 13 VCC Positive Supply. 1 VON Balanced Differential Output. This pin is biased to VCM, typically ac-coupled. 11 VOP Balanced Differential Output. This pin is biased to VCM, typically ac-coupled. 1 VCM Common-Mode Voltage. A voltage applied to this pin sets the common-mode voltage of the input and output. Typically decoupled to ground with a.1 µf capacitor. With no reference applied, input and output common mode floats to midsupply (VCC/). 1 ENB Enable. Apply positive voltage (1.3 V < ENB < VCC) to activate device. 16 VIP Balanced Differential Input. This pin is biased to VCM, typically ac-coupled. EPAD Exposed Pad. The exposed pad must be connected to ground via a low impedance path, both thermally and electrically. Rev. C Page 7 of 19

8 TYPICAL PERFORMANCE CHARACTERISTICS 3 R G = 3Ω R G = Ω 1 1 R G = 1Ω R G = Ω 1 1 R G = 1Ω R G = 18Ω R G = 383Ω R G = 71Ω 1 1 1k 1k Figure. Gain vs. Frequency for a Ω Differential Load with Baluns, AV = 18 db, 1 db, and 6 db k 1k Figure 7. Gain vs. Frequency for a 1 kω Differential Load Without Baluns, RD/CD Open, AV = db, 1 db, 1 db, 6 db, and 3 db R G = 6Ω R G = 19Ω R G = 3kΩ C +8 C + C +8 C R L = Ω R G = 118Ω T C =.db/ C C + C R L = 1kΩ R G = 18Ω T C =.db/ C k 1k Figure. Gain vs. Frequency for a 1 kω Differential Load with Baluns, AV = 18 db, 1 db, and 6 db k 1k Figure 8. Gain vs. Frequency over Temperature ( C, + C, +8 C) Without Baluns, AV = 1 db, RL = Ω and 1 kω 78-8 R G = 19Ω 7 R L = Ω 1 R G = 6Ω 6 1 R G = 118Ω R G = 3Ω CMRR (db) R L = 1kΩ R G = 39Ω k 1k Figure 6. Gain vs. Frequency for a Ω Differential Load Without Baluns, RD/CD Open, AV = db, 1 db, 1 db, 6 db, and 3 db Figure 9. CMRR vs. Frequency, RL = Ω and 1 kω, Differential Source Resistance 78-3 Rev. C Page 8 of 19

9 . 16. NOISE FIGURE (db), OIP3 (dbm) OIP3 A V = 6dB A V = 1dB A V = 1dB NOISE FIGURE. A. V = 1dB A V = 1dB SPECTRAL NOISE DENSITY RTI (nv/ Hz) 78-9 OUTPUT P1dB (dbm) MHz 38MHz MHz 1MHz 1MHz 19MHz MHz GAIN SETTING RESISTOR (Ω) 78-1 Figure 1. Noise Figure, OIP3, and Spectral Noise Density vs. Frequency, V p-p Composite, RL = Ω Figure 13. Output 1 db Compression Point (P1dB) vs. RG for Multiple Frequencies, RL = Ω 7MHz 1MHz 1MHz 6 6 OIP3 (dbm) 3 3 MHz 38MHz MHz 19MHz HARMONIC DISTORTION () HD3 HD GAIN SETTING RESISTOR (Ω) Figure 11. Output IP3 (OIP3) vs. RG for Multiple Frequencies, RL = Ω Figure 1. Harmonic Distortion vs. Frequency for V p-p into RL = 1 kω, AV = 1 db, V Supply, RG = 18 Ω, RD = 6.8 kω, CD =.1 pf 6 > 3MHz NO C D OR R D USED 6 6 HARMONIC DISTORTION () HD3 V p-p HD3 1V p-p HD V p-p HARMONIC DISTORTION () HD3 HD Figure 1. Third-Order Harmonic Distortion (HD3) vs. Frequency, AV = 1 db, RL = Ω Figure 1. Harmonic Distortion vs. Frequency for V p-p into RL = Ω, AV = 1 db, RG = 11 Ω, RD =.3 kω, CD =. pf 78-7 Rev. C Page 9 of 19

10 .6 1. t RISE (1/9) = 1ps t FALL (1/9) = 1ps. 1. GROUP DELAY (ns) PHASE (Degrees) VOLTAGE (V) Figure 16. Group Delay and Phase vs. Frequency, AV = 1 db, RL = Ω TIME (nsec) Figure 19. Large Signal Output Transient Response, RL = Ω, AV = 1 db INPUT RESISTANCE (Ω) INPUT CAPACITANCE (pf) SETTLING (%) TIME (nsec) 78-7 Figure 17. S11 Equivalent RC Parallel Network, RG = 11 Ω Figure. 1% Settling Time for a V p-p Step Response, AV = 1 db, RL = Ω OUTPUT RESISTANCE (Ω) OUTPUT CAPACITANCE (pf) SPECTRAL NOISE DENSITY RTI (nv/ Hz) NOISE FIGURE (db) GAIN SETTING RESISTOR (Ω) 78- Figure 18. S Equivalent RC Parallel Network, RG = 11 Ω Figure 1. Spectral Noise Density RTI and Noise Figure vs. RG, RL = Ω Rev. C Page 1 of 19

11 APPLICATIONS INFORMATION GAIN AND DISTORTION ADJUSTMENT (DIFFERENTIAL INPUT) Table and Table 6 show the required value of RG for the gains specified at Ω and 1 kω loads. Figure and Figure plot gain vs. RG up to 18 db for both load conditions. For other output loads (RL), use Equation 1 to compute gain vs. RG. where A V Differential RL is the single-ended load. RG is the gain setting resistor. RG+ = RL RG R ( + ) ( L+ 3) + 3 The third-order harmonic distortion can be reduced by using external components RD and CD. Table and Table 6 show the required values for RD and CD for the specified gains to achieve (single tone) third-order distortion reduction at 18 MHz. Figure 3 and Figure show any gain (up to 18 db) vs. CD for Ω and 1 kω loads, respectively. When these values are selected, they result in minimum single tone, third-order distortion at 18 MHz. This frequency point provides the best overall broadband distortion for the specified frequencies below and above this value. For applications above ~3 MHz, CD and RD are not required. See the Specifications section and the third-order harmonic plots for more details (see Figure 1, Figure 1, and Figure 1). CD can be further optimized for narrow-band tuning requirements below 18 MHz that result in relatively lower third-order (inband) intermodulation distortion terms. See the Narrow-Band, Third-Order Intermodulation Cancellation section for more information. Though not shown, single tone, third-order optimization can also be improved for narrow-band frequency applications below 18 MHz with the proper selection of CD, and 3 db to 6 db of relative third-order improvement can be realized at frequencies below approximately 1 MHz. Using the information listed in Table and Table 6, an extrapolated value for RD can be determined for loads between Ω and 1 kω. For loads above 1 kω, use the 1 kω RD values listed in Table 6. Table. Broadband Selection of RG, CD, and RD, Ω Load AV (db) RG (Ω) CD (pf) RD (kω) 3 39 Open Open (1) Table 6. Broadband Selection of RG, CD, and RD, 1 kω Load AV (db) RG (Ω) CD (pf) RD (kω) 3 7 Open Open Open R G (Ω) Figure. Gain vs. RG, RL = Ω C D (pf) Figure 3. Gain vs. CD, RL = Ω Rev. C Page 11 of 19

12 R G (Ω) Figure. Gain vs. RG, RL = 1 kω 78-8 Figure 7 plots gain vs. RG for Ω and 1 kω loads. Table 7 and Table 8 show the values of CD and RD required (for 18 MHz broadband, third-order, single tone optimization) for Ω and 1 kω loads, respectively. This single-ended configuration provides 3 db bandwidths similar to input differential drive. Figure 8 through Figure 31 show distortion levels at a gain of 1 db for both Ω and 1 kω loads. Gains from 3 db to 18 db, using optimized CD and RD values, obtain similar distortion levels. Ω AC 6Ω Ω C D R D R N Ω R G VIP RGP RGN Figure 6. Single-Ended Schematic C D (pf) Figure. Gain vs. CD, RL = 1 kω SINGLE-ENDED INPUT OPERATION The can be configured as a single-ended-to-differential amplifier, as shown in Figure 6. To balance the outputs when driving the VIP input, an external resistor (RN) of Ω is added between VIP and RGN. See Equation to determine the singleended input gain (AV Single-Ended) for a given RG or RL. where R G+ R L A V Single Ended = + ( ) ( 3) 3 RL () R RL + 3 G RL RL is the single-ended load. RG is the gain setting resistor HD () 3 3 GAIN, R L = 1kΩ 1 GAIN, R L = Ω k 1k R G (Ω) Figure 7. Gain vs. RG 6 7 V p-p OUT 8 1V p-p OUT Figure 8. Single-Ended, Second-Order Harmonic Distortion (HD) vs. Frequency, Ω Load 78-1 Rev. C Page 1 of 19

13 This broadband optimization was also performed at 18 MHz. As with differential input drive, the resulting distortion levels at lower frequencies are based on the CD and RD specified in Table 7 and Table 8. As with differential input drive, relative third-order reduction improvement at frequencies below 1 MHz is realized with proper selection of CD and RD. 6 7 Table 7. Distortion Cancellation Selection Components (RD and CD) for Required Gain, Ω Load AV (db) RG (Ω) CD (pf) RD (kω) 3.3 k Open.3 6 Open HD3 () HD () V p-p OUT 1V p-p OUT Figure 9. Single-Ended, Third-Order Harmonic Distortion (HD3) vs. Frequency, Ω Load V p-p OUT 1V p-p OUT Figure 3. Single-Ended, Second-Order Harmonic Distortion (HD) vs. Frequency, 1 kω Load HD3 () V p-p OUT 1V p-p OUT Table 8. Distortion Cancellation Selection Components (RD and CD) for Required Gain, 1 kω Load AV (db) RG (Ω) CD (pf) RD (kω) 6 3 k Open Open NARROW-BAND, THIRD-ORDER INTERMODULATION CANCELLATION Broadband single tone, third-order harmonic optimization does not necessarily result in optimum (minimum) two tone, thirdorder intermodulation levels. The specified values for CD and RD in Table and Table 6 were determined for minimizing broadband, single tone third-order levels. Due to phase-related distortion coefficients, optimizing single tone third-order distortion does not result in optimum in-band (f1 f and f f1), third-order distortion levels. By proper selection of CD (using a fixed.3 kω RD), IP3s of better than dbm are achieved. This results in degraded out-of-band, third-order frequencies (f + f1, f1 + f, 3f1 and 3f). Thus, careful frequency planning is required to determine the trade-offs. Figure 3 shows narrow-band ( MHz spacing) OIP3 levels optimized at 3 MHz, 7 MHz, 1 MHz, and 18 MHz using the CD values specified in Figure 33. These four data points (the CD value and associated OIP3 levels) are extrapolated to provide close estimates of OIP3 levels for any specific frequency between 3 MHz and 18 MHz. For frequencies below ~1 MHz, narrowband tuning of OIP3 results in relatively higher OIP3s (vs. the broadband results shown in Table of the specifications). Though not shown, frequencies below 3 MHz also result in improved OIP3s when using proper values for CD Figure 31. Single-Ended, Third-Order Harmonic Distortion (HD3) vs. Frequency, 1 kω Load 78- Rev. C Page 13 of 19

14 OIP3 (dbm) C D (pf) A V = 6dB 1dB 1dB 18dB R L = Ω R D =.3kΩ C D =.3pF Figure 3. Third-Order Intermodulation Distortion, OIP3 vs. Frequency for Various Gain Settings A V = 6dB 1dB 1dB 18dB R L = Ω R D =.3kΩ Figure 33. Narrow-Band CD vs. Frequency for Various Gain Settings HIGH PERFORMANCE ADC DRIVING The provides the gain, isolation, and balanced low distortion output levels for efficiently driving wideband ADCs such as the AD9. Figure 3 and Figure 3 (single and differential input drive) illustrate the typical front-end circuit interface for the differentially driving the AD9 1-bit ADC at 1 MSPS. The, when used in the single-ended configuration, shows little or no degradation in overall third-order harmonic performance (vs. differential drive). See the Single-Ended Input Operation section. The 1 MHz FFT plots shown in Figure 36 and Figure 37 display the results for the differential configuration. Though not shown, the single-ended, third-order levels are similar. The Ω resistor shown in Figure 3 provides a Ω differential input impedance to the source for matching considerations. When the driver is less than one eighth of the wavelength from the, impedance matching is not required thereby negating the need for this termination resistor. The output Ω resistors provide isolation from the analog-to-digital input Refer to the Layout and Transmission Line Effects section for more information. The circuit in Figure 3 represents a singleended input to differential output configuration for driving the AD9. In this case, the input Ω resistor with RN (typically Ω) provide the input impedance match for a Ω system. Again, if input reflections are minimal, this impedance match is not required. A fixed Ω resistor (RN) is required to balance the output voltages that are required for second-order distortion cancellation. RG is the gain setting resistor for the with the RD and CD components providing distortion cancellation. The AD9 presents approximately kω in parallel with pf/differential load to the and requires a. V p-p differential signal (VREF = 1 V) between VIN+ and VIN for a full-scale output operation. These simplified circuits provide the gain, isolation, and distortion performance necessary for efficiently driving high linearity converters, such as the AD9. This device also provides balanced outputs whether driven differentially or singleended, thereby maintaining excellent second-order distortion levels. However, at frequencies above ~1 MHz, due to phaserelated errors, single-ended, second-order distortion is relatively higher. The output of the amplifier is ac-coupled to allow for an optimum common-mode setting at the ADC input. Input ac coupling can be required if the source also requires a commonmode voltage that is outside the optimum range of the. A VCM common-mode pin is provided on the that equally shifts both input and output common-mode levels. Increasing the gain of the increases the system noise and, thus, decreases the SNR (3. db at 1 MHz input for Av = 1 db) of the AD9 when no filtering is used. Note that amplifier gains from 3 db to 18 db, with proper selection of CD and RD, do not appreciably affect distortion levels. These circuits, when configured properly, can result in SFDR performance of better than 87 at 7 MHz and 8 at 18 MHz input. Single-ended drive, with appropriate CD and RD, give similar results for SFDR and thirdorder intermodulation levels shown in these figures. Placing antialiasing filters between the ADC and the amplifier is a common approach for improving overall noise and broadband distortion performance for both band-pass and low-pass applications. For high frequency filtering, matching to the filter is required. The maintains a 1 Ω output impedance well beyond most applications and is well-suited to drive most filter configurations with little or no degradation in distortion. Rev. C Page 1 of 19

15 IF/RF INPUT ADT1-1WT Ω AC Ω Ω Ω 16 C D 3 R D R G Ω 1 V CC 8, Ω Ω Figure 3. Differential Input to the Driving the AD9 Ω C D R D R N Ω R G VIN VIP VOP 33Ω VON 33Ω AD9 VIN+ AD9 VIN Figure 3. Single-Ended Input to the Driving the AD9 SNR = SFDR = NOISE FLOOR = 11.dB FUND = 1.7dBFS 3 SECOND = 83.1 THIRD = Figure 36. Single Tone Distortion Driving AD9, Encode Clock at 1 MHz with fc at 1 MHz (AV = 1 db), See Figure 3 AMPLITUDE (dbfs) AMPLITUDE (dbfs) SNR = NOISE FLOOR = 111.dB FUND1 = 7.7dBFS FUND = 7.3dBFS 3 IMD (F-F1) = 89 IMD (F1-F) = Figure 37. Two Tone Distortion Driving AD9, Encode Clock at 1 MHz with fc at 1 MHz (AV = 1 db), Analog In = 98 MHz and 11 MHz, See Figure 3 LAYOUT AND TRANSMISSION LINE EFFECTS High Q inductive drives and loads, as well as stray transmission line capacitance in combination with package parasitics, can potentially form a resonant circuit at high frequencies resulting in excessive gain peaking or possible oscillation. If RF transmission lines connecting the input or output are used, they should be designed such that stray capacitance at the input/output pins is minimized. In many board designs, the signal trace widths should be minimal where the driver/ receiver is more than one-eighth of the wavelength from the. This nontransmission line configuration requires that underlying and adjacent ground and low impedance planes be dropped from the signal lines. In a similar fashion, stray capacitance should be minimized near the RG, CD, and RD components and associated traces. This also requires not placing low impedance planes near these components. Refer to the evaluation board layout (Figure 39 and Figure ) for more information. Excessive stray capacitance at these nodes results in unwanted high frequency distortion. The.1 μf supply decoupling capacitors need to be close to the amplifier. This includes Signal Capacitor C through Signal Capacitor C. Parasitic suppressing resistors (R, R6, R7, and R11) can be used at the device input/output pins. Use Ω series resistors (Size ) to adequately de-q the input and output system from most parasitics without a significant decrease in gain. In general, if proper board layout techniques are used, the suppression resistors are not necessarily required. Output Parasitic Suppression Resistor R7 and Output Parasitic Suppression Resistor R11 can be required for driving some switch capacitor ADCs. These suppressors, with Input C of the converter (and possibly added External Shunt C), help provide charge kickback isolation and improve overall distortion at high encode rates Rev. C Page 1 of 19

16 EVALUATION BOARD An evaluation board is available for experimentation of various parameters such as gain, common-mode level, and distortion. The output network can be configured for different loads via minor output component changes. The schematic and evaluation board artwork are shown in Figure 38, Figure 39, and Figure. All discrete capacitors and resistors are Size, except for C1 (38-B). Table 9. Evaluation Board Circuit Components and Functions Component Name Function Additional Information C8, C9, C1 Capacitors C8, C9, and C1 are bypass capacitors. C8 = C9 = C1 =.1 µf RD, CD Distortion tuning components Distortion Adjustment Components. Allows for third-order distortion adjustment HD3. Typically, both are open above 3 MHz CD =. pf, RD =.3 kω CD is Panasonic High-Q (microwave) multilayer chip capacitor R1, R, R3, R, R, R6, T, C, C3 R7, R8, R9, R11, R1, R13, R1, T1, C, C Resistors, transformer, capacitors Resistors, transformer, capacitors Input Interface. R1 and R ground one side of the differential drive interface for single-ended applications. T is a 1-to-1 impedance ratio balun to transform a single-ended input into a balanced differential signal. R and R3 provide a differential Ω input termination. R and R6 can be increased to reduce gain peaking when driving from a high source impedance. The Ω termination provides an insertion loss of 6 db. C and C3 provide ac-coupling. Output Interface. R13 and R1 ground one side of the differential output interface for single-ended applications. T1 is a 1-to-1 impedance ratio balun to transform a balanced differential signal to a single-ended signal. R8, R9, and R1 are provided for generic placement of matching components. R7 and R11 allow additional output series resistance when driving capacitive loads. The evaluation board is configured to provide a Ω to Ω impedance transformation with an insertion loss of 11.6 db. C and C provide ac-coupling. R7 and R11 provide additional series resistance when driving capacitive loads. RG Resistor Gain Setting Resistor. Resistor RG is used to set the gain of the device. Refer to Table and Table 6 when selecting the gain resistor. SW1, R18, Switch, Enable Interface. R1 connects the enable pin, ENB, to the supply for constant R19, R resistors enable operation. The enable function can be toggled by removing R1 and using SW1 to switch between enable and disable modes. C1, C6, C7 Capacitors Power Supply Decoupling. The supply decoupling consists of a 1 µf capacitor (C1) to ground. C6 and C7 are bypass capacitors. T3, T, C11, C1 Transformer, capacitors Calibration Circuit. T3 and T are dummy baluns, which can be used to calibrate the insertion loss across the transformers in the signal chain. R1 = open, R = Ω, R3 = Ω, R = Ω, R = Ω, R6 = Ω, T = M/A-COM ETC1-1-13, C =.1 μf, C3 =.1 μf R7 = Ω, R8 = 86.6 Ω, R9 = 7.6 Ω, R11 = Ω, R1 = 86.6 Ω, R13 = Ω, R1 = open, T1 = M/A-COM ETC1-1-13, C =.1 µf, C =.1 µf RG = 11 Ω (Size ) for a gain of 1 db SW1 = installed R18 = R19 = R = Ω C1 = 1 µf, C6 =.1 µf, C7 =.1 µf T3 = T = M/A-COM ETC C11 = C1 =.1 µf EVALUATION BOARD LOADING SCHEMES The evaluation board is characterized with two load configurations representing the most common ADC input resistance. The loads chosen are Ω and 1 Ω using a broadband resistive match. The loading can be changed via R8, R9, and R1 giving the flexibility to characterize the evaluation board for the load in any given application. These loads are inherently lossy and must be accounted for in overall gain/loss for the entire evaluation board. Measure the gain of the with an oscilloscope using the following procedure to determine the actual gain: 1. Measure the peak-to-peak voltage at the input node (C or C3).. Measure the peak-to-peak voltage at the output node (C or C). 3. Compute gain using the following formula: Gain = log(vout/vin) Table 1. Values Used for Ω and 1 Ω Loads Component Ω Load (Ω) 1 Ω Load (Ω) R R R SOLDERING INFORMATION On the underside of the chip scale package, there is an exposed compressed paddle. This paddle is internally connected to the ground of the chip. Solder the paddle to the low impedance ground plane on the PCB to ensure the specified electrical performance and to provide thermal relief. To further reduce thermal impedance, it is recommended that the ground planes on all layers under the paddle be stitched together with vias. Rev. C Page 16 of 19

17 EVALUATION BOARD SCHEMATICS VINP VINN VPOS R19 Ω ENBL YELLOW SWITCH_SPDT VCM VCM YELLOW C1 R1 OPEN R Ω T M/A_COM ETC R Ω R3 Ω C D.pF R18 Ω C C3 R D.3kΩ R Ω R6 Ω SW1 C8 ENB Z1 R Ω C9 VPOS BLACK ENB VCM VCC R G 11Ω RDP RGP RGN RDN 1 3 VIP VIN VPOS VOP VON R7 Ω R11 Ω C C R8 86.6Ω R1 86.6Ω R9 7.6Ω VCC Ω TRACES HIGH IMPEDANCE TRACES (OPEN PLANES UNDER TRACES) CALIBRATION CIRCUIT BYPASS CIRCUIT VPOS J1 J 1 T3 C11 3 C1 1 T 3 RED + C1 C6 C7 1µF VPOS LOCATE CAPS NEAR DUT 1 3 T1 R1 OPEN M/A_COM ETC R13 Ω Ω TRACES VOUTP VOUTN Figure 38. Evaluation Board, Version A11A Rev. C Page 17 of 19

18 Figure 39. Component Side Silkscreen Figure. Far Side Showing Ground Plane Pull Back Around Critical Features Rev. C Page 18 of 19

19 OUTLINE DIMENSIONS PIN 1 INDICATOR SQ.9. BSC DETAIL A (JEDEC 9) PIN 1 INDICATOR AREA OPTIONS (SEE DETAIL A) EXPOSED PAD SQ 1. 9 PKG SEATING PLANE TOP VIEW SIDE VIEW...3. MAX. NOM COPLANARITY.8. REF 8 BOTTOM VIEW COMPLIANT TOJEDEC STANDARDS MO--WEED-6. Figure Lead Lead Frame Chip Scale Package [LFCSP] 3 mm 3 mm Body and.7 mm Package Height (CP-16-) Dimensions shown in millimeters. MIN FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET E ORDERING GUIDE Model 1 Temperature Range Package Description Ordering Quantity Package Option Marking Code ACPZ-WP C to +8 C 16-Lead LFCSP, Waffle Pack CP-16- QR ACPZ-R7 C to +8 C 16-Lead LFCSP, 7 Tape and Reel 3, CP-16- QR ACPZ-R C to +8 C 16-LeadLFCSP, 7 Tape and Reel CP-16- QR -EVALZ Evaluation Board 1 Z = RoHS Compliant Part Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D78--/18(C) Rev. C Page 19 of 19