FUNCTION ANALYSIS REPORT

Transcription

1 FUNCTION ANALYSIS REPORT Part No. XXXXXXXXXXXXXXXXXXXXX FUNCTION ANALYSIS REPORT

2 Important notice regarding the use of this report: This report is prepared for the exclusive use and benefit of the purchasing organization. Reproduction, distribution or communication of the entire or the portions of this report to any third party are strictly prohibited. does not accept any liability if this report is used for an inducement to infringe on the patents and/or the copyright that covered in this report. Accreditation to should be attached to any portion of this report for the support of the purchasing organization's further activities. C Inc all rights reserved. and logo are registered trademarks of Inc. Published: XXX XX, 2014

3 Part No. Date XXXXXXXX 2014-XX-XX Table of Contents >> Device Summary >> Device Identification >> Process >> Function Analysis >> Memory Information

4 Contents 1.0 Device Summary Device Identification Package Photo Die Markings Die Photo Top View Detail View Process Cross-sectional View Minimum Pitch Metal Minimum Gate Length Transistor Function Analysis Die Architecture Function Blocks Measurements Memory Information Memory Blocks Identification EEPROM EEPROM Region EEPROM Array EEPROM Unit FLASH FLASH Region FLASH Array FLASH Unit SRAM SRAM1 Region SRAM1 Array SRAM1 Unit SRAM2 Region SRAM2 Array Memory Parameter

5 5 1.0 Device Summary Item Content Part Number / Project Number XXXXXXXX / Manufacturer Device Type Package Marking Package Type Die Marking XX XX; XXXXXXX; XXXXX; XX; XX Smart Card XXXXXX; XXXXX; XXX; XXXXX; Die Size mm mm = mm 2 Number of Metal Layers 6 Number of Poly Layers 2 Process Type CMOS Interconnect Level (Width/Pitch(um)) Process Generation Feature Measure to Determine Process Generation Transistor Gate Length 0.13 um Gate Length 0.13 um Table 1.0 Device Summary

6 6 2.0 Device Identification This section contains information regarding the packaging, die marking and die photo of (Manufacturer Part No.). Section 2.1 contains the package photo. Section 2.2 provides die photo. 2.1 Package Photo This (Manufacturer Part No.) is a smart card. Photographs of the top and bottom view of the packages are shown in Photograph and Photograph is an x-ray photograph of the device presenting external pins. Photograph Package (top) Photograph Package (bottom)

7 7 x-ray photograph Photograph Package X-ray

8 8 2.2 Die Markings Photograph 2.2 Die Markings

9 9 2.3 Die Photo This (Manufacturer Part No.) is produced using a 6 metal, 2 poly 0.13 um CMOS process. The die measures mm 2 =1.927 mm mm and is presented in Photograph and The detail photo is shown in Photograph Top View Photograph Die Photo(Metal6 Image)

10 10 Photograph Die Photo(Poly Image)

11 Detail View Detail Photograph Photograph Detail Photo

12 Process This section includes the following process information about the die: Cross-sectional View Minimum Pitch Metal Minimum Gate Length Transistor 3.1 Cross-sectional View Cross-sectional View Photograph 3.1 Cross-sectional Photo

13 Minimum Pitch Metal Item Content Metal 1 Minimum Width Metal 1 Minimum Pitch Metal 2 Minimum Width Metal 2 Minimum Pitch Metal 3 Minimum Width Metal 3 Minimum Pitch Metal 4 Minimum Width Metal 4 Minimum Pitch Metal 5 Minimum Width Metal 5 Minimum Pitch Metal 6 Minimum Width Metal 6 Minimum Pitch X.XX um X.XX um X.XX um X.XX um X.XX um X.XX um X.XX um X.XX um X.XX um X.XX um X.XX um X.XX um Table 3.2 Minimum Pitch Metal

14 Minimum Gate Length Transistor Item Content Minimum Contacted Pitch Gate Length Transistor X.XX um 0.13 um Table 3.3 Minimum Gate Length Transistor

15 Function Analysis This section includes the following functional information about the die: Die Architecture Function Blocks Measurements 4.1 Die Architecture 1.927mm 0.894mm 0.027mm 0.833mm 0.214mm A PAD 0.438mm 0.438mm 0.369mm B SRAM1_ARRAY 0.437mm C SRAM2_ARRAY Capacity=5.479K*4=21.914K bit Capacity=7.477K*4=29.906K bit D ACCESS E 1.558mm 1.560mm FLASH_ARRAY Capacity=1904K bit 0.862mm 0.931mm I LOGIC 2.742mm 0.693mm 0.372mm 0.647mm 0.820mm H ANALOG 0.832mm F 1.132mm EEPROM_ARRAY Capacity=432K bit 1.061mm 0.214mm G PAD Photograph 4.1 Die Architecture(PL Image)

16 Function Blocks Measurements Item Content Proportion Block A Size mm mm = mm % Block B Size mm mm = mm % Block C Size mm mm = mm % Block D Size mm mm = mm % Block E Size mm mm = mm % Block F Size mm mm = mm % Block G Size mm mm = mm % Block H Size mm mm = mm % Block I Size mm mm mm mm= mm % Total effective area of the chip =1.927mm*2.742mm=5.284mm² Table 4.2 Function Blocks Measurements

17 Memory Information 5.1 Memory Blocks Identification 0.833mm 0.438mm 0.438mm 0.369mm SRAM mm SRAM mm FLASH 0.693mm EEPROM 1.132mm Photograph 5.1 Memory Blocks Identification

18 EEPROM EEPROM Region 0.693mm 1.132mm S=0.693mm*1.132mm=0.785mm² Photograph EEPROM Region

19 EEPROM Array 0.576mm um X um*64=0.640mm S=0.576mm*0.640mm=0.369mm² Photograph EEPROM Array

20 EEPROM Unit 1.961um 0.885um 2 EEPROM Unit S=(1.961um*0.885um)/2=0.868um² Photograph EEPROM Unit

21 FLASH FLASH Region 0.833mm 1.560mm S=0.833mm*1.560mm=1.300mm² Photograph FLASH Region

22 FLASH Array 0.055mm* mm*6=0.770mm 0.055um 0.110um 0.012um X direction=2 Y direction= um X direction=6 Y direction= um X direction=2 Y direction= um* um*32=1.088mm 0.016um X direction=6 Y direction=32 S=0.770mm*1.088mm=0.838mm² Photograph FLASH Array

23 FLASH Unit 1.681um 0.525um S=(1.681um*0.525um)/2=0.441um² Photograph FLASH Unit

24 SRAM SRAM1 Region mm SRAM1 Array mm S=0.438mm*0.369mm=0.162mm² Photograph SRAM1 Region

25 SRAM1 Array 0.179mm 0.113mm 2X2 SRAM Unit S=0.179mm*0.113mm=0.020mm² Photograph SRAM1 Array

26 SRAM1 Unit 5.511um 2.682um 4 SRAM1 Unit S=(5.511um*2.682um)/4=3.695um² Photograph SRAM1 Unit

27 SRAM2 Region 0.438mm SRAM2 Array 0.437mm S=0.438mm*0.437mm=0.191mm² Photograph SRAM2 Region

28 SRAM2 Array 0.179mm 0.156mm 2X2 SRAM Unit S=0.179mm*0.156mm=0.028mm² Photograph SRAM2 Array

29 Memory Parameter Item Content Memory Type EEPROM Memory Cells Number = Memory Capacity /1024=432K bit EEPROM Region EEPROM Area mm mm = mm 2 Proportion (Whole Die) % EEPROM Array EEPROM Array Area mm mm = mm 2 Proportion (EEPROM Region) % EEPROM Unit One Unit Area (1.961 um um)/2=0.868 um 2 Table EEPROM Table Item Content Memory Type FLASH Memory Cells Number = Memory Capacity /1024=1904K bit FLASH Region FLASH Area mm mm = mm 2 Proportion (Whole Die) % FLASH Array FLASH Array Area mm mm = mm 2 Proportion (FLASH Region) % FLASH Unit One Unit Area (1.681 um um)/2=0.441 um 2 Table FLASH Table

30 30 Item Content Memory Type SRAM1 Memory Cells Number (66 85) 4 = = Memory Capacity 22440/1024=21.914K bit SRAM1 Region SRAM1 Area mm mm = mm 2 Proportion (Whole Die) 3.066% SRAM1 Array SRAM1 Array Area mm mm = mm 2 Proportion (SRAM1 Region) % SRAM1 Unit One Unit Area (5.511 um um)/4=3.695 um 2 Table SRAM1 Table Item Content Memory Type SRAM2 Memory Cells Number (66 116) 4 = = Memory Capacity 30624/1024=29.906K bit SRAM2 Region SRAM2 Area mm mm = mm 2 Proportion (Whole Die) 3.615% SRAM2 Array SRAM2 Array Area mm mm = mm 2 Proportion (SRAM2 Region) % SRAM2 Unit One Unit Area (5.511 um um)/4=3.695 um 2 Table SRAM2 Table

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