Computer Architecture Lab Session

Transcription

1 Computer Architecture Lab Session The 4 th week / Sep 24 th, 2015 Su-Jin Oh sujinohkor@gmail.com 1

2 Index Review Little Bit Different Kinds of Instructions Shift Instructions Some Ways for Console I/O Task 2

3 What did we learn at the last time? :D REVIEW 3

4 Brief Introduction of R-type Instructions Instruction Format op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits opcode: the operation code Every R-type operation s opcode is zero. rs, rt: the source registers rd: the destination register shamt: the amount to shift Among every R-type instruction, only shift operations use this filed. function: the specific function 4

5 R-type Instructions; ADD and SUB ADD add $s0, $s1, $s2 # $s0 <- $s1 + $s ($s1) 18 ($s2) 16 ($s0) 0 32 op rs rt rd shamt funct SUB sub $t0, $t3, $t5 # $t0 <- $t3 - $t ($t0) 13 ($t3) 8 ($t5) 0 34 op rs rt rd shamt funct 5

6 R-type Instructions; Logical Operations 1 AND and $s3, $s1, $s2 # $s3 <- $s1 AND $s2 A B OUTPUT Source Registers $s $s Destination Register $s OR or $s4, $s1, $s2 # $s4 <- $s1 OR $s2 A B OUTPUT Source Registers $s $s Destination Register $s

7 R-type Instructions; Logical Operations 2 XOR xor $s5, $s1, $s2 # $s5 <- $s1 XOR $s2 A B OUTPUT Source Registers $s $s Destination Register $s NOR nor $s6, $s1, $s2 # $s6 <- $s1 NOR $s2 A B OUTPUT Source Registers $s $s Destination Register $s

8 Brief Introduction of I-type Instructions Instruction Format op rs rt imm 6 bits 5 bits 5 bits 16 bits opcode: the operation code rs: the source register rt: the second operand or the destination register imm: the immediate value 8

9 I-type Instructions; ADDI ADDI addi $s1, $s0, 5 # $s1 <- $s ($s0) 17 ($s1) 5 op rs rt imm SUBI does not exist. 9

10 I-type Instructions; Logical Operations ANDI andi $s2, $s1, 0xFA34 # $s2 <- $s1 AND 0xFA34 ORI ori $s3, $s1, 0xFA34 # $s3 <- $s1 OR 0xFA34 XORI xori $s4, $s1, 0xFA34 # $s4 <- $s1 XOR 0xFA34 Source Registers $s imm Destination Register $s

11 Number System Conversion Binary Decimal 11 = (1 2 3 ) + (0 2 2 ) + (1 2 1 ) + (1 2 0 ) Hexadecimal B HEXADECIMAL DEC HEX DEC HEX DEC HEX DEC HEX C D A 14 E B 15 F 11

12 ADDU, ADDIU, SUBU, and NOR LITTLE BIT DIFFERENT KINDS OF INSTRUCTIONS 12

13 MSB and LSB MSB (: Most Significant Bit) and LSB (: Least Significant Bit) MSB LSB Simply, the rightmost digit is highly crucial, while the leftmost digit is just insignificant. e.g. If a person lent 15K (15: binary 1111) to someone. In this case, if MSB is broken then the number will be just 7K (0111). Whereas if LSB is broken then the number will be 14K (1110). 13

14 Signed and Unsigned Numbers A binary number may be signed or unsigned. Commonly, signed numbers are indicated through two s complement representation How can we describe negative numbers? The number 1 and the one s complement. 1 0x One s 0xFFFF FFFE The two s complement, further it is same with the number -1. Two s 0xFFFF FFFF I recommend below websites! 의 _ 보수법으로 _ 음수 _ 표현하기 14

15 ADDU and ADDIU 1/2 ADDU (U: Unchecked) addu $s3, $s1, $s2 # $s3 <- $s1 + $s2 It does not have a possibility of overflow (just ignore). What is the difference with ADD add $s4, $s1, $s2 # $s4 <- $s1 + $s2 It has a possibility of overflow. ADDIU (I-type instruction) addiu $s5, $s1, 5 # $s5 <- $s1 + 5 It uses a 16-bit immediate value (constant) as a source. It does not have a possibility of overflow (just ignore). In hexadecimal number system, one digit is 4-bit, two digits are 8-bit (1-byte). 15

16 ADDU and ADDIU 2/ The leftmost binary digit indicates the sign of the number. 16

17 SUBU 1/2 SUBU (U: Unchecked) subu $s3, $s1, $s2 # $s3 <- $s1 - $s2 It does not have a possibility of overflow (just ignore). What is the difference with SUB sub $s4, $s1, $s2 # $s4 <- $s1 - $s2 It has a possibility of overflow. 17

18 SUBU 2/ The leftmost binary digit indicates the sign of the number. 18

19 Logical NOT 1/2 MIPS does not provide NOT instruction. A NOR $0 = NOT A nor $s2, $s1, $0 # $s2 <- $s1 nor $0 $0 == R0: The constant value 0. NOR: Only both sources are 0, then the result will be 1. 19

20 Logical NOT 2/2 Source Registers $s1 0x $0 0x Destination Register $s2 0xFFFF EDCB NOT $s1 $s1 0x NOT 0xFFFF EDCB xFFFF EDCB HEX 0xFFFF EDCB F F F F E D C B 20

21 These Shift Instructions are R-type Instructions SHIFT INSTRUCTIONS 21

22 SLL, SRL, and SRA 1/3 SLL (: Shift Left Logical) sll $s1, $s0, 4 # $s1 == $s $s1 <- $s0 << 4 Left shifts always fill the least significant bits with 0 s. Shifting a value left by N is equivalent to multiplying it by 2 N. SRL (: Shift Right Logical) srl $s2, $s0, 4 # $s2 <- $s0 >>> 4 In case of SRL, 0 s shift into the most significant bits. SRA (: Shift Right Arithmetic) sra $s3, $s0, 4 # $s3 == $s $s3 <- $s0 >> 4 In case of SRA, the sign bit shifts into the most significant bits. Arithmetically shifting a value right by N is equivalent to dividing it by 2 N. 22

23 SLL, SRL, and SRA 2/3 23

24 SLL, SRL, and SRA 3/3 Assembly Code op rs rt rd shamt funct sll $s1, $s0, srl $s2, $s0, sra $s3, $s0, Source Values $s shamt Assembly Code Results: Destination Registers sll $s1, $s0, srl $s2, $s0, sra $s3, $s0,

25 SLLV, SRLV, and SRAV 1/3 SLLV (: Shift Left Logical Variable) sllv $s3, $s1, $s2 # $s3 == $s1 2 $s2 --- $s3 <- $s1 << $s2 Left shifts always fill the least significant bits with 0 s. Shifting a value left by N is equivalent to multiplying it by 2 N. SRLV (: Shift Right Logical Variable) srlv $s4, $s1, $s2 # $s4 <- $s1 >>> $s2 In case of SRLV, 0 s shift into the most significant bits. SRAV (: Shift Right Arithmetic Variable) srav $s5, $s1, $2 # $s5 == $s1 2 $s2 --- $s5 <- $s1 >> $s2 In case of SRAV, the sign bit shifts into the most significant bits. Arithmetically shifting a value right by N is equivalent to dividing it by 2 N. 25

26 SLLV, SRLV, and SRAV 2/3 26

27 SLLV, SRLV, and SRAV 3/3 Assembly Code op rs rt rd shamt funct sllv $s3, $s1, $s srlv $s4, $s1, $s srav $s5, $s1, $s Source Values $s $s Assembly Code Results: Destination Registers sllv $s3, $s1, $s srlv $s4, $s1, $s srav $s5, $s1, $s

28 You can input some values through your console! SOME WAYS FOR CONSOLE I/O 28

29 MIPS System Calls CA 02 week additional.pdf 29

30 Input an Integer 1/2 30

31 Input an Integer 2/2 31

32 Input a String 1/2 32

33 Input a String 2/2 33

34 A simple task.. TASK 34

35 Task NOTE: You should make an archive file which has both your source file and your screen capture image. You should submit this archive file on Smart Campus. Please, write your name and student ID number on your file names!!! e.g 오수진.zip / 오수진.asm / 오수진.png Please, follow each question! 1. Input two integer values through console. Then save these figures into $s1 and $s2, respectively. The 2 nd number should be 10 or lower. 2. Calculate $s1 SLLV/SRLV/SRAV $s2. Then save these results into from $s3 to $s5. Take a screen capture which should show both your console and your QtSpim Register Table (especially, from $s1 to $s5 fields). 35

36 Thanks for attending :D THE END 36