S.P. Vingron Switching Theory

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1 S.P. Vingron Switching Theory

2 Springer-Verlag Berlin Heidelberg GmbH Engineering ONLINE LlBRARY

3 Shimon P. Vingron Switching Theory Insight through Predicate Logic With 323 Figures, Springer

4 Dr. Shimon P. Vingron formerly head of the Department of Theoretical Systems AnaIysis, Institute for Information Processing, Austrian Academy of Sciences, Vienna Barenkogelweg Hinterbriihl Austria ISBN Library of Congress Cataloging-in-Publication-Data Vingron, Shimon Peter, Switching theory : insight through predicate logic I Shimon Peter Vingron. p.cm. ISBN ISBN (ebook) DOI / Switching theory. 2. Predicate (Logic) 1. Title. TK7868.S9VS S'372--dc22 This work is subject to copyright. AU rights are reserved, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitations, broadcasting, reproduction on microfilm or in any other way, and storage in data banks. Duplicat ion of this publication or parts thereof is permitted only under the provisions of the German copyright Law of September 9, 1965, in its current version, and permission for use must always be obtained from Springer-Verlag Berlin Heidelberg GmbH. Violations are liable for prosecution under the German Copyright Law. Springer-Vedag Berlin Heidelberg 2004 Originally published by Springer-Verlag Berlin Heidelberg New York in 2004 Softcover reprint ofthe hardcover Ist edition 2004 The use of general descriptive names, registered names trademarks, etc. in this publication does not imply, even in the absence of a specific statement, that such names are exempt from the relevant protective laws and regulations and therefore free for general use. Typesetting: camera-ready by author Cover design: deblik Berlin Printed on acid free paper /M - S O

5 Preface About the subject. Switching Theory is an applied science used in analysing, designing, and testing switching circuits irrespective of the technology in which they are realised. Its origin goes back to Shannon's [1938J remarkable paper in which he introduced 'propositional logic' to describe switching circuits. This was the first time that propositionallogic was applied to an engineering problem. The method proved successful but was restricted to circuits that had no memorising ability, so-called combinational circuits. It was Huffman [1954J who, in his doctor's thesis, showed how to analyse and design circuits that had a memorising ability, so-called sequential circuits. At the heart of his breakthrough was a simple way of specifying a sequential circuit by a table he called a 'fiow table '. It enabled a sequential circuit to be reduced to a number of combinational circuits, each of which could then be handled by Shannon's methods. About this book. Just as propositionallogic was superseded in mathematics by predicate logic, developed by Frege [1879], this is also done here for Switching Theory. You will notice that with the use of predicate logic proofs and derivat ions become possible that hitherto remained out of reach. Huffman's flow table is used to develop a new tree representation of a sequential circuit, a so-called word-recognition tree, by which a sequential circuit is not reduced to a number of combinational circuits but, rather, calculated directly as interconnected latches (memory circuits). This approach required a new look at the theory of latches. But most importantly, the formidable problems connected with the so-called 'encoding of the internal state.'j' of an asynchronous sequential circuit are bypassed. Pointing out what's new. The many new concepts, proofs, and methods incorporated into this book are not explicitly listed. Those chapters marked by an asterisk (*) present new concepts. Those sections marked by an asterisk (*) at least contain new concepts, proofs, or methods. Whom the book is for. The book is written for the theoretically inclined practising engineer working in the field of digital circuit design, for the scientist concerned with developing methods and algorithms for designing digital ('in'nits, and for the student feeling the nccd to supplement a course in Switching Theory or Logic Design. While Division One is an undergraduatelevel introduction, the remaining parts constitute a sound basis for a graduate course in Switching Theory or Logic Design.

6 Expressing my gratitude. When I retired, my wife, Dora, told me she didn't want me hanging around the house not knowing what to do with myself. So I went into my study, and took up the research (interrupted more than a decade earlier) on what was to become this book. This project, that I had thought would take two to possibly three years, engulfed me for eight. During these years, my wife unfailingly encouraged me in the many difficult phases of the work. My gratitude is only surpassed by my love to her. Deep thanks are due to my friend Dr. Oliver König who worked through the whole manuscript and whose formidable and creative criticism I simultaneously feared and awaited. Many major improvements are his due. In many ways, this book is a tribute to my former teacher Prof. emeritus Dr. Karl Heinz Fasol. A elosing remark. I should consider it a compliment if this book were to stimulate comment, or argument, or contradiction. I should consider it a success if it were to help start a process of questioning established views in a subject which, although having lost some of its former vigour, has lost nothing of its importance.

7 It is not given to you to compleie the iask, bnt Y01l are not freed from starting. Rabbi Tarphon Ethics of the Fathers iij21

8 Contents Division One Fundamental Concepts 1 Outline and Basics Specifying a Circuit in Plain Prose Diagram of Successive Events Table of Asserted Events *1) Logic Variables and Logic Formulas * Drawing the Circuits Sequential Circuits * Verifying a Circuit * 12 2 Switching Devices Pneumatic Valves Electric Relays CMOS Transistor Circuits 23 3 Functions Ordered Pairs Spealdng of Functions Switching Functions 33 4 Logic Functions and Gates 4.1 Elementary Switching Functions 4.2 Positive versus Negative Logic * 4.3 Elementary Logic Functions * The Basic Gates * Derived Gates * 43 5 Synthesis and Duality Minterm Functions & Minterms * 5.2 Maxterm Functions & Maxterms * 5.3 Synthesis via Partial Outputs * 5.4 Duality * 53 6 Karnaugh Maps Speaking of Sets Introducing the Karnaugh Map * 6.3 Karnaugh Maps for multiple Inputs 6.4 Karnaugh Sets * ) Those Sections or Chapters marked by an asterisk (*) contain new concepts, proofs, or methods.

9 7 Utilising Karnaugh Maps Specifying Switching Circuits in K-maps * Obtaining Disjunctive Formulas Obtaining Conjunctive Formulas * Logically Equivalent Expressions * Logical Implications * K-maps of Dual Functions * 74 Division Two Logic 8 Tautologies Logic Expressions Truth Tables Speaking of Tautologies Replacement versus Substitution Logic Reasoning 86 9 Propositional Logic Axiomatic Approach to Propositional Logic Complementation IMPLICATION and NEGATION DeMorgan's Theorems Commutativity of AND and OR Logic Implications of IMPLICATIONS Formulas with a single Variable Summary of Theorems Commutative and Associative Laws * Single-Variable Formulas Distributive Laws * Generalised DeMorgan Theorems Basic Theorems on AND, OR and NOT Algebraic Proofs Min- and Maxterms are Complementary * Disjunction of all Minterms * Conjunction of two Mintermms * Maxterm as the Disjunction of Minterms * Minterm AND/OR Maxterm * Solving a System of Logic Equations * DeMorgan on DeMorgan On Predicate Logic Inside a Proposition Symbolic Notation of Propositions 122

10 12.3 The Switching Algebra Connection * Quantifiers Quantification and Replication * Free and Bound Variables Predicate Logic Axioms and Rules of Switching Algebra * Theorems on Identity Theorems on Quantification 135 Division Three Combinational Circuits 14 Canonical Normal Forms An Overview Direct Derivation of Normal Forms * Shannon's Expansion Theorems * Shannon's Expansion to Normal Forms Shegalkin Normal Form An Overview Developing the Shegalkin Polynomial * Shegalkin Coefficients On Combinations of Input Variables Dual Shegalkin Polynomial Necessary and Sufficient Connectives Synthesis Examples Multiplexers and Demultiplexers 16.2 Binary Coded Decimal Digits Priority Decoders Comparators 166 Concepts Old and New Multiple Events* Karnaugh Sets Revisited * 17.3 Generalised Minterms * 17.4 Generalised Maxterms * 17.5 Partitions and Equivalents 17.6 Prime Sets Covers Inclusions and Exclusions * Evaluation Formulas * Minimisation Preliminaries Aspects of Minimisation Incomplete Specification 183

11 18.3 Prime Sets that cover Don't Cares Evaluation Formulas for Don't Cares * Minimisation by K-maps Algebraic Minimisation Minimisation-an Excerp On Adjacent K-Sets and their Consensus * Formalising Adjacency and Consensus Finding the Full Cover * Finding Minimal Covers * Minimisation considering Don't Cares * Reduced Karnaugh Maps Reducing the Dimension of a K-map K-maps within K-maps * Evaluating Reduced K-maps * Specification by Map-Entered Variables * NOT-AND and NOT-OR Miscellaneous Theorems Two-Level Circuits Multilevel NOT-AND Circuits 21.4 Multilevel NOT-OR Circuits Composition of Circuits * 22.1 The Basic Concept Catenation Choosing a Generic Function Hinge Sets Composing a Circuit: Example Composing a Circuit: Example Composing a Circuit: Example Hazards Hazards on Stationary Signals Single-Input Hazards Gates and Delays Detecting Single-Input Hazards Hazard-Detecting Formulas Hazards in a NOT-AND Circuit Hazards in a Composed Circuit 251 Division Four Latches 24 Memorising by Feedback What is Memorisation? The Feedback Model of Memory 258

12 24.3 Transient versus Stationary Behaviour Latches without Feedback Is a Delay in the Feedback necessary? * Basic Theory of Latches Wh at is a Latch? * Specifying Latches in Reduced K-maps * Evaluation Formulas and Generic Latches * An Evaluation Example Identical and Isomorphie Latches * Inverting a Sampie Memory-Circuit General Negation of Latches * Optimised Latches Designing Minimised Latches * 26.2 A Minimised Latch-an Example 26.3 Designing Hazard-Free Latches * 26.4 A Hazard-Free Latch-an Example 27 Elementary Latches Classification of Elementary Latches Two Systems of Symbolic Latches * Symbols with Complementary Outputs * Symbolic Latches with a Common Event * Standard Symbols for Elementary Latches Composition of Latches * Catenation Diagram for Latches Composing the D-Latch using a SR-Latch Checking for a Hazard-Free Solution Avoiding Undesirable Input-Events 305 Division Five Sequential Circuits with Continuously Read Inputs 29 Automata and Programs * Continuously reading A utomata 29.2 Developing an Example Flow Table 29.3 The Word-Recognition Tree Evaluating a Sequential Circuit Word-Recognition Tables * 30.1 Developing Word-Recognition Tables 30.2 Primitive Determinateness General Determinateness

13 30.4 Evaluation and Partial Mappings 30.5 Testing for General Determinateness Catenation Model * The Moore and Mealy Models Catenation Model - Feedback and Delays Moore and Mealy Flow Tables Merging Moore and Mealy Flow Tables From Mealy to Moore Flow Tables The Composite Word-Recognition Table Toggle Circuits T-Flipflop - its Feedback Design T-Flipflop - its Composition JK-Flipflop - its Feedback Design JK-Flipflop - its Composition Triggering and Synchronising Triggering Sampling Synchronising Verifying a Logic Design * A Verification-DSE for the D-Latch A Verification-DSE for a given Example Grafting a Verification Tree Discussing Huffman's Theory Basics of Huffman's Synthesis Procedure * Delay and Feedback State Encoding and Circuit Realisation Problems with Arbitrary Binary Encodings Race Analysis in the Catenation Model * State Encoding Techniques Introducing Multiple State-Transitions Adding Unstable States Intuitively On the Number of Adjacent Encodings One-Hot Code Safe but Slow standardised Encodings Safe and Fast standardised Encodings Number of Required State Variables 410 Bibliography 411 Index 415

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