CMOS Analog Switches (Obsolete for non-hermetic. Use DG304B Series as pin-for-pin replacements.)

Transcription

1 DGA_MIL/A_MIL/A_MIL/A_MIL CMOS Analog Switches (Obsolete for non-hermetic. Use DGB Series as pin-for-pin replacements.) -V Input Range Fast Switching t ON : ns Low r DS(on) : Single Supply Operation CMOS Logic Levels Micropower: nw Rail-to-Rail Analog Signal Range Low Signal Error Wide Dynamic Range Low Power Dissipation Low Level Switching Circuits Programmable Gain Amplifiers Portable and Battery Powered Systems The DGA_MIL through DGA_MIL series of monolithic CMOS switches were designed for applications in communications, instrumentation and process control. This series is well suited for applications requiring fast switching and nearly flat on-resistance over the entire analog range. applications, without sacrificing switching speed. Break-before-make switching action is guaranteed, and an epitaxial layer prevents latchup. Single supply operation (for positive switch voltages) is allowed by connecting the rail to V. Designed on the PLUS- CMOS process to achieve low power consumption and excellent on/off switch performance, these switches are ideal for battery powered Each switch conducts equally well in both directions when on, and blocks up to the supply voltage when off. These switches are CMOS input compatible. DGA_MIL Dual-In-Line DGA_MIL Metal Can (Substrate and Case) D D S S IN D D IN Logic Switch OFF ON IN IN Logic. V Logic V Document Number: S- Rev. A, -Jul-

2 DGA_MIL/A_MIL/A_MIL/A_MIL DGA_MIL Dual-In-Line DGA_MIL Metal Can (Substrate and Case) D D S S D D Logic SW SW OFF ON IN IN ON OFF Logic. V Logic V DGA_MIL Dual-In-Line S S Logic Switch D D D D S OFF ON Logic. V Logic V IN IN DGA_MIL Dual-In-Line Four SPST Switches per Package S S Logic SW, SW SW, SW D D S D D OFF ON ON OFF Logic. V Logic V IN IN Document Number: S- Rev. A, -Jul-

3 DGA_MIL/A_MIL/A_MIL/A_MIL Temp Range Package Part Number DGA_MIL DGAK/ -Pin CerDIP JM/BCA to C -Pin Can JM/BIA -Pin Sidebraze JM/BCC DGA_MIL -Pin CerDIP JM/BCA to C -Pin Can JM/BIC -Pin Sidebraze JM/BCA DGA_MIL DGAAK/ -Pin CerDIP to C JM/BCA -Pin Sidebraze JM/BCC DGA_MIL DGAAK -Pin CerDIP DGAAK/ to C JM/BCA -Pin Sidebraze JM/BCC Voltages Referenced to V V Digital Inputs a, V S, V D () V to () +V or ma, whichever occurs first Current, Any Terminal ma Continuous Current, S or D (Pulsed at ms, % duty cycle max) ma Storage Temperature (AAA, AAK, Suffix) to C Power Dissipation b -Pin CerDIP c mw -Pin Metal Can d mw Notes: a. Signals on S X, D X, or IN X exceeding or will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads welded or soldered to PC Board. c. Derate. mw/ C above C d. Derate mw/ C above C Document Number: S- Rev. A, -Jul-

4 DGA_MIL/A_MIL/A_MIL/A_MIL Test Conditions Unless Specified Limits Parameter Analog Switch Symbol = V, = V V IN =. V or V f Tempb Min c Typ d Max c Unit Analog Signal Range e V ANALOG V Drain-Source On-Resistance r DS(on) V D = V, I S = ma Source Off Leakage Current I S(off) V S = V V D = V. Drain Off Leakage Current I D(off) V S = V V D = V. na Drain On Leakage Current I D(on) V D = V S = V. Digital Control Input Current with Input Voltage High I INH V IN = V V IN = V.. A Input Current with Input Voltage Low I INL V IN = V. Dynamic Characteristics Turn-On Time t ON Turn-Off Time t OFF See Figure Break-Before-Make Time t OPEN DGA_MIL/A ONLY See Figure Charge Injection Q C L = nf, R gen = V gen = V, See Figure ns pc Source-Off Capacitance C S(off) Drain-Off Capacitance C f = MHz, V S = V D(off) V S, V D = V Channel-On Capacitance C D(on) pf Input Capacitance C IN f = MHz V IN = V V IN = V Off-Isolation OIRR V IN = V, R L = k Crosstalk (Channel-to-Channel) X TALK V S = V rms, f = khz Power Supplies db Positive Supply Current I+ Negative Supply Current I V IN = V or V (All Inputs) Notes: a. Refer to PROCESS OPTION FLOWCHART. b. = C, = as determined by the operating temperature suffix. c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. e. Guaranteed by design, not subject to production test. f. V IN = input voltage to perform proper function... A Document Number: S- Rev. A, -Jul-

5 DGA_MIL/A_MIL/A_MIL/A_MIL rds(on) Drain-Source On-Resistance ( ) r DS(on) vs. V D and Power Supply T A = C V. V V V V rds(on) Drain-Source On-Resistance ( ) r DS(on) vs. V D and + Power Supply Voltage +. V + V + V + V T A = C = V V D Drain Voltage (V) V D Drain Voltage (V) Leakage Currents vs. Analog Voltage Input Switching Threshold vs. and Supply Voltages T A = C I D(off) or I S(off) (pa) I S, I D I D(on) V T (V) V D or V S Drain or Source Voltage (V), Positive & Negative Supplies (V) Switching Time vs. Positive Supply Voltage = V T A = C V INH = V V INL = V Switching Time vs. Negative Supply Voltage = V T A = C V INH = V V INL = V t ON, t OFF (ns) t ON t OFF t ON, t OFF (ns) t ON t OFF Positive Supply Voltage (V) Negative Supply Voltage (V) Document Number: S- Rev. A, -Jul-

6 DGA_MIL/A_MIL/A_MIL/A_MIL Supply Currents vs. Toggle Frequency = V R L = C L = V S = Open I+, I (ma) k k k M f Frequency (Hz) S V IN Level Shift/ Drive D FIGURE. + V Logic = Switch On V S = V V S IN D R L C L pf V O Logic Input V V S V INH % % V C L (includes fixture and stray capacitance) Switch Output V t ON % t OFF V O = V S R L R L + r DS(on) FIGURE. Switching Time Document Number: S- Rev. A, -Jul-

7 DGA_MIL/A_MIL/A_MIL/A_MIL + V V S = V V S = V S IN D D V O R L C L pf R L C L pf V O Logic Input Switch Output Switch Output V V S V V S Logic = Switch On V INH % V O % V O % V V t BBM C L (includes fixture and stray capacitance) FIGURE. Break-Before-Make SPDT (DGA_MIL, DGA_MIL) + V R g S D V O V O V O V g V IN C L nf IN X ON OFF ON Q = V O x C L V FIGURE. Charge Injection Positive Supply Voltage (V) Negative Supply Voltage (V) Voltage (V) V IN Logic Input Voltage V INH(min) /V INL(max) (V) V S or V D Analog Voltage Range (V) /. to /. to /. to Notes: a. Application Hints are for DESIGN AID ONLY, not guaranteed and not subject to production testing. Document Number: S- Rev. A, -Jul-

8 DGA_MIL/A_MIL/A_MIL/A_MIL + V k V V IN k V OUT k + V V k k M A A DGA Binary Input Gain FIGURE. Low Power Binary to n Gain Low Frequency Amplifier + V V V CMOS Logic Input Select High = V IN + V V IN V IN V OUT + V V CMOS Logic Gain Select High = x x x DGA k k FIGURE. Low Power Non-Inverting Amplifier with Digitally Selectable Inputs and Gain Document Number: S- Rev. A, -Jul-

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