PWM Frequency Voltage Noise Cancellation in Three-Phase VSI Using the Novel SVPWM Strategy

Transcription

1 Thi rtile h een epted or pulition in uture iue o thi journl, ut h not een ully edited. Content my hnge prior to inl pulition. Cittion inormtion: DOI 0.09/TPEL.0.809, IEEE Trntion on Power Eletroni PWM Frequeny Voltge Noie Cnelltion in Three-Phe VSI Uing the Novel SVPWM Strtegy Yingling Hung, Yongxing Xu, Memer, IEEE, Yong Li, Guijie Yng, Jiin Zou, Senior Memer, IEEE Atrt Thi pper h oued on the novel SVPWM trtegy or the two-level three-phe inverter, whih ould eliminte the hrmoni nery PWM requeny. Er-piering high requeny eletromgneti noie rom motor i ommon due to PWM tehnique. The propoed SVPWM i le to remove the high requeny hrmoni loted nery the PWM requeny nd other odd multiple y hnging the originl withing tte. The unplent outi noie ould e removed with the novel trtegy whoe PWM requeny i eleted ner 0 khz. By omprion, it i ner 0 khz or onventionl SVPWM to hieve the imilr perormne. Thereore, the withing loe re igniintly redued uing the novel method. Furthermore, the propoed tehnique neither hnge the hrteriti o the undmentl wve nor employ the dditionl iruit in the drive. At lt, the eetivene o propoed trtegy i veriied y imultion nd experiment. Index Term SVPWM, outi noie, hrmoni uppreion, motor drive, LC ilter. I. INTRODUCTION Spe vetor pule-width modultion (SVPWM) i the mot importnt PWM tehnique in motor drive eue o exellent tedy-tte nd dynmi perormne []. However, the SVPWM equene o pule ontin ueul e requeny nd undnt high requeny hrmoni. The et o high requeny hrmoni re loted nery the rrier requeny nd it multiple []. Nowdy, -0 khz withing requenie re ommon []. The rnge o humn hering generlly rom 0 Hz to 0 khz overlp with withing requeny. Er-piering high requeny eletromgneti virtion nd noie ould e produed y idend hrmoni whoe requeny i le thn 0 khz []. In ertin dometi Mnuript reeived Otoer 0, 0; epted Novemer, 0. Thi work w upported y the Ntionl Nturl Siene Foundtion o Chin under Grnt 5506 nd Grnt 500. (Correponding uthor: Yongxing Xu.) Yingling Hung, Yongxing Xu, Yong Li, Guijie Yng nd Jiin Zou with the Shool o Eletril Engineering, Hrin Intitute o Tehnology, Hrin 5000, Chin (e-mil: hung_yingling@6.om, xuyx@hit.edu.n, liyong6@hit.edu.n, yngguijie@hit.edu.n, zoujiin@hit.edu.n). nd ommeril re, uh eletri vehile nd elevtor, the eptility o drive ytem i tied trongly to the pereived ound level reulting rom their opertion []. Aouti omort h eome n inreingly importnt eture, well wy to omply with the IEC norm [5]. Thu, uh unplent outi nd eletromgneti virtion nd noie ued y PWM i quite ommon iue nd hould e ddreed properly []-[]. Generlly, motor outi noie n e liied in two type. One type inlude the erodynmi nd mehnil noie produed y the n nd ering, repetively [6]. The other type o noie emitted y motor involve eletro-mgneti outil noie [5]. Thi type o noie i produed y virtion ore denity wve ording to v(, t) (, t) / ( 0) where (, t) i the ir-gp lux denity hrmoni omponent, nd i the ngulr poition. t nd 0 men time nd vuum permeility, 0 H/m, repetively. Thi type o noie depend on the pe hrmoni nd the time hrmoni [6], [5]. Spe hrmoni re produed due to the nonlineritie tht the lux denity generte in the ir gp, even with inuoidl power upply. Time hrmoni pper when the motor i ed y power inverter due to voltge hrmoni with the undmentl voltge [5]. The ttor mgnetomotive ore (MMF) hrmoni due to PWM hrmoni in ttor urrent hve mgnitude nd requenie whih vry depending on the PWM trtegy ued. The PWM tehnique h diret impt on torque ripple, heting in oil, virtion, nd mehnil noie [6]. Mny reerher hve ttempted to redue eletromgnetilly indued outi noie due to time hrmoni []-[]. A well-reerhed pproh to pred the outi noie petrum i to employ rndom pule width modultion (RPWM) [8], [0], []. The rrier requeny i modulted y peudorndom ode [8]. Thi tehnique pred power o noie over wide rnge o requeny domin ompred with the onventionl SVPWM with ixed withing requeny [0]. The eet on reduing eletromgneti noie () 0 IEEE. Peronl ue i permitted, ut repulition/reditriution require IEEE permiion. See or more inormtion.

2 Thi rtile h een epted or pulition in uture iue o thi journl, ut h not een ully edited. Content my hnge prior to inl pulition. Cittion inormtion: DOI 0.09/TPEL.0.809, IEEE Trntion on Power Eletroni o the tringulr periodi rrier requeny modultion (PCFM) [] re imilr to RPWM. However, the humn hering outi noie till exit nd the level o noie mye not eptle in ome pplition. In ddition, thi method my exite the ytem reonnt requenie, whih inree the outi noie nd virtion []. The gretet mount o mgneti noie in the motor our t requenie loe to the nturl mehnil requenie o the ttor ytem. [5], [6] optimize the inverter ehvior in order to redue the totl hrmoni ditortion (THD) nd outi noie y uing the HIPWM-FMTC trtegy or SLPWM trtegy. Uing LC output ilter etween VSI nd motor i nother prtiulrly eetive pproh to redue the mplitude o the withing ripple, mke the voltge on the motor terminl inuoidl [5] nd redue the outi noie without requiring modiition o the rrier requeny [5]. For the deign o LC output ilter, the reonne requeny o ilter i onidered o the output voltge wveorm [6]. In order to hieve n lmot inuoidl motor voltge, the reonne requeny o the ilter h to e well elow the lowet hrmoni requeny o the inverter voltge reulting rom pule width modultion. To void dditionl reonne uppreing ontrol, the reonne requeny h lo to e well ove the undmentl requeny o the inverter voltge [-9]. A rule o thum in ontrol theory i tht the requenie o uh onigurtion hve to hve t let tor o 0 etween them to deouple the eet. Aording to thi rule, or 60 Hz undmentl requeny, reonne requeny h to e t let 600 Hz, nd withing requeny o the inverter output h to e t let 6000 Hz []. In other word, the reonne requeny o ilter i inluened y withing requeny o VSI. Thereore, the perormne, ize nd ot o LC ilter trongly depend on the withing requeny [-]. However, due to it lrge indutne nd pitne vlue, the ilter will e lrge in ize, whih limit the pplition o LC ilter [8]. Thee pulition do muh work in ilter nd mke importnt ontriution to power eletroni nd eletril noie. I the inverter n operte with ner 0 khz withing requeny, the eet o the time hrmoni will e miniml eue the urrent hrmoni re ttenuted y the indutive iruit o the motor [5]. However, the withing requeny o VSI i everely retrited to mitigte withing loe. In thi pper, new SVPWM method h een propoed to hit the irt withing hrmoni to the twie originl withing requeny or two-level three-phe VSI with only inreing % withing loe. By uing thi trtegy, the tul withing requeny n e eleted ner khz, nd the requeny o voltge hrmoni i ner 0 khz, whih i eyond the humn hering rnge. The nnoying whine tht the motor produe n e removed y eliminting ditint tone in the pplied voltge. Moreover, or the pplition with LC output ilter, the mller ilter omponent ould e ued eue o the inree o tul withing hrmoni. The ret o thi pper i orgnized ollow. The onventionl SVPWM nd PCFM re lited in Setion II in order to ompre with the propoed trtegy. Then, the propoed SVPWM tehnique i diued in Setion III, whih inlude the implementtion o the propoed trtegy uing progrm, the inluene o modultion rtio nd rrier-modulting requeny rtio. The noie invetigtion in SVPWM, PCFM nd the propoed SVPWM re hown in Setion IV. Experiment re rried out on 0.5 kw PMSM uing digitl ignl proeor (DSP) ontrol ord in Setion V. Finlly, onluding remrk re preented in Setion VI. II. REVIEW OF THE CONVENTIONAL SVPWM AND PCFM A. The onventionl SVPWM Fig.. Spe vetor digrm. A hown in Fig., the vetor pe i divided into eight poile voltge vetor whih onit o two zero vetor ( V 0 nd V ) nd ix tive vetor ( V V 6 ). With repet to V poition, whih i loted in etor I, two tive vetor V nd V re pplied to the two-level three-phe VSI. The djent lokwie nd ounter-lokwie vetor o V nd the zero vetor re pplied or the perentge time o T, T, nd T 0,, whih re given in ()-(), over the withing period T, repetively T mt in( ) () T mt in () T T T T () 0, where m i modultion rtio o SVPWM nd m V v i the rotting ngle o V with repet to it djent lokwie vetor, nd v d i the voltge o DC-link [-]. Generlly, the durtion o zero vetor T 0 nd T re equl, nd oth V 0 nd V re ued in eh withing yle or SVPWM. Fig. how the withing pule pttern in the SVPWM tehnique when V i loted in Setor I. The power withe re onidered idel withe. The minimum pule width nd ded-time re ignored.,, re the withing tte. High voltge level indite the upper with i on nd lower with in the me rm i o. Low voltge level indite d () 0 IEEE. Peronl ue i permitted, ut repulition/reditriution require IEEE permiion. See or more inormtion.

3 Thi rtile h een epted or pulition in uture iue o thi journl, ut h not een ully edited. Content my hnge prior to inl pulition. Cittion inormtion: DOI 0.09/TPEL.0.809, IEEE Trntion on Power Eletroni the lower with i on nd upper with in the me rm i o. The tive vetor V nd V re ymmetri out V, whih i hown more lerly in Fig.. A hown in Fig. (), the three-phe voltge re lo ymmetri out V due to the ymmetry o withing tte or SVPWM tehnique. tringulr untion, wtooth untion or rndom untion (RPWM). Fig. how the () t o tringulr PCFM. In generl, the period o periodi rrier untion () t i equl to the period o undmentl wve T 0. F, the mplitude o () t, i deined Ft T0 F ( t 0) T0 () t (5) Ft T 0 F (0 t ) T0 I PWM requeny i rom khz to 6 khz, undmentl requeny i 50 Hz nd the nominl PWM requeny i 5 khz, the intntneou PWM requeny o tringulr PCFM i 000( 00 t) ( 0.0 t 0) () t. 000( 00 t) (0 t 0.0) () Fig.. Conventionl SVPWM Swithing tte, Compoition o vetor V, () Three-phe voltge when V loted t etor I. Fig.. The hemti o tringulr PCMF. B. The review o PCFM The PWM requeny o onventionl SVPWM i ontnt, where tht o PCFM i vrile [], []. The intntneou PWM requeny o PCFM i deined ( t) ( t) () where i the nominl PWM requeny o onventionl SVPWM, nd () t i the periodi rrier untion, uh III. THE PROPOSED SVPWM SVPWM h everl dvntge over the other PWM tehnique, uh low THD nd implementtion impliity. The lt dvntge i very importnt when the perormne o miro ontroller unit (MCU) w low. Nowdy, the development o ield progrmmle gte rry (FPGA) nd MCU mke it poile to hieve more exellent nd omplex SVPWM tehnique. A. Introdution o the novel SVPWM A mentioned in the Setion II, the withing tte o SVPWM re ymmetri out zero vetor. The withing untion, ompoition o vetor nd three-phe voltge o the novel SVPWM re hown in Fig.. A hown in Fig., the equene o V nd V re exhnged. Compred with the onventionl SVPWM tehnique, the omponent o V re ymmetri out V. Thereore, in eh withing yle, V nd V re pplied twie in order, whih i illutrted lerly in Fig.. Fig. () how the wveorm o three phe voltge, where the wveorm i the me wveorm. Thu, the phe voltge meet v( t 0.5 T ) v( t) (6) where T i the PWM yle. The minimum period o vt () i 0.5T. The hrmoni requeny o vt () i n n n () 0.5T T where n,,..., i the PWM requeny. For the propoed SVPWM, the high requeny voltge hrmoni re loted nery,, 6, A een in Fig., in PWM yle, the phe-b rm i operted twie nd phe-a nd phe-c rm re operted one. For the propoed trtegy, withing opertion i time, where time or onventionl SVPWM tehnique in PWM yle. In other word, the prie o reduing odd multiple () 0 IEEE. Peronl ue i permitted, ut repulition/reditriution require IEEE permiion. See or more inormtion.

4 Thi rtile h een epted or pulition in uture iue o thi journl, ut h not een ully edited. Content my hnge prior to inl pulition. Cittion inormtion: DOI 0.09/TPEL.0.809, IEEE Trntion on Power Eletroni hrmoni i inreing % withing loe. modiied withing tte untion (MS Stte). In eh yle o the propoed SVPWM, there re two onventionl withing tte untion nd one modiied withing tte untion. The omprion o the propoed SVPWM i hown in TABLE I. For intne, i V i loted in etor III, the withing tte untion nd re the me onventionl SVPWM. The modiied withing tte untion i V V V V V, whih i dierent rom V V V V V in SVPWM. The propoed trtegy ould e hieved eily with MCU, or FPGA ording to the logi in TABLE I. () Fig.. The propoed SVPWM Swithing tte, Compoition o vetor V, () Three-phe voltge when V loted t etor I. B. Implementtion o the novel SVPWM TABLE I The omprion o SVPWM nd the propoed SVPWM Setor MS Stte SVPWM Propoed SVPWM I V V V V V V V V V V II III IV V VI V V V V V V V V V V V V V V V V V V V V V V5 V V5 V V V5 V V V 5 V5 V6 V V6 V 5 V5 V6 V V5 V 6 V6 V V V V 6 V6 V V V6 V In thi pper, the withing tte untion dierent rom onventionl SVPWM, hown in Fig., i lled TABLE II Implementtion o the propoed SVPWM Fig. 5. The implementtion o the propoed SVPWM with progrm. Setor Condition Point Point Point I T T T 0.5( T T) 0.5( T T T T ) 0.5( T T) II T T T 0.5( T T) 0.5( T T T T ) 0.5( T T) III T T T 0.5( T T) 0.5( T T T T ) 0.5( T T) IV T T T 0.5( T T) 0.5( T T T T ) 0.5( T T) V T T T 0.5( T T) 0.5( T T T T ) 0.5( T T) VI T T T 0.5( T T) 0.5( T T T T ) 0.5( T T) The implementtion o the propoed SVPWM with progrm in MCU or DSP i hown in Fig. 5. In order to implement the onventionl SVPWM tehnique, the PWM period T nd the durtion o three phe on-time T, T nd T hould e lulted. The etor ould e otined y ompring the vlue o T, T nd T. I T T T, V i loted in etor I. The peil point mrked, nd in Fig. 5 re lulted y 0.5( T T ), 0.5( T T ) 0.5( T T ) nd 0.5( T T) repetively. The withing untion nd re the me onventionl SVPWM. The modiied withing tte untion hnge to low level t point with, then high level t point, t lt low level with. When V i loted in nyone o other 5 etor, the peil point ould e lulted in the me wy, whih re lited in TABLE II. The propoed trtegy ould e hieved eily with with-e untion nd the omputtionl urden i light or preent MCU or DSP () 0 IEEE. Peronl ue i permitted, ut repulition/reditriution require IEEE permiion. See or more inormtion.

5 Thi rtile h een epted or pulition in uture iue o thi journl, ut h not een ully edited. Content my hnge prior to inl pulition. Cittion inormtion: DOI 0.09/TPEL.0.809, IEEE Trntion on Power Eletroni 5 Fig. 6. Aymmetril regulr mpled SVPWM i lrge, i mll. () Fig.. Swithing tte o onventionl SVPWM, Swithing tte o the propoed SVPWM, () Wveorm o three-phe voltge uing the propoed SVPWM. SVPWM i hown in Fig. 6, where () t i the modultion wve o phe-b. The withing tte depend on the vlue o () t t the midpoint o eh PWM yle. I rrier-modulting requeny rtio i lrge enough, the durtion o withing tte eore eh midpoint mrked T will e lmot equl to the durtion o ehind midpoint mrked T, hown in Fig. 6. However, Fig. 6 how tht i the motor peed i reltively high or the PWM requeny i rther low, whih men tht i mll enough, the dierene o durtion etween T nd T will e oviou. The dierene i deined y T T T. T will inluene the eet o PWM requeny voltge hrmoni nelltion or the propoed SVPWM. The reon re nlyzed ollow. When i mll enough, the withing tte o onventionl SVPWM re hown in Fig.. The durtion o V nd V i T, T nd T, T repetively, nd T T, T T. The orreponding withing tte o the propoed SVPWM re hown in Fig.. Fig. () how the wveorm o phe voltge with the propoed SVPWM nd demontrte the wveorm nd wveorm re not ongruou ompred with them in igure. Thu, the PWM requeny hrmoni exit in phe voltge equene ed on Fourier erie nlyi. The lrger the dierene T i, the higher PWM requeny hrmoni ontent in phe voltge eome. It i ler tht the hrmoni ontent loted nery the PWM requeny will inree with the deree o rrier-modulting requeny rtio. D. The inluene o modultion rtio on the propoed SVPWM The inluene o modultion rtio on the propoed SVPWM i imilr to the e o rrier-modulting requeny rtio. A hown in Fig. 8, the lope o modultion wve () t inree with the inree o modultion rtio. The dierene o durtion T will vry with the lot o () t. The reltionhip etween T nd modultion rtio i hown in Fig. 8. A een in the igure, the inree trend o T eome low with the modultion rtio. Thu, the PWM requeny hrmoni will inree with the inree o modultion rtio or the propoed SVPWM when modultion rtio i le thn 0.6. When modultion rtio i lrger thn 0.6, the PWM requeny hrmoni ontent illy remin unhnged. Fig. 8. Aymmetril regulr mpled SVPWM with hnging reltionhip etween T nd modultion rtio., The C. The inluene o rrier-modulting requeny rtio on the propoed SVPWM The modultion model o ymmetril regulr mpled IV. THE NOISE INVESTIGATION IN SVPWM, PCFM AND THE PROPOSED SVPWM A mentioned in the Setion II, the withing tte o onventionl SVPWM re ymmetri out zero vetor. Conequently, SVPWM h low THD. PCFM redue the noie y hnging the PWM requeny prtiulr untion, nd ould e eily implemented ompred with RPWM. Thi etion minly evlute the pility o noie redution ner () 0 IEEE. Peronl ue i permitted, ut repulition/reditriution require IEEE permiion. See or more inormtion.

6 Thi rtile h een epted or pulition in uture iue o thi journl, ut h not een ully edited. Content my hnge prior to inl pulition. Cittion inormtion: DOI 0.09/TPEL.0.809, IEEE Trntion on Power Eletroni 6 PWM requeny or SVPWM, tringulr PCFM nd the propoed SVPWM. The mpling requeny o phe voltge i 5 khz, nd the FFT reolution i 0 Hz. Fig. 9 how power petrl denity (PSD) o phe voltge uing the onventionl SVPWM, PCFM nd the propoed method repetively. The PWM requeny i khz or SVPWM. For the propoed SVPWM, the tul withing requeny i equl to khz..5 khz to.5 khz h een eleted or tringulr PCFM, o the verge o withing requeny i equl to khz. The undment omponent, rrier-modulting requeny rtio nd modultion rtio or the three method i equl to 50Hz, 60 nd 0.8 repetively. A een in Fig. 9, or the onventionl SVPWM, the et o high requeny hrmoni re loted nery the PWM requeny nd it multiple. The PSD o PWM requeny hrmoni i rther high in khz. The reult o PCFM re hown in Fig. 9, the PSD o PWM requeny i ditriuted reltively eqully throughout.5 khz to.5 khz. Compred with the reult o onventionl SVPWM mrked y olid line, the lower level o hrmoni ner PWM requeny ed on PCFM-ed method indite tht they hve etter eet on noie elimintion. However, the noie ner PWM requeny i till oviou nd uneptle in ome pplition. the PSD level o SVPWM nd PCFM ner PWM requeny. Compred with the reult o onventionl SVPWM nd PCFM, the PWM requeny voltge noie nelltion o the propoed SVPWM i very remrkle. The FFT reult o three method when rrier-modulting requeny rtio i equl to 60 nd modultion rtio i equl to 0.8 re diued ove. In t, the omponent o PWM requeny hrmoni re relevnt to the rrier-modulting requeny rtio nd modultion rtio, whih i diued in Setion III. In order to ompre the eet o the propoed SVPWM on PWM requeny voltge noie elimintion with PCFM omprehenively, the mplitude o PWM requeny hrmoni vrying with dierent modultion rtio nd rrier-modulting requeny rtio repetively re imulted in the ollowing. Fig. 0 how the mplitude o PWM requeny( khz) phe voltge noie or SVPWM, PCFM nd the propoed SVPWM when modultion rtio vrie rom 0. to 0.9. The undmentl requeny i equl to 50Hz nd rrier-modulting requeny rtio i equl to 60. The mplitude o PWM requeny noie uing SVPWM or PCFM inree with the inree o modultion rtio. For the propoed SVPWM, the mplitude inree with modultion rtio when modultion rtio i le thn 0.6. By ontrt, when modultion rtio i lrger thn 0.6, the mplitude illy remin unhnged. For the three method, the mplitude o PWM requeny noie uing PCFM i lower thn SVPWM nd tht uing the propoed SVPWM i the lowet in dierent modultion rtio. Fig. 0. The PWM requeny hrmoni mplitude o phe voltge vrie with dierent modultion rtio when rrier-modulting requeny rtio i 60, dierent rrier-modulting requeny rtio when modultion rtio i 0.8. () Fig. 9. PSD o phe voltge with SVPWM, PCFM, () propoed SVPWM when rrier-modulting requeny rtio i 60 nd modultion rtio i 0.8. Fig. 9() how the PSD o the propoed method nd mrk Fig.. The omprion o SVPWM, PCFM nd the propoed SVPWM. Fig. 0 how the mplitude o PWM requeny phe voltge noie uing thee three tehnique when rrier-modulting requeny rtio vrie rom 5 to 5. The undmentl requeny i equl to 50Hz nd modultion rtio i equl to 0.8. The mplitude o PWM requeny noie uing the () 0 IEEE. Peronl ue i permitted, ut repulition/reditriution require IEEE permiion. See or more inormtion.

7 Thi rtile h een epted or pulition in uture iue o thi journl, ut h not een ully edited. Content my hnge prior to inl pulition. Cittion inormtion: DOI 0.09/TPEL.0.809, IEEE Trntion on Power Eletroni propoed SVPWM i till the lowet o thee tehnique. For the propoed SVPWM, the noie mplitude keep in rther low level when rrier-modulting requeny rtio i more thn 5. I the rrier-modulting requeny rtio i le thn 5, the mplitude will inree. The noie mplitude uing the propoed SVPWM i loe to tht uing PCFM when rrier-modulting requeny rtio i equl to 5. For etter eet on PWM requeny noie elimintion, it i reommended tht the rrier-modulting requeny rtio i more thn 0. The reult in PWM requeny voltge noie nelltion uing thee three method with dierent rrier-modulting requeny rtio nd modultion rtio re hown ove. Fig. involve the omprion o the withing lo or SVPWM, PCFM nd the propoed SVPWM. When PWM requeny i equl to 0 khz, the withing lo o SVPWM i deined 00%. For SVPWM in 0 khz PWM requeny, the requeny o the lowet PWM hrmoni i ner 0 khz whih i in the rnge o humn hering nd whoe mplitude i high. For tringulr PCFM, the withing requeny vrie rom 8 khz to khz, the verge o whih i equl to 0 khz. The requeny o the lowet PWM hrmoni i ner 8 khz nd it mplitude i lower thn SVPWM. However, the level o er-piering noie in 8 khz to khz i rther high nd till uneptle in ome pplition. The PWM requeny i equl to 0 khz or the propoed SVPWM, nd the tul withing requeny i. khz due to the dditionl withing tion in eh PWM yle. For thi method, the voltge hrmoni ner PWM requeny re illy removed. Thu, the requeny o the lowet PWM hrmoni i ner 0 khz, whih i eyond the rnge o humn hering, nd the mplitude o noie i very low. Moreover, eue the tul withing requeny i equl to. khz, the withing loe re %. A onequene, the propoed method h the glol optimum perormne in PWM requeny voltge nelltion nd withing loe redution in thee three method. redue the demnd o meuring intrument (High voltge dierentil proe nd oilloope). In the ollowing reult, the undmentl requeny i equl to 50Hz, rrier-modulting requeny rtio i equl to 60 nd modultion rtio i equl to The mpling requeny o phe voltge or the FFT in oilloope i 5 khz. Fig.. The pole voltge uing SVPWM, the propoed SVPWM (X-xi: m/div, Y-xi: 50 V/div). V. EXPERIMENTAL VERIFICATION TABLE III Speiition nd Prmeter o Sytem Speiition nd Prmeter Vlue Phe Reitne 0.6 Ω Phe Indutne.98 mh Bk-EMF Coeiient V/krpm Pole Pir 5 Rted Lod.5 N.m PWM requeny 000 Hz Lod.0 N.m In thi etion, three-phe VSI h een implemented to veriy the eetivene o propoed SVPWM trtegy in removing voltge noie loted nery the PWM requeny prtilly. For howing the dvntge o the propoed trtegy, the experimentl reult o SVPWM tehnique nd PCFM re hown well. The peiition nd prmeter o drive ytem re hown in TABLE III. A een in thi tle, PWM requeny o VSI i khz whih i rther low ompred with ommon VSI, eue lower withing requeny ould Fig.. Three phe voltge uing SVPWM, the propoed SVPWM (X-xi: 00μ/div, Y-xi: 0 V/div). Fig. how the withing lo omprion o three phe pole voltge uing SVPWM nd the propoed method. For onventionl SVPWM hown in Fig., the withing requeny o ll withe i lwy khz. Fig. illutrte () 0 IEEE. Peronl ue i permitted, ut repulition/reditriution require IEEE permiion. See or more inormtion.

8 Thi rtile h een epted or pulition in uture iue o thi journl, ut h not een ully edited. Content my hnge prior to inl pulition. Cittion inormtion: DOI 0.09/TPEL.0.809, IEEE Trntion on Power Eletroni 8 pole voltge uing the propoed SVPWM. At ny time, the withing requeny o one phe pole voltge i 6 khz nd tht o other two phe pole voltge i khz. In other word, one rm i operted t 6 khz nd other two rm re operted t khz. The tul withing requeny i 6kHz khz khz. Thu, t the me PWM requeny, the withing lo o the propoed method i % o onventionl SVPWM. In the ollowing etion, three phe voltge nd their hrmoni petr uing SVPWM nd the propoed method re hown repetively. Three phe voltge uing SVPWM i hown in Fig.. In withing yle the equene o pplied vetor i V0V V V0 VV. The period o eh wveorm i one withing yle T. Fig. how three phe voltge uing the propoed method. Compred with SVPWM, the equene o pplied vetor i V0V V V0V V nd the period o eh wveorm i 0.5 withing yle. Thereore, the PWM hrmoni requenie o phe voltge uing the propoed method re twie tht uing SVPWM. voltge uing SVPWM. A orementioned, PWM requeny i equl to khz, nd hrmoni onentrte on khz nd it multiple. The reult o tringulr PCFM whoe withing requeny rnge rom.5 khz to.5 khz re hown in Fig.. The verge withing requeny i equl to khz. A een in thi igure, the mplitude o PWM requeny hrmoni re lmot lt nd lower thn tht uing SVPWM. Fig. () demontrte the mplitude o the hrmoni petrum o phe voltge uing the propoed method. The PWM requeny i equl to khz nd tul withing requeny i equl to khz. In order to ompre the mplitude o PWM requeny hrmoni uing thee three method, the hrmoni level o SVPWM nd PCFM re mrked in Fig. (). The mplitude o PWM requeny hrmoni re muh lower thn tht o other two method. There re no oviou voltge noie le thn the doule PWM requeny (6 khz). The experiment reult onirm tht the propoed method ould eliminte the PWM requeny voltge noie, the reult otined rom nlyi nd imultion. () Fig.. The hrmoni petrum o phe voltge uing SVPWM, PCFM, () the propoed SVPWM (X-xi:.5 khz/div, Y-xi: 0 dbv/div). Fig. illutrte the hrmoni petrum o phe Fig. 5. Phe-A voltge nd phe-a urrent uing SVPWM, the propoed SVPWM (X-xi: 00μ/div, Y-xi: 0 V/div). In power eletroni nd their lod, urrent omponent ue outi noie. In term o outi noie, the urrent mplitude in eh requeny omponent i importnt []. Thereore, the phe urrent hrmoni nelltion re nlyzed nd hown in the ollowing prt to urther illutrte the propoed trtegy. The orreponding reltion o phe urrent nd phe voltge uing SVPWM i hown in Fig. 5, nd the e uing the propoed trtegy i hown in Fig. 5. Similr to the phe voltge ove, the equene o pplied vetor i V0V 5V 6V0 V6V 5 in withing yle. The period o phe voltge nd phe urrent wveorm i one withing yle T. Compred with SVPWM, the equene o pplied () 0 IEEE. Peronl ue i permitted, ut repulition/reditriution require IEEE permiion. See or more inormtion.

9 Thi rtile h een epted or pulition in uture iue o thi journl, ut h not een ully edited. Content my hnge prior to inl pulition. Cittion inormtion: DOI 0.09/TPEL.0.809, IEEE Trntion on Power Eletroni 9 vetor i V0V 5V 6 V0V 5V 6 nd the period o eh wveorm i 0.5 withing yle. Thu, the PWM hrmoni requenie o phe urrent uing the propoed method re twie tht uing SVPWM. The hrmoni petrum o phe urrent uing SVPWM nd the propoed method i hown in Fig. 6 nd Fig. 6 repetively. The mplitude o PWM requeny hrmoni uing SVPWM nd PCFM re mrked in Fig. 6. In omprion with thee two method, the level o PWM requeny hrmoni uing the propoed method re muh lower. The PWM requeny hrmoni o phe urrent re redued igniintly y the propoed method. Fig. 6. The hrmoni petrum o phe urrent uing SVPWM, the propoed SVPWM (X-xi:.50 khz/div, Y-xi: 0 dbv/div). Fig.. The noie petrum uing SVPWM, the propoed SVPWM (X-xi:.50 khz/div, Y-xi: 0 dbv/div). The PWM tehnique h diret impt on virtion nd mehnil noie [6]. When the PWM requeny noie re nelled rom phe voltge nd phe urrent, thi requeny outi noie ould lmot e removed. The outi noie o motor i meured y MEMS mirophone nd the requeny petrum uing SVPWM nd the propoed method i hown in Fig. nd Fig. repetively. Compred with the reult uing SVPWM, the PWM requeny outi noie re lmot e removed y the propoed method, whih veriie the eetivene o propoed trtegy in removing the PWM requeny noie. VI. CONCLUSION Thi pper h propoed novel SVPWM trtegy or two-level three-phe VSI. The propoed trtegy i deigned y hnging the originl withing tte untion o onventionl SVPWM to nel the PWM requeny voltge noie nd urrent noie t the expene o inree % withing requeny only. Conequently, the propoed method ply n importnt role in dereing er-piering virtion nd unplent outi noie, improving the perormne o LC ilter nd reduing their ot nd ize. In thi pper, the inluene o modultion rtio nd rrier-modulting rtio on the propoed method i tudied nd the implementtion o the method y progrm on MCU or DSP i hown. In ddition, the eet on PWM requeny voltge noie elimintion uing SVPWM, PCFM nd the propoed method re ompred. The propoed method ould igniintly redue PWM requeny voltge noie with the minimum withing lo. Moreover, the reommended rrier-modulting rtio i more thn 0 to tke ull dvntge o the method. Simultion nd experimentl reult veriy the eetivene o the propoed method. In t, the propoed method n e ued not only in motor drive pplition, ut lo in grid-onneted inverter ytem to redue the ize o output ilter indutor. REFERENCES [] W. Ling, J. Wng, P. C. K. Luk, W. Fng nd W. Fei, Anlytil Modeling o Current Hrmoni Component in PMSM Drive With Voltge-Soure Inverter y SVPWM Tehnique, IEEE Trn. Energy Conver., vol. 9, no., pp , Sep. 0. [] W. Ling, P. C. K. Luk nd W. Fei, Anlytil Invetigtion o Sidend Eletromgneti Virtion in Integrl-Slot PMSM Drive With SVPWM Tehnique, IEEE Trn. Power Eletron., vol., no. 6, pp , Jun. 0. [] A. von Jounne nd P. N. Enjeti, Deign onidertion or n inverter output ilter to mitigte the eet o long motor led in ASD pplition, IEEE Trn. Ind. Appl., vol., no. 5, pp. 8-5, Sep./Ot. 99. [] A. K. Wlle, R. Spee nd L. G. Mrtin, Current hrmoni nd outi noie in AC djutle-peed drive, IEEE Trn. Ind. Appl., vol. 6, no., pp. 6-, Mr./Apr [5] A. Ruiz-Gonzlez, F. Vrg-Merino, J. R. Heredi-Lrrui, M. J. Meo-Gutierrez nd F. Perez-Hidlgo, Applition o Slope PWM Strtegie to Redue Aouti Noie Rdited y Inverter-Fed Indution Motor, IEEE Trn. Ind. Eletron., vol. 60, no., pp , Jul. 0. [6] A. Ruiz-Gonzlez, M. J. Meo-Gutierrez, F. Perez-Hidlgo, F. Vrg-Merino nd J. R. Heredi-Lrrui, Reduing Aouti Noie Rdited y Inverter-Fed Indution Motor Controlled y New PWM Strtegy, IEEE Trn. Ind. Eletron., vol. 5, no., pp. 8-6, Jn. 00. [] O. Oñederr, I. Kortrri, I. M. de Alegrí, J. Andreu nd J. I. Gárte, Three-Phe VSI Optiml Swithing Lo Redution Uing Vrile () 0 IEEE. Peronl ue i permitted, ut repulition/reditriution require IEEE permiion. See or more inormtion.

10 Thi rtile h een epted or pulition in uture iue o thi journl, ut h not een ully edited. Content my hnge prior to inl pulition. Cittion inormtion: DOI 0.09/TPEL.0.809, IEEE Trntion on Power Eletroni 0 Swithing Frequeny, IEEE Trn. Power Eletron., vol., no. 8, pp , Aug. 0. [8] T. G. Hetler nd D. M. Divn, Aouti noie redution in inuoidl PWM drive uing rndomly modulted rrier, IEEE Trn. Power Eletron., vol. 6, no., pp. 56-6, Jul. 99. [9] K. Boriov, T. E. Clvert, J. A. Kleppe, E. Mrtin nd A. M. Trzyndlowki, Experimentl invetigtion o nvl propulion drive model with the PWM-ed ttenution o the outi nd eletromgneti noie, IEEE Trn. Ind. Eletron., vol. 5, no., pp. 50-5, Apr [0] A. C. B. Kumr nd G. Nrynn, Vrile-Swithing Frequeny PWM Tehnique or Indution Motor Drive to Spred Aouti Noie Spetrum With Redued Current Ripple, IEEE Trn. Ind. Appl., vol. 5, no. 5, pp. 9-98, Sept./Ot. 06. [] A. Peyghmri, A. Dtn nd A. Ahmdyrd, Seletive Voltge Noie Cnelltion in Three-Phe Inverter Uing Rndom SVPWM, IEEE Trn. Power Eletron., vol., no. 6, pp , Jun. 06. [] K. Bu, J. S. S. Prd nd G. Nrynn, Minimiztion o Torque Ripple in PWM AC Drive, IEEE Trn. Ind. Eletron., vol. 56, no., pp , Fe [] J. Le Beneri, V. Lnrnhi, M. Hequet nd P. Brohet, Chrteriztion nd Redution o Audile Mgneti Noie Due to PWM Supply in Indution Mhine, IEEE Trn. Ind. Eletron., vol. 5, no., pp , Apr. 00. [] Y. Xu, Q. Yun, J. Zou nd Y. Li, Anlyi o Tringulr Periodi Crrier Frequeny Modultion on Reduing Eletromgneti Noie o Permnent Mgnet Synhronou Motor, IEEE Trn. Mgn., vol. 8, no., pp. -, Nov. 0. [5] K. Htu, A. K. Jin, D. Bnerjee nd V. T. Rngnthn, Ative Dmping o Output LC Filter Reonne or Vetor-Controlled VSI-Fed AC Motor Drive, IEEE Trn. Ind. Eletron., vol. 59, no., pp. -, Jn. 0. [6] J. Kim, J. Choi, nd H. Hong, Output LC ilter deign o voltge oure inverter onidering the perormne o ontroller, in Pro. Int. Con. Power Syt. Tehnol., PowerCon, 000, vol., pp [] J. K. Steinke, Ue o n LC ilter to hieve motor-riendly perormne o the PWM voltge oure inverter, IEEE Trn. Energy Conver., vol., no., pp , Sep [8] V. Dzhnkhotov nd J. Pyrhönen, Pive LC Filter Deign Conidertion or Motor Applition, IEEE Trn. Ind. Eletron., vol. 60, no. 0, pp. 5-59, Ot. 0. [9] P. T. Finlyon, Output ilter or PWM drive with indution motor, IEEE Ind. Appl. Mg., vol., no., pp. 6-5, Jn./Fe [0] A. von Jounne, D. A. Rendur, P. N. Enjeti nd J. W. Gry, Filtering tehnique to minimize the eet o long motor led on PWM inverter-ed AC motor drive ytem, IEEE Trn. Ind. Appl., vol., no., pp , Jul./Aug [] W. Chen, X. Yng, J. Xue nd F. Wng, A Novel Filter Topology With Ative Motor CM Impedne Regultor in PWM ASD Sytem, IEEE Trn. Ind. Eletron., vol. 6, no., pp , De. 0. [] C. Wng, K. Wng nd X. You, Reerh on Synhronized SVPWM Strtegie Under Low Swithing Frequeny or Six-Phe VSI-Fed Aymmetril Dul Sttor Indution Mhine, IEEE Trn. Ind. Eletron., vol. 6, no., pp , Nov. 06. [] J. Biw, M. D. Nir, V. Gopinth nd M. Bri, An Optimized Hyrid SVPWM Strtegy Bed on Multiple Diviion o Ative Vetor Time (MDAVT), IEEE Trn. Power Eletron., vol., no. 6, pp , Jun. 0. [] Y. Chen, Y. Tong nd X. Jin, A Novel Algorithm o SVPWM Hrmoni Anlyi, in Pro. IEEE nd Con. ICIEA, My. 00, pp [5] X. Chen nd J. Wng, Mgnetomotive ore hrmoni redution tehnique or rtionl-lot non-overlpping winding onigurtion in permnent-mgnet ynhronou mhine, Chinee Journl o Eletril Engineering, vol., no., pp. 0-, Sep. 0. Yingling Hung w orn in Inner Mongoli, Chin, in 990. He reeived the B.S. nd M.S. degree in eletril engineering in 0 nd 05, repetively, rom the Hrin Intitute o Tehnology, Hrin, Chin, where he i urrently puruing the Ph.D. degree. Hi urrent reerh interet inlude power onverter nd permnent-mgnet motor drive. Yongxing Xu (M 0) w orn in Gungxi Provine, Chin, in 9. He reeived the M.S. nd Ph.D. degree in eletril engineering rom the Hrin Intitute o Tehnology, Hrin, Chin, in 00 nd 005, repetively. He i urrently Proeor in the Stte Key Lortory o Rooti nd Sytem, Hrin Intitute o Tehnology, Hrin. Hi urrent reerh interet inlude permnent-mgnet mhine deign nd ontrol. Yong Li w orn in Septemer 96. He reeived the M.S. nd Ph.D. degree in eletril engineering rom Hrin Intitute o Tehnology, Hrin, Chin,in 988 nd 998, repetively. He i urrently Proeor with the Deprtment o Eletril Engineering, Hrin Intitute o Tehnology. Hi reerh interet inlude PMSM, peil motor nd their pplition. Guijie Yng w orn in Chin, in 965. He reeived hi Ph.D. in Eletril Engineering rom the Hrin Intitute o Tehnology (HIT), Hrin, Chin, in 005. Sine 99, he h een n Aitnt Reerher in the Reerh Center o Inertil Nvigtion Equipment, HIT. From 998 to 00, he w n Aoite Proeor t HIT. Sine 00, he h een Proeor in the Shool o Eletril Engineering nd Automtion (SEEA), HIT. Hi urrent reerh interet inlude high power PMSG drive, integrted digitl ontrol or motor, nd motor drive IP ore ed FPGA. Jiin Zou (SM 00) w orn on Jnury 9, 95, in Heilongjing Provine, Chin. He reeived the M.S. nd Ph.D. degree in eletril engineering rom the Hrin Intitute o Tehnology, Hrin, Chin, in 98 nd 988, repetively. Sine 985, he h een engged in the reerh in eletril mhine. He w with the Univerity o Liverpool, Liverpool, U.K. Viiting Reerh Fellow or one yer. He i now Proeor in the Stte Key Lortory o Rooti nd Sytem, Hrin Intitute o Tehnology. Pro. Zou i enior memer o the IEEE Mgneti oiety, ine 000. Hi urrent reerh interet inlude permnent-mgnet mhine deign nd ontrol () 0 IEEE. Peronl ue i permitted, ut repulition/reditriution require IEEE permiion. See or more inormtion.