Features. General Description. Applications. 8-PIN Synchronous Buck PWM Controller

Transcription

1 8-PIN Synchronous Buck PWM Controller Features General Description Operating with Single 5V or 1V Input Drives N-Channel MOSFETs Simple Single-Loop Control Design - Voltage-Mode PWM Control - Full 0% to 100% Duty Ratio - Fast Transient Response ±% Output Voltage ccuracy Over Temperature Under-Voltage Protection for Output The PW707 series are designed to provide a low cost synchronous Buck regulator for on-board DC to DC converter applications. The PW707 series together with dual N-channel MOSFETs such as PM71, provide a low cost solution for such applications. Each device features an internal 00/400kHz oscillator, Power-On-Reset (POR) for both and VC supplies, an external programmable soft-start function as well as output undervoltage detection that latches off the device when an output short is detected. 00/400kHz Constant Frequency Operation - 00kHz for PW707B - 400kHz for PW707 Small size, 8-PIN Package (SOIC or TSSOP) Lead Free and Green Devices vailable (RoHS Compliant) Pin Configuration FB 1 8 SS pplications 7 COMP LDRV 6 VC Graphics Cards GND 4 5 HDRV DDR Memory Power Supply DDR Memory Termination Voltage Low-Voltage Distributed Power Supplies NPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Rev..7 - Jun., 008 1

2 Ordering and Marking Information PW707/B PW707/B K : PW707/B XXXXX ssembly Material Handling Code Temperature Range Package Code Package Code K : SOP-8 O : TSSOP-8 Operating Junction Temperature Range C : 0 to 70 o C Handling Code TR : Tape & Reel ssembly Material L : Lead Free Device G : Halogen and Lead Free Device XXXXX - Date Code PW707/B O : PW707/B XXXXX Note : NPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. NPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD- 00C for MSL classification at lead-free peak reflow temperature. NPEC defines Green to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). bsolute Maximum Ratings XXXXX - Date Code Symbol Parameter Rating Unit V CC to GND -0.~0 V V C VC to GND -0.~0 V T J Operating Junction Temperature 0~15 C T STG Storage Temperature -65~150 C T SDR Maximum Lead Soldering Temperature, 10 Seconds 60 C Thermal Characteristics Symbol Parameter Typical Value Unit θ J Thermal Resistance in Free ir SOP-8 TSSOP C/W

3 Electrical Characteristics Unless otherwise specified, these specifications apply over V CC =5V, V C =1V and T =0 to 70 C. Typical values refer to T =5 C. Symbol Parameter Test Conditions SUPPLY CURRENT ICC Dynamic Supply Current PW707//B Min. Typ. Max. Unit FOSC=00kHz, CL=1500pF 5 m IC VC Dynamic Supply Current FOSC=00kHz, CL=1500pF m ICCQ Static Supply Current SS=GND m ICQ VC Static Supply Current SS=GND m POWER-ON-RESET OSCILLTOR FOSC Rising Threshold V POR Hysteresis V Rising VC Threshold.1..5 V VC POR Hysteresis V Free Running Frequency PW707 PW707B V OSC Ramp mplitude V ERROR MPLIFIER IFB1 FB Pin Input Bias Current SS=V, VFB=1V n IFB FB Pin Input Bias Current SS=0V, VFB=1V µ GM Transconductance µmho REFERENCE VOLTGE VFB FB Pin Regulation Voltage PW707 PW707B LREG VFB Line Regulation = 5~1V % GTE DRIVERS PROTECTION HDRV Rising Time CL = 1500pF ns HDRV Falling Time CL = 1500pF ns LDRV Rising Time CL = 1500pF ns LDRV Falling Time CL = 1500pF ns Dead Band Time ns VFBUV FB Under-Voltage Threshold VFB Falling PW707 PW707B VSD Shutdown Threshold Voltage Pull the voltage of SS pin V ISS Soft-Start Current SS= µ khz V V

4 Function Pin Description FB (Pin 1) Connect this pin to the output (VOUT) of the PWM converter via an external resistor divider to provide a voltage feedback path for the converter. The output voltage set by the resistor divider is determined using the following formula : VOUT = VREF x ( 1+ R OUT ) R GND SS (Pin 8) Connect a capacitor from this pin to ground.this capacitor, along with an internal 0µ current source, sets the softstart interval of the PWM converter and prevents the outputs from overshoot as well as limits the input current. Pull this pin below 0.5V can shutdown the converter. where ROUT is the resistor connected from VOUT to FB, and RGND is the resistor connected from FB to ground. The voltage at this pin is also monitored for Under-Voltage protection. (Pin ) Connect this pin to input voltage from 5V to 0V. This pin provides the bias for the control circuitry and the low-side power MOSFET driver (LDRV). The voltage at this pin is monitored for Power-On-Reset (POR) purpose. LDRV (Pin ) Connect this pin to the gate of the low-side power MOSFET. This pin provides the gate drive for the MOSFET. GND (Pin 4) Signal and power ground for the IC. ll voltage levels are measured with respect to this pin. HDRV (Pin 5) Connect this pin to the gate of the high-side power MOSFET. This pin provides the gate drive for the MOSFET. VC (Pin 6) This pin provides bias voltage to the high-side MOSFET driver. bootstrap circuit may be used to pump a boot voltage for enforcing the driving capability of the gate driver and improving the performance of the MOSFET. COMP (Pin 7) This pin is the output of the error amplifier. dd an external resistor-capacitor network to provide a loop compensation for the PWM converter. 4

5 Block Diagram SS 0u 4.5V Regulator.V Max. 64u POR Power On Reset VC Under-Voltage HDRV FB 5k V FBUV PWM Gate Control 5k V REF Error mp. OSC LDRV FOSC COMP GND Typical pplication Circuit 1. Dual supply voltage(5v and 1V) application R4 +1V Shutdown Q PM00 C7 0. R 4k C8 00pF C1 7 8 SS HDRV U1 PW707/B COMP GND 4 VC 6 LDRV FB C 5 1 C5 Q1 PM71 Q1B PM71 C4 100uF L4.uH L 1uH R1 49 R 1.4k C 47uF VIN +5V VOUT 1.5V/5 C6,C9 x 150uF 5

6 Typical pplication Circuit (Cont.). Single supply voltage(5v) application R4 Shutdown Q PM00 C8 0. R 4k C9 00pF 7 C1 8 SS HDRV U1 PW707/B COMP D 1N4148 GND 4 VC 6 LDRV FB C 5 1 D1 1N4148 C 0. D 1N4148 C6 Q1 PM71 Q1B PM71 C5 100uF L4.uH L 1uH R1 49 R 1.4k C4 47uF C7,C10 x150uf VIN +5V VOUT 1.5V/5. LCD Monitor pplication Circuit R4 R8 0 Extra Circuit for VIN>15V pplication C8 0. R 4k C9 00pF 7 C1 8 SS HDRV U1 PW707/B COMP GND 4 VC LDRV D 1N4148 D1 1N FB C 5 1 C 0. R9 1 R10 1 C11 R5 18k R6 10k Q N904 C6 Q1 PM71 Q1B PM71 C5 470uF L4 50uH R7 1k U PL41 L 1uH R1 k R 1k C1 0. C4 47uF C7,C10 x470uf VIN 9V~V VOUT 5V / 0.~5 6

7 Package Information SOP-8 D SEE VIEW E1 E h X 45 e b c 1 VIEW L 0.5 GUGE PLNE SETING PLNE S Y M SOP-8 B O L MIN. MX. MIN MX b c D E E e 1.7 BSC BSC h L MILLIMETERS INCHES Note: 1. Follow JEDEC MS-01.. Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side.. Dimension E does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 10 mil per side. 7

8 Package Information TSSOP-8 D SEE VIEW E1 E e b C L S Y M TSSOP-8 MILLIMETERS B O L MIN. MX. INCHES 1.0 MIN. MX b c D E E1 e L BSC Note : 1. Follow JEDEC MO-15. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not BSC exceed 6 mil per side.. Dimension "E1" does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 10 mil per side. 8

9 Carrier Tape & Reel Dimensions OD0 P0 P P1 E1 OD1 B T B0 W F K0 B 0 SECTION - SECTION B-B d H T1 pplication H T1 C d D W E1 F MIN MIN. 0. MIN SOP-8 P0 P1 P D0 D1 T 0 B0 K MIN pplication H T1 C d D W E1 F MIN MIN. 0. MIN TSSOP-8 P0 P1 P D0 D1 T 0 B0 K MIN (mm) Devices Per Unit Package Type Unit Quantity SOP-8 Tape & Reel 500 TSSOP-8 Tape & Reel 500 9

10 Reflow Condition (IR/Convection or VPR Reflow) T P Ramp-up tp Critical Zone T L to T P Temperature T L Tsmax Tsmin ts Preheat t L Ramp-down 5 t 5 C to Peak Reliability Test Program Test item Method Description SOLDERBILITY MIL-STD-88D C, 5 sec HOLT MIL-STD-88D Hrs C PCT JESD--B, Hrs, 100%RH, 11 C TST MIL-STD-88D C~150 C, 00 Cycles ESD MIL-STD-88D VHBM > KV, VMM > 00V Latch-Up JESD 78 10ms, 1 tr > 100m Classification Reflow Profiles Profile Feature Sn-Pb Eutectic ssembly Pb-Free ssembly verage ramp-up rate (T L to T P ) C/second max. C/second max. Preheat 100 C 150 C - Temperature Min (Tsmin) - Temperature Max (Tsmax) 150 C 00 C seconds seconds - Time (min to max) (ts) Time maintained above: - Temperature (T L ) - Time (t L ) Time 18 C seconds 17 C seconds Peak/Classification Temperature (Tp) See table 1 See table Time within 5 C of actual Peak Temperature (tp) 10-0 seconds 0-40 seconds Ramp-down Rate 6 C/second max. 6 C/second max. Time 5 C to Peak Temperature 6 minutes max. 8 minutes max. Note: ll temperatures refer to topside of the package. Measured on the body surface. 10

11 Classification Reflow Profiles (Cont.) Table 1. SnPb Eutectic Process Package Peak Reflow Temperatures Package Thickness Volume mm <50 Volume mm 50 <.5 mm 40 +0/-5 C 5 +0/-5 C.5 mm 5 +0/-5 C 5 +0/-5 C Table. Pb-free Process Package Classification Reflow Temperatures Package Thickness Volume mm <50 Volume mm Volume mm >000 <1.6 mm C* C* C* 1.6 mm.5 mm C* C* C*.5 mm C* C* C* *Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated classification temperature (this means Peak reflow temperature +0 C. For example 60 C+0 C) at the rated MSL level. Customer Service npec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan Tel : Fax : Taipei Branch : F, No. 11, Lane 18, Sec Jhongsing Rd., Sindian City, Taipei County 146, Taiwan Tel : Fax :