Data Sheet. ALM W Analog Variable Gain Amplifier. Description. Features. Specifications. Pin connections and Package Marking.

Transcription

1 ALM-81.25W Analog Variable Gain Amplifier Data Sheet Description Avago Technologies ALM-81 is a.25w Analog Controlled Variable Gain Amplifier which operates from.4ghz to 1.6GHz. The device provides an exceptionally high OIP3 level of dbm, which is maintained over a wide attenuation range. The device features wide gain control range, low current, excellent input and output return loss. The ALM-81 is housed in a miniature 5.X5.X1.1 mm 3, -lead multiple-chips-on-board (MCOB) module package. This part is suitable for the AGC/Temperature compensation circuits application in wireless infrastructure such as Cellular/PCS/W-CDMA/WLLand and new generation wireless technologies systems. Pin connections and Package Marking 81 WWYY XXXX Features Halogen free Wide Gain Control Range High OIP3 across attenuation range Specifications At.9GHz, V dd = 5V, I total = 1mA (typ), V bias = 4V, V ctrl = OIP3 =.5dBm Noise Figure = 4.8dB Gain = 13.5dB P1dB = 23.2dBm IRL = 17dB, ORL = 12dB Attenuation Range = db Application WLL, WLAN and other applications in the MHz to 1.6GHz range. Transmitter and Receiver Gain Control Temperature Compensation Circuitry 7 Vctrl 8 GND 9 EXT Lout Not used Attention: Observe precautions for handling electrostatic sensitive devices. ESD Machine Model = V ESD Human Body Model = 65 V Refer to Avago Application Note A4R: Electrostatic Discharge, Damage and Control. 6 RFout RFin 1 Vdd GND 5 GND 4 Vbias 3 Not used 2 Note : Top View : Package marking provides orienation and identification 81 = Device Code WWYY = Workweek and Year Code XXXX = Assembly Lot number C C C L C C RFin C RFout Vctrl Vbias Figure 1. Simplified Schematic diagram

2 ALM-81 Absolute Maximum Rating (1) T C = Symbol Parameter Units Absolute Maximum I d,max Drain Current ma 1 V d.,max Drain Voltage, RF output to ground V 5.5 V ctrl_max Control Voltage V 7 V bias_max Biasing Voltage V P d Power Dissipation mw 77 P in CW RF Input Power [4 dbm 26 T j Junction Temperature C T STG Storage Temperature C -65 to Thermal Resistance (2,3) (V d = 5.V) θ jc = 77.2 C/W Notes: 1. Operation of this device in excess of any of these limits may cause permanent damage 2. Derate 12.95mW/ C for TL > 86 C 3. Thermal resistance measured using C Infra-Red Microscopy Technique. 4. Max rating for Pin is under Maximum Attenuation mode i.e. Vctrl = 1V. ALM-81 Electrical Specification (1) T C =, Z o = 5Ω, V dd = 5.V, V bias = 4.V, V ctrl = 5.V unless noted Symbol Parameter and Test Condition Frequency Units Min. Typ. Max. stdev I total Total Operating Current Range N/A ma NF Noise Figure at minimal Attenuation.45GHz.7GHz.9GHz Gain Gain at minimal Attenuation.45GHz.7GHz.9GHz OIP3 (2) Output Third Order Intercept Point.45GHz.7GHz.9GHz P1dB Output Power at 1dB Gain Compression.45GHz.7GHz.9GHz IRL Input Return Loss.45GHz.7GHz.9GHz ORL Output Return Loss.45GHz.7GHz.9GHz ISO Isolation.45GHz.7GHz.9GHz db db dbm dbm db Vbias Attenuator Bias Voltage N/A V NA Vctrl Gain Variation Control Voltage N/A V 1 5 NA Gain Gain Variation Range (from Vctrl=1V to 5V).45GHz.7GHz.9GHz Note : 1. Measurements obtained from a test circuit described in Figure OIP3 test condition: F1 F2 = MHz, with input power of dbm per tone measured at worst case side band. 3. Standard deviation data are based on at least pieces samples size taken from 2 wafer lots. Future wafers allocated to this product may have nominal values anywhere between the upper and lower specification limits. db db db NA NA NA NA 2

3 ALM-81 Product Consistency Distribution at 9MHz T C =, V dd = 5.V, V bias = 4.V LSL USL USL CPK=3 CPK= Figure 2. Itotal at 9MHz Figure 3. NF at 9MHz LSL USL LSL CPK=3 CPK= Figure 4. Gain at 9MHz Figure 5. OIP3 at 9MHz LSL CPK= Figure 6. P1dB at 9MHz Note : 1. Statistics distribution determined from a sample size of parts taken from 2 different wafers. 2. Future wafers allocation to this product may have typical values anywhere between the minimum and maximum specification limits. 3. Measurements are made on production testboard, which represents a trade-off between optimal OIP3, P1dB and NF. Circuit losses have been de-embedded from actual measurements. 3

4 ALM-81 Application Circuit Data for 45MHz T C =, V dd = 5.V, V bias = 4.V OIP3 (dbm) Figure 7. OIP3 vs Control Voltage and Temperature at 45MHz P1dB (dbm) Figure 8. P1dB vs Control Voltage and Temperature at 45MHz Gain (db) Figure 9. Gain vs Control Voltage and Temperature at 45MHz IRL (db) Figure. IRL vs Control Voltage and Temperature at 45MHz ORL (db) Figure 11. ORL vs Control Voltage and Temperature at 45MHz Isolation (db) Figure 12. Isolation vs Control Voltage and Temperature at 45MHz 4

5 ALM-81 Application Circuit Data for 45MHz (cont'd) T C =, V dd = 5.V, V bias = 4.V OIP3 (dbm) Figure 13. OIP3 vs Attenuation and Temperature at 45MHz P1dB (dbm) Figure 14. P1dB vs Attenuation and Temperature at 45MHz ORL (db) Figure. ORL vs Attenuation and Temperature at 45MHz IRL (db) Figure 16. IRL vs Attenuation and Temperature at 45MHz Isolation (db) OIP3 (dbm) Figure 17. Isolation vs Attenuation and Temperature at 45MHz Figure 18. OIP3 vs Frequency and Temperature at Vctrl = 5V 5

6 ALM-81 Application Circuit Data for 45MHz (cont'd) T C =, V dd = 5.V, V bias = 4.V P1dB (dbm) Figure 19. P1dB vs Frequency and Temperature at Vctrl = 5V Gain (db) Figure. Gain vs Frequency and Temperature at Vctrl = 5V IRL (db) Figure 21. IRL vs Frequency and Temperature at Vctrl = 5V ORL (db) Figure 22. ORL vs Frequency and Temperature at Vctrl = 5V Isolation (db) Figure 23. Isolation vs Frequency and Temperature at Vctrl = 5V Gain (db) Vctrl=5V Vctrl=4V Vctrl=3V Vctrl=1.5V Vctrl=2V - Vctrl=1V Figure 24. Gain vs Frequency and Control Voltage 6

7 ALM-81 Application Circuit Data for 45MHz (cont'd) T C =, V dd = 5.V, V bias = 4.V NF (db) Figure 25. Noise Figure vs Frequency and Temperature at Vctrl = 5V Idd (ma) Figure 26. Current (Idd) vs Control Voltage and Temperature Ibias (ma) Figure 27. Current (Ibias) vs Control Voltage and Temperature Ictrl (ma) Figure 28. Current (Ictrl) vs Control Voltage and Temperature Phase (Degree) Figure 29. Phase vs Attenuation and Temperature at 45MHz (without external L1 as shown in Figure 54.) 7

8 ALM-81 Application Circuit Data for 9MHz T C =, V dd = 5.V, V bias = 4.V OIP3 (dbm) Figure 3. OIP3 vs Control Voltage and Temperature at 9MHz P1dB (dbm) Figure 31. P1dB vs Control Voltage and Temperature at 9MHz Gain (db) Figure 32. Gain vs Control Voltage and Temperature at 9MHz IRL (db) Figure 33. IRL vs Control Voltage and Temperature at 9MHz ORL (db) Figure 34. ORL vs Control Voltage and Temperature at 9MHz Isolation (db) Figure 35. Isolation vs Control Voltage and Temperature at 9MHz 8

9 ALM-81 Application Circuit Data for 9MHz (cont'd) T C =, V dd = 5.V, V bias = 4.V OIP3 (dbm) Figure 36. OIP3 vs Attenuation and Temperature at 9MHz P1dB (dbm) Figure 37. P1dB vs Attenuation and Temperature at 9MHz ORL (db) Figure 38. ORL vs Attenuation and Temperature at 9MHz IRL (db) Figure 39. IRL vs Attenuation and Temperature at 9MHz Isolation (db) Figure. Isolation vs Attenuation and Temperature at 9MHz OIP3 (dbm) Figure 41. OIP3 vs Frequency and Temperature at Vctrl = 5V 9

10 ALM-81 Application Circuit Data for 9MHz (cont'd) T C =, V dd = 5.V, V bias = 4.V P1dB (dbm) Figure 42. P1dB vs Frequency and Temperature at Vctrl = 5V Gain (db) Figure 43. Gain vs Frequency and Temperature at Vctrl = 5V IRL (db) Figure 44. IRL vs Frequency and Temperature at Vctrl = 5V ORL (db) Figure 45. ORL vs Frequency and Temperature at Vctrl = 5V Isolation (db) Figure 46. Isolation vs Frequency and Temperature at Vctrl = 5V Gain (db) 25 Vctrl=5V Vctrl=4V 5 Vctrl=3V -5 Vctrl=1.5V Vctrl=2V Vctrl=1V Figure 47. Gain vs Frequency and Control Voltage

11 ALM-81 Application Circuit Data for 9MHz (cont'd) T C =, V dd = 5.V, V bias = 4.V NF (db) Figure 48. Noise Figure vs Frequency and Temperature at Vctrl = 5V Idd (ma) Figure 49. Current (Idd) vs Control Voltage and Temperature Ibias (ma) Figure 5. Current (Ibias) vs Control Voltage and Temperature Ictrl (ma) Figure 51. Current (Ictrl) vs Control Voltage and Temperature Phase (Degree) Figure 52. Phase vs Attenuation and Temperature at 9MHz (without external L1 as shown in Figure 54.) 11

12 Application Circuit Description and Layout L1 C5 C1 C2 Anggerik 5x5 A2 Rev2 IN GND C2 VBIAS L1 GND VCTL VDD C5 C6 C7 L4 OUT C6 C7 L4 C1 C3 C3 Figure 53. Demoboard schematic and layout Bill of Materials Circuit Symbol Size Description For.45GHz and.9ghz C1 2.5pF Murata C nF Murata C3 2 pf Murata C uF Murata C6 2.1uF Murata C7 2 pf Murata L1 2 NA L4 2 nh Toko Note : NA not being used on Demoboard ALM-81 is a input fully matched and output prematched product. The product requires 3 biasing points i.e. Vdd (to bias up the PA), Vbias and Vctrl (for controlling the attenuator circuitry). The Vdd is connected to the output pin thru a RF choke, L4 (which isolates the inband signal from the DC supply). The bypass capacitor (C5, C6 and C7) helps to eliminate out of band low frequency signals. DC blocking capacitors (C2 and C3) are required for its input and output, to isolate the supply voltage from succeeding circuits. To improve input return loss, C1 is being use for external tuning. Phase (Degree) L1=82nH L1=Open The external Inductor (L1), helps to stablize the attenuator performance (by gain flatness and change of phase) for the frequency of interest as well as improving its dynamic range. ALM-81 s gain is adjusted by supplying a voltage thru Vctrl. For absolute dynamic range, Vctrl can operate from.8 to 5V, but for best linearity, Vctrl above 1V is recommended. Figure 54. Phase vs Attenuation with and without External L1 at 9MHz 12

13 ALM-81 Typical Scatter Parameters T c =, V dd = 5.V, V ctrl = 5V, V bias = 4.V, Z o = 5Ω Freq S11 S21 S21 S21 S12 S12 S12 S22 S22 S22 GHz Mag. Ang. db Mag. Ang. db Mag. Ang. db Mag. Ang. db TRL Board Layer: Top Metal.5 oz CU Rogers RO435.1 Inner Metal.5 oz CU Bottom Metal.5 oz CU 13

14 ALM-81 K-Factor T c =, V dd = 5.V, V ctrl = 5V, V bias = 4.V, Z o = 5Ω ALM-81 Typical Noise Parameters T c =, V dd = 5.V, V ctrl = 5V, V bias = 4.V, Z o = 5Ω Freq (GHz) F MIN (db) Γ opt Mag Rn /Z o 5Ohm Ga (db) Ang 14

15 PCB Layout and Stencil Design PCB Land Pattern (Top View) Stencil Outline Combined PCB & Stencil Layouts All Dimension are in MM

16 Package Dimension 5.±..9±. PIN 1 ALM81 WWYY 5.±. XXXX.3 TOP VIEW SIDE VIEW PIN 1 Orientation BOTTOM VIEW Note : 1. All dimensions are in milimeters 2. Dimensions are inclusive of plating 3. Dimensions are exclusive of mold flash and metal burr. 16

17 Device Orientation REEL USER FEED DIRECTION CARRIER TAPE 81 WWYY XXYY 81 WWYY XXYY 81 WWYY XXYY USER FEED DIRECTION COVER TAPE TOP VIEW END VIEW Tape Dimensions 17

18 Part Ordering Information Part Number No. of Devices Container ALM-81-BLKG Antistatic Bag ALM-81-TR1G 3 13 Reel For product information and a complete list of distributors, please go to our web site: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright 5 Avago Technologies. All rights reserved. AV2-197EN - August 28, 14