Diseño y Test de Circuitos Integrados de Señal Mixta y de Radio Frecuencia

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1 Diseño y Test de Circuitos Integrados de Señal Mixta y de Radio Frecuencia Research Group 25 th October, 2017 Antonio Gines (gines@us.es)

2 Contents Overview of the Group Research topics Members Projects National / European Projects Industrial Collaboration Research Lines Design of Analog, Mixed Signal, and RF (AMS-RF) circuits Test and Design for Test (AMS-RF) Circuits for Biomedical Applications New Concepts and New Devices for Digital Circuits

3 Contents Overview of the Group

4 The Group Research Topics: Electronics Electronic Technology Diseño y Test de Circuitos Integrados de Señal Mixta y de Radio Frecuencia Physics Science and Technology Members: Adoración Rueda Rueda, Catedrática de Universidad José Mª Quintana Toledo, Catedrático de Universidad Mª José Avedillo de Juan, Catadrática de Universidad Alberto Yúfera García, Catedrático de Universidad Diego Vázquez García de la Vega, Profesor Titular de Universidad Eduardo Peralías Macías, Científico Titular CSIC Gloria Huertas Sánchez, Profesora Titular de Universidad Gildas Leger, Científico Titular CSIC Antonio Ginés Arteaga, Profesor Ayudante Doctor Juan Nuñez Martínez, Investigador Contratado Joaquín Ceballos, Titulado superior del CSIC Cristina Aledo González, Becaria FPI Héctor Quintero, Doctorando Bernabé Linares, Prof. Investigación del CSIC Teresa Serrano, Investigadora del CSIC Luis Camuñas, Contratado Juan dela Cierva Research Group October

5 The Group Research Areas: TIC-178 Digital AMS-RF Circuits Neuromorphic Systems Research Group October

6 Research Lines Design of Analog, Mixed Signal, and RF (AMS-RF) circuits Test and Design for Test (AMS-RF) Circuits for Biomedical Applications Digital 18% Ph. D. Thesis AMS design 35% New Concepts and New Devices for Digital Circuits Test 30% RF design 17% Research Group October

7 Projects Plan Nacional: DANTE: Adapting Mixed-signal and RF ICs Design and Test to Process and Evironment Variability (1/ /2014) Arquitecturas y Circuitos con RTDs para aplicaciones lógicas y no lineales (1/ /2013) Junta de Andalucía: Europeos: Self-calibration & Self-Test in Analog, Mixed-Signal and RF Ics (3/2010 2/2014) 16bit ADC for Space Application ESA Project (11/2013 ) SR2 :Short Range Radio (1/ /2011) Catrene / Avanza+ Design of High-Frequency ADC and DAC (10/ /2013) ESA / sub-contract WITNESS: Wireless technologies for small area network with embedded security ( ) Medea +/ PROFIT Research Group October

8 Research Lines Design of Analog, Mixed Signal, and RF (AMS-RF) circuits Research Group October

9 Data Converters: ADCs & DACs Communication & Aerospace Applications Rad-Hard 15-ENOB 5Msps SOI Sigma-Delta ADC for NASA Rad-Hard 1.8V 15-bit 100Msps Pipeline ADC with Digital Calibration & Current Steering DAC in 0.18µm CMOS for ESA Research Group October

10 Design Example: Pipeline ADC ESA ITT Project: 16-bit 20Msps ADC Beyond the Frontier Project (13-ENOB 100Msps) 2Vpp 10MHz Input Bandwidth Center Frequency up to 95MHz Research Group October

11 Design Example: Pipeline ADC ESA ITT Project: 16-bit 20Msps ADC Beyond the Frontier Project (13-ENOB 100Msps) 2Vpp Curiosidad: en este diseño ha trabajado durante un año un compañero recién graduado. 10MHz Input Bandwidth Center Frequency up to 95MHz Research Group October

12 Design of AMS-RF Circuits (RF Designs) 2.4GHz ZigBee/IEEE Front-End Transceiver 90nm 1.2V CMOS Technology RECEIVER PLL TRANSMITTER Two technologies have been explored: ST-90nm & TSMC 90nm Six different sub-system chips have been exercised Research Group October

13 Research Lines Test and Design-for-Test (AMS-RF) Research Group October

14 TestandDesignforTest IC Test Specification & design Design bugs x1 Design validation Fab defects Cost of Test x10 x100 to x1000 Prototype characterization Production test System test Environment Aging x10000 In-field test Maintenance Research Group October

15 Characterization Using low-cost stimuli: double histogram Smooth non-linear source Precise offset adder The derivative of the two shifted curves are equal The ADC non-linearity can be infered from the histogram differences Research Group October

16 Functional Test: BIST Sine Generator: Harmonic cancellation relaxed design 250x160 µm UMC 180nm CMOS Research Group October

17 Alternate Test IC with DfT Functional test Training set Bench equipment Statistical model Full population Specification s Simple tests Low-cost tester (digital?) Workstation Machine Learning: Feature space development Multicondition test : RF LNA Generalization Feature selection: Distance correlation wrapper approach Research Group October

18 Research Lines Circuits for Biomedical Applications Research Group October

19 Biomedical Applications Integrated Circuits for Measurement of BioMarkers (impedance, ph, etc) useful for samples and processes monitoring. Cell Culture Aplications - Cell Culture Growthing - Cancer detection - Food analysis - Glucose Analysis - Toxicity and drug test - Cell Biology - Microscopy - Cryo-preservatión Obtained Image e 1 + IA V o ixo.sin( ωt) i x Z x Vx e 2 - α ia Impedance Sensor OTA Gm gm K Current Oscillator V s V m Closed-loop + EA - α ea Vref Rectifier AC DC αdc V o V od V xd EXOR V φ Sensing Microsystem

20 Biomedical Applications Portable lab-on chip Fig. 1: Proposed circuit blocks for bio-impedance sensing: (a) Oscillation Based Test (OBT) proposed technique: impedance magnitude is obtained from oscilacion frequency parameters. (b) Closed-loop approach: magnitude and phase are obtained from signals V m and V φ respectively. Fig. 2: (a) Cell growth and toxicity curves for several dosis obtained by our group. It is represented the resistance measure with commercial sensors versus time. (b) Commercial sensors. (c) Photograph of Research Group October a cell culture over a 250 um diameter microelectrode.

21 Research Lines New Concepts and New Devices for Digital Circuits Research Group October

22 New Concepts and New Devices for Digital Circuits Threshold logic Non boolean and more complex building blocks Smaller number of gates, area and power reductions Resonant Tunel Diodes (RTDs) Negative Differential Resistance (NDR) which can be exploited in circuit and architectural design Higher circuit speed, reduced component count, and/or lowered power consumption Gate-Level pipeline (nanopipeline) for Logic computation I P I RTD Zona I Zona II Zona III I V V RTD V P V V Research Group October

23 RTDs. Building Blocks Link MOBILE- MTTG (and generalized TGs) Electrical analysis Logic analysis Exploration of topologies Design Methodologies Experimental validation Research Group October

24 Contact Facultad de Física DIRECCIÓN : Avda. Reina Mercedes s/n TELÉFONO: adoracion@us.es DEPARTAMENTO: Electrónica y Electromagnetismo DIRECCIÓN : Avda. Americo Vespucio s/n (Isla de La Cartuja) TELÉFONO: adoracion@us.es Research Group October

25 Thank you!!! Questions?? 25 th October, 2017 Antonio Gines

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