N Channel SOT AMPERES 20 VOLTS RDS(on) = 150 m

Transcription

1 Preferred Device N Channel SOT 223 This Power MOSFET is designed to withstand high energy in the avalanche and commutation modes. This device is also designed with a low threshold voltage so it is fully enhanced with 5 Volts. This new energy efficient device also offers a drain to source diode with a fast recovery time. Designed for low voltage, high speed switching applications in power supplies, dc dc converters and PWM motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients. The device is housed in the SOT 223 package which is designed for medium power surface mount applications. Silicon Gate for Fast Switching Speeds Low Drive Requirement to Interface Power Loads to Logic Level ICs, VGS(th) = 2 Volts Max The SOT 223 Package can be Soldered Using Wave or Reflow. The Formed Leads Absorb Thermal Stress During Soldering, Eliminating the Possibility of Damage to the Die 2 AMPERES 20 VOLTS RDS(on) = 150 m N Channel MAXIMUM RATINGS (TA = 25 C unless otherwise noted) MARKING DIAGRAM Rating Symbol Value Unit Drain to Source Voltage VDS 20 Gate to Source Voltage Continuous VGS ±15 Drain Current Continuous Drain Current Pulsed ID IDM Vdc Adc TO 261AA CASE 318E STYLE 3 2N02L LWW Total Power TA = 25 C Derate above 25 C Operating and Storage Temperature Range Single Pulse Drain to Source Avalanche Energy Starting TJ = 25 C (VDD = 10 V, VGS = 5 V, Peak IL= 2 A, L = 0.2 mh, RG = 25 Ω) THERMAL CHARACTERISTICS Thermal Resistance Junction to Ambient (surface mounted) PD (Note 1.) TJ, Tstg to 150 Watts mw/ C C EAS 66 mj RθJA 156 C/W Maximum Temperature for Soldering 260 C Purposes, TL Time in Solder Bath 10 Sec 1. Power rating when mounted on FR 4 glass epoxy printed circuit board using recommended footprint. L = Location Code WW = Work Week PIN ASSIGNMENT ORDERING INFORMATION Device Package Shipping MMFT2N02ELT1 SOT Tape & Reel Preferred devices are recommended choices for future use and best overall value. Semiconductor Components Industries, LLC, 2000 November, 2000 Rev. 4 1 Publication Order Number: MMFT2N02EL/D

2 ELECTRICAL CHARACTERISTICS (TA = 25 C unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Drain to Source Breakdown Voltage, (VGS = 0, ID = 250 µa) V(BR)DSS 20 Vdc Zero Gate Voltage Drain Current, (VDS = 20 V, VGS = 0) IDSS 10 µadc Gate Body Leakage Current, (VGS = 15 V, VDS = 0) IGSS 100 nadc ON CHARACTERISTICS Gate Threshold Voltage, (VDS = VGS, ID = 1 ma) VGS(th) 1 2 Vdc Static Drain to Source On Resistance, (VGS = 5 V, ID = 0.8 A) RDS(on) 0.15 Ohms Drain to Source On Voltage, (VGS = 5 V, ID = 1.6 A) VDS(on) 0.32 Vdc Forward Transconductance, (VDS = 10 V, ID = 0.8 A) gfs 2.6 mhos DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance (VDS = 15 V, VGS = 0, f = 1 MHz) Ciss 580 Coss 430 pf Crss 250 SWITCHING CHARACTERISTICS Turn On Delay Time td(on) 16 Rise Time (VDD = 15 V, ID = 1.6 A tr 73 VGS =5V V, RG = 50 ohms, Turn Off Delay Time = td(off) 77 RGS 25 ohms) ns Fall Time tf 107 Total Gate Charge Qg 20 (VDS = 16 V, ID = 1.6 A, Gate Source Charge VGS = 5 Vdc) Qgs 1.7 nc Gate Drain Charge See Figures 15 and 16 Qgd 6 SOURCE DRAIN DIODE CHARACTERISTICS (Note 2.) Forward On Voltage IS = 1.6 A, VGS = 0 VSD 0.9 Vdc Forward Turn On Time IS = 1.6 A, VGS = 0, ton Limited by stray inductance dls/dt = 400 A/µs, Reverse Recovery Time VR = 16 V trr 55 ns 2. Pulse Test: Pulse Width 300 µs, Duty Cycle 2% 2

3 TYPICAL ELECTRICAL CHARACTERISTICS Figure 1. On Region Characteristics Figure 2. Gate Threshold Voltage Variation With Temperature Figure 3. Transfer Characteristics Figure 4. On Resistance versus Drain Current Figure 5. On Resistance versus Gate to Source Voltage Figure 6. On Resistance versus Junction Temperature 3

4 FORWARD BIASED SAFE OPERATING AREA The FBSOA curves define the maximum drain to source voltage and drain current that a device can safely handle when it is forward biased, or when it is on, or being turned on. Because these curves include the limitations of simultaneous high voltage and high current, up to the rating of the device, they are especially useful to designers of linear systems. The curves are based on an ambient temperature of 25 C and a maximum junction temperature of 150 C. Limitations for repetitive pulses at various ambient temperatures can be determined by using the thermal response curves. ON Semiconductor Application Note, AN569, Transient Thermal Resistance General Data and Its Use provides detailed instructions. SWITCHING SAFE OPERATING AREA The switching safe operating area (SOA) is the boundary that the load line may traverse without incurring damage to the MOSFET. The fundamental limits are the peak current, IDM and the breakdown voltage, BVDSS. The switching SOA is applicable for both turn on and turn off of the devices for switching times less than one microsecond. Figure 7. Maximum Rated Forward Biased Safe Operating Area θθ θ θ Figure 8. Thermal Response COMMUTATING SAFE OPERATING AREA (CSOA) The Commutating Safe Operating Area (CSOA) of Figure 10 defines the limits of safe operation for commutated source drain current versus re applied drain voltage when the source drain diode has undergone forward bias. The curve shows the limitations of IFM and peak VDS for a given rate of change of source current. It is applicable when waveforms similar to those of Figure 9 are present. Full or half bridge PWM DC motor controllers are common applications requiring CSOA data. Device stresses increase with increasing rate of change of source current so dis/dt is specified with a maximum value. Higher values of dis/dt require an appropriate derating of IFM, peak VDS or both. Ultimately dis/dt is limited primarily by device, package, and circuit impedances. Maximum device stress occurs during trr as the diode goes from conduction to reverse blocking. VDS(pk) is the peak drain to source voltage that the device must sustain during commutation; IFM is the maximum forward source drain diode current just prior to the onset of commutation. VR is specified at 80% rated BVDSS to ensure that the CSOA stress is maximized as IS decays from IRM to zero. RGS should be minimized during commutation. TJ has only a second order effect on CSOA. Stray inductances in ON Semiconductor s test circuit are assumed to be practical minimums. dvds/dt in excess of 10 V/ns was attained with dis/dt of 400 A/µs. 4

5 Figure 9. Commutating Waveforms µ Figure 10. Commutating Safe Operating Area (CSOA) Figure 11. Commutating Safe Operating Area Test Circuit Figure 12. Unclamped Inductive Switching Test Circuit Figure 13. Unclamped Inductive Switching Waveforms 5

6 Figure 14. Capacitance Variation With Voltage Figure 15. Gate Charge versus Gate To Source Voltage µ µ Figure 16. Gate Charge Test Circuit 6

7 INFORMATION FOR USING THE SOT 223 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. inches mm SOT 223 POWER DISSIPATION The power dissipation of the SOT 223 is a function of the drain pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA. Using the values provided on the data sheet for the SOT 223 package, PD can be calculated as follows: PD = T J(max) TA RθJA The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25 C, one can calculate the power dissipation of the device which in this case is 800 milliwatts. PD = 150 C 25 C 156 C/W = 800 milliwatts The 156 C/W for the SOT 223 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 800 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT 223 package. One is to increase the area of the drain pad. By increasing the area of the drain pad, the power dissipation can be increased. Although one can almost double the power dissipation with this method, one will be giving up area on the printed circuit board which can defeat the purpose of using surface mount technology. A graph of RθJA versus drain pad area is shown in Figure 17. 7

8 θ Figure 17. Thermal Resistance versus Drain Pad Area for the SOT 223 Package (Typical) Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. Prior to placing surface mount components onto a printed circuit board, solder paste must be applied to the pads. A solder stencil is required to screen the optimum amount of solder paste onto the footprint. The stencil is made of brass The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. Always preheat the device. The delta temperature between the preheat and soldering should be 100 C or less.* When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10 C. SOLDER STENCIL GUIDELINES SOLDERING PRECAUTIONS or stainless steel with a typical thickness of inches. The stencil opening size for the SOT 223 package should be the same as the pad size on the printed circuit board, i.e., a 1:1 registration. The soldering temperature and time shall not exceed 260 C for more than 10 seconds. When shifting from preheating to soldering, the maximum temperature gradient shall be 5 C or less. After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. Mechanical stress or shock should not be applied during cooling * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. 8

9 TYPICAL SOLDER HEATING PROFILE For any given circuit board, there will be a group of control settings that will give the desired heat pattern. The operator must set temperatures for several heating zones, and a figure for belt speed. Taken together, these control settings make up a heating profile for that particular circuit board. On machines controlled by a computer, the computer remembers these profiles from one operating session to the next. Figure 18 shows a typical heating profile for use when soldering a surface mount device to a printed circuit board. This profile will vary among soldering systems but it is a good starting point. Factors that can affect the profile include the type of soldering system in use, density and types of components on the board, type of solder used, and the type of board or substrate material being used. This profile shows temperature versus time. The line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint. The two profiles are based on a high density and a low density board. The Vitronics SMD310 convection/infrared reflow soldering system was used to generate this profile. The type of solder used was 62/36/2 Tin Lead Silver with a melting point between C. When this type of furnace is used for solder reflow work, the circuit boards and solder joints tend to heat first. The components on the board are then heated by conduction. The circuit board, because it has a large surface area, absorbs the thermal energy more efficiently, then distributes this energy to the components. Because of this effect, the main body of a component may be up to 30 degrees cooler than the adjacent solder joints. 200 C STEP 1 PREHEAT ZONE 1 RAMP STEP 2 VENT SOAK STEP 3 HEATING ZONES 2 & 5 RAMP DESIRED CURVE FOR HIGH MASS ASSEMBLIES 150 C STEP 4 HEATING ZONES 3 & 6 SOAK 160 C STEP 5 HEATING ZONES 4 & 7 SPIKE 170 C STEP 6 VENT STEP 7 COOLING 205 TO 219 C PEAK AT SOLDER JOINT 150 C 100 C 100 C 140 C SOLDER IS LIQUID FOR 40 TO 80 SECONDS (DEPENDING ON MASS OF ASSEMBLY) DESIRED CURVE FOR LOW MASS ASSEMBLIES 5 C TIME (3 TO 7 MINUTES TOTAL) Figure 18. Typical Solder Heating Profile TMAX 9

10 PACKAGE DIMENSIONS SOT 223 (TO 261) CASE 318E 04 ISSUE K L S H G A F D B C M K J 10

11 Notes 11

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