Analog Power AM3904N. Dual N-Channel Logic Level MOSFET

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1 Dual N-Channel Logic Level MOSFET These miniature surface mount MOSFETs utilize High Cell Density process. Low r DS(on) assures minimal power loss and conserves energy, making this device ideal for use in power management circuitry. Typical applications are logic switch control, power management in portable and batterypowered products such as computers, printers, PCMCIA cards, cellular and cordless telephones. PRODUCT SUMMARY V DS (V) r DS(on) (OHM) I D (A) V GS = 4.5 V V GS = 2.5V 0.2 Low r DS(on) Provides Higher Efficiency and Extends Battery Life Miniature TSOP-6 Surface Mount Package Saves Board Space Very fast switching Gate to Source Zener Diode ESD Protect ABSOLUTE MAXIMUM RATINGS (T A = 25 o C UNLESS OTHERWISE NOTED) Symbol Maximum Units Drain-Source Voltage V DS 25 Gate-Source Voltage V GS 8 V Continuous Drain Current a T A =25 o C 0.7 I D T A =70 o C 0.58 A Pulsed Drain Current b I DM 2 Continuous Source Current (Diode Conduction) a I S ±0.3 A Power Dissipation a T A =25 o C P D 0.9 T A =70 o C 0.7 W Operating Junction and Storage Temperature Range T J, T stg -55 to 150 o C THERMAL RESISTANCE RATINGS Symbol Maximum Units Maximum Junction-to-Ambient a t <= 5 sec 140 R Steady-State ΤΗ JA 180 o C/W Notes a. Surface Mounted on 1 x 1 FR4 Board. b. Pulse width limited by maximum junction temperature 1

2 SPECIFICATIONS (T A = 25 o C UNLESS OTHERWISE NOTED) Limits Symbol Test Conditions Unit Min Typ Max Static Drain-Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 ua 25 V Gate-Threshold Voltage VGS(th) VDS = VGS, ID = -250 ua Gate-Body Leakage IGSS V DS = 20 V, V GS = 0 V 100 na Zero Gate Voltage Drain Current IDSS VDS = 20 V, VGS = 0 V 1 ua V DS = 20 V, V GS = 0 V, T J = 55 o C 10 On-State Drain Current A ID(on) VDS = 5 V, VGS = 2.5 V 0.5 A VGS = 4.5 V, ID = 0.5 A Drain-Source On-Resistance A rds(on) VGS = 4.5 V, ID = 0.5 A TJ = 55 o C Ω VGS = 2.5 V, ID = 0.2 A Forward Tranconductance A gfs VDS = 5 V, ID = 0.5 A 1.5 S Diode Forward Voltage VSD IS = 0.5 A, VGS = 0 V V Dynamic b Total Gate Charge Qg Gate-Source Charge Qgs VDS = 5 V, VGS = 4.5 V, ID = 0.5 A nc Gate-Drain Charge Qgd Switching Turn-On Delay Time td(on) Rise Time tr VDD = 6 V, I D = 0.5 A, Turn-Off Delay Time td(off) VGEN = 4.5 V, RG = 50 Ω ns Fall-Time tf 3 7 Notes a. Pulse test: PW <= 300us duty cycle <= 2%. b. Guaranteed by design, not subject to production testing. Analog Power (APL) reserves the right to make changes without further notice to any products herein. APL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does APL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in APL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. APL does not convey any license under its patent rights nor the rights of others. APL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the APL product could create a situation where personal injury or death may occur. Should Buyer purchase or use APL products for any such unintended or unauthorized application, Buyer shall indemnify and hold APL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that APL was negligent regarding the design or manufacture of the part. APL is an Equal Opportunity/Affirmative Action Employer. 2

3 Typical Electrical Characteristics Figure 1. On-Region Characteristics Figure 2. On-Resistance Variation with Drain Current and Gate Voltage Figure 3. On-Resistance Variation with Temperature Figure 4. On-Resistance Variation with Gate to Source Voltage Figure 5. Transfer Characteristics Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature 3

4 Typical Electrical Characteristics Figure 9. Maximum Safe Operating Area Figure 10. Single Pulse Maximum Power Dissipation Normalized Thermal Transient Junction to Ambient Figure 11. Transient Thermal Response Curve 4

5 Package Information TSOP-6: 6LEAD 5