AM4835P. Analog Power P-Channel 30-V (D-S) MOSFET THERMAL RESISTANCE RATINGS. Symbol Maximum Units

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1 P-Channel 3-V (D-S) MOSFET These miniature surface mount MOSFETs utilize High Cell Density process. Low r DS(on) assures minimal power loss and conserves energy, making this device ideal for use in power management circuitry. Typical applications are PWMDC-DC converters, power management in portable and battery-powered products such as computers, printers, battery charger, telecommunication power system, and telephones power system. Low r DS(on) Provides Higher Efficiency and Extends Battery Life Miniature SO-8 Surface Mount Package Saves Board Space High power and current handling capability Extended VGS range (±25) for battery pack applications PRODUCT SUMMARY V DS (V) r DS(on) m(ω) I D (A) V GS = -V V GS = -4.5V ABSOLUTE MAXIMUM RATINGS (T A = 25 o C UNLESS OTHERWISE NOTED) Parameter Symbol Maximum Units Drain-Source Voltage V DS -3 Gate-Source Voltage V GS ±25 V Continuous Drain Current a T A =25 o C -9.5 I T A =7 o D C -8.3 A Pulsed Drain Current b I DM ±5 Continuous Source Current (Diode Conduction) a I S -2. A Power Dissipation a T A =25 o C 3. T A =7 o C 2.6 Operating Junction and Storage Temperature Range T J, T stg -55 to 5 P D W o C THERMAL RESISTANCE RATINGS Parameter Notes a. Surface Mounted on x FR4 Board. b. Pulse width limited by maximum junction temperature Symbol Maximum Units Maximum Junction-to-Case a t <= 5 sec R θjc 25 o C/W Maximum Junction-to-Ambient a t <= sec R θja 5 o C/W September, 23 - Rev. B

2 SPECIFICATIONS (T A = 25 o C UNLESS OTHERWISE NOTED) Parameter Symbol Test Conditions Limits Min Typ Max Unit Static Gate-Threshold Voltage V GS(th) V DS = V GS, I D = -25 ua - Gate-Body Leakage I GSS V DS = V, V GS = ±25 V ± na Zero Gate Voltage Drain Current I DSS V DS = -24 V, V GS = V - V DS = -24 V, V GS = V, T J = 55 o C -5 ua On-State Drain Current A I D(on) V DS = -5 V, V GS = - V -5 A V GS = - V, I D = -9.5 A 9 Drain-Source On-Resistance A r DS(on) V GS = -4.5 V, I D = -7.5 A 3 mω V GS = - V, I D = -9.5 A, T J = 55 o C 29 Forward Tranconductance A g fs V DS = -5 V, I D = -9.5 A 3 S Diode Forward Voltage V SD I S = -2. A, V GS = V -.7 V Dynamic b Total Gate Charge Q g 5.3 V DS = -5 V, V GS = -4.5 V, Gate-Source Charge Q gs 5.2 I D = -9.5 A Gate-Drain Charge Q gd 5.8 nc Switching Turn-On Delay Time t d(on) 5 Rise Time t r V DD = -5 V, R L = 5 Ω, I D = - A, 2 Turn-Off Delay Time t d(off) V GEN = - V, R G = 6Ω 62 ns Fall-Time t f 46 Notes a. Pulse test: PW <= 3us duty cycle <= 2%. b. Guaranteed by design, not subject to production testing. Analog Power (APL) reserves the right to make changes without further notice to any products herein. APL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does APL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in APL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. APL does not convey any license under its patent rights nor the rights of others. APL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the APL product could create a situation where personal injury or death may occur. Should Buyer purchase or use APL products for any such unintended or unauthorized application, Buyer shall indemnify and hold APL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that APL was negligent regarding the design or manufacture of the part. APL is an Equal Opportunity/Affirmative Action Employer. September, 23 - Rev. B 2

3 Typical Electrical Characteristics (P-Channel) 5 4.5V.4 IDS Drain Current (A) V V through V RDS(ON) Resistance (Ω) V GS =4.5V V GS =V V DS (V) I D Drain Current (A) Figure. On-Region Characteristics Figure 2. On-Resistance with Drain Current.6.6 Normalized R DS (on) V GS = V I D = 9.5A T J Juncation Temperature (ºC) R Resistance (Ω) VGS Gate to Source Voltage (V) Figure 3. On-Resistance Variation with Temperature Figure 4. On-Resistance Variation with Gate to Source Voltage 6 5 V D =V G -55C I D Drain Current (A) C 25C I Source Current (A) T J = 5C T J = 25C V GS Gate to Source Voltage (V) VSD Source to Drain Voltage (V) Figure 5. Transfer Characteristics Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature September, 23 - Rev. B 3

4 Typical Electrical Characteristics (P-Channel) Vgs Gate to Source ( V V D= V I D= -9.5A Capacitance (pf) Ciss Coss Crss Qg, Total Gate Charge (nc) Figure 7. Gate Charge Characteristics VDS (V) Figure 8. Capacitance Characteristics I D Current (A). limited RDS (ON) us us ms ms ms.. V DS Drain to Source Voltage (V) Figure 9. Maximum Safe Operating Area ID S S DC POWER (W) TIME(S) Figure. Single Pulse Maximum Power Dissipation Normalized Thermal Transient Junction to Ambient P DM t t2.. Duty Cycal D = t/t2 2. P er Unit Ba s e R θja =7C/W Single Pulse 3. T JM - T A = P DM Z θjc 4. Sureface Mo unted..... Square Wave Pulse Duration (S) Figure. Transient Thermal Response Curve September, 23 - Rev. B 4

5 Package Information SO-8: 8LEAD H x 45 September, 23 - Rev. B 5

6 Ordering information -T-XX A: Analog Power M: MOSFET 4835: Part number P: P-Channel T: Tape & reel XX: Blank: Standard PF: Leadfree September, 23 - Rev. B 6