W/ C V GS Gate-to-Source Voltage ± 20 dv/dt Peak Diode Recovery f 2.0

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1 PD Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits Benefits l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dv/dt and di/dt Capability G D S V DSS R DS(on) typ. max. I D (Silicon Limited) I D (Package Limited) D HEXFET Power MOSFET S D G 40V 1.35mΩ 1.70mΩ 350Ac 195A TO247AC G D S Gate Drain Source Absolute Maximum Ratings Symbol Parameter Max. Units I T C = 25 C Continuous Drain Current, V (Silicon Limited) 350c I T C = C Continuous Drain Current, V V (Silicon Limited) 250c A I T C = 25 C Continuous Drain Current, V V (Wire Bond Limited) 195 I DM Pulsed Drain Current d 1390 P C = 25 C Maximum Power Dissipation 380 W Linear Derating Factor 2.5 W/ C V GS GatetoSource Voltage ± 20 V dv/dt Peak Diode Recovery f 2.0 V/ns T J Operating Junction and 55 to 175 C T STG Storage Temperature Range Soldering Temperature, for seconds (1.6mm from case) Mounting torque, 632 or M3 screw lbxin (1.1Nxm) Avalanche Characteristics E AS (Thermally limited) Single Pulse Avalanche Energy e 290 mj I AR Avalanche Currentd See Fig. 14, 15, 22a, 22b A E AR Repetitive Avalanche Energy g mj Thermal Resistance Symbol Parameter Typ. Max. Units R θjc JunctiontoCase k 0.40 R θcs CasetoSink, Flat Greased Surface 0.24 C/W R θja JunctiontoAmbient jk /05/08

2 (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units V (BR)DSS DraintoSource Breakdown Voltage 40 V V (BR)DSS / T J Breakdown Voltage Temp. Coefficient V/ C Reference to 25 C, I D = 5mAd R DS(on) Static DraintoSource OnResistance mω V GS = V, g V GS(th) Gate Threshold Voltage V V DS = V GS, I D = 250µA I DSS DraintoSource Leakage Current 20 µa V DS = 40V, V GS = 0V 250 V DS = 40V, V GS = 0V, T J = 125 C I GSS GatetoSource Forward Leakage na V GS = 20V GatetoSource Reverse Leakage V GS = 20V (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units gfs Forward Transconductance 290 S Q g Total Gate Charge nc Q gs GatetoSource Charge 59 Q gd GatetoDrain ("Miller") Charge 75 Q sync Total Gate Charge Sync. (Q g Q gd ) 145 R G(int) Internal Gate Resistance 6.8 Ω t d(on) TurnOn Delay Time 59 ns t r Rise Time 370 t d(off) TurnOff Delay Time 160 t f Fall Time 190 C iss Input Capacitance 8920 pf C oss Output Capacitance 2360 C rss Reverse Transfer Capacitance 930 C oss eff. (ER) Effective Output Capacitance (Energy Related)i 2860 C oss eff. (TR) Effective Output Capacitance (Time Related)h 31 Diode Characteristics Symbol Parameter Min. Typ. Max. Units I S Continuous Source Current 350c A Conditions V GS = 0V, I D = 250µA Conditions V DS = V, V DS = 20V V GS = V g, V DS =0V, V GS = V V DD = 20V R G = 2.7Ω V GS = V g V GS = 0V V DS = 25V ƒ = 1.0MHz V GS = 0V, V DS = 0V to 32V i V GS = 0V, V DS = 0V to 32V h Conditions MOSFET symbol (Body Diode) showing the I SM Pulsed Source Current 1390 integral reverse G (Body Diode)di pn junction diode. V SD Diode Forward Voltage 1.3 V, I S = 195A, V GS = 0V g t rr Reverse Recovery Time ns V R = 20V, T J = 125 C I F = 195A Q rr Reverse Recovery Charge nc di/dt = A/µs g T J = 125 C I RRM Reverse Recovery Current 4.0 A t on Forward TurnOn Time Intrinsic turnon time is negligible (turnon is dominated by LSLD) D S Notes: Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 195A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. Refer to App Notes (AN1140). Repetitive rating; pulse width limited by max. junction temperature. ƒ Limited by T Jmax, starting, L = 0.015mH R G = 25Ω, I AS = 195A, V GS =V. Part not recommended for use above this value. I SD 195A, di/dt 690A/µs, V DD V (BR)DSS, T J 175 C. Pulse width 400µs; duty cycle 2%. C oss eff. (TR) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. C oss eff. (ER) is a fixed capacitance that gives the same energy as C oss while V DS is rising from 0 to 80% V DSS. ˆ When mounted on 1" square PCB (FR4 or G Material). For recom mended footprint and soldering techniques refer to application note #AN994. R θ is measured at T J approximately 90 C. 2

3 C, Capacitance (pf) V GS, GatetoSource Voltage (V) I D, DraintoSource Current (A) R DS(on), DraintoSource On Resistance (Normalized) I D, DraintoSource Current (A) I D, DraintoSource Current (A) 0 VGS TOP 15V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 0 VGS TOP 15V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V 4.5V 60µs PULSE WIDTH Tj = 25 C V DS, DraintoSource Voltage (V) 60µs PULSE WIDTH Tj = 175 C V DS, DraintoSource Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics V GS = V T J = 175 C V DS = V 60µs PULSE WIDTH V GS, GatetoSource Voltage (V) Fig 3. Typical Transfer Characteristics T J, Junction Temperature ( C) Fig 4. Normalized OnResistance vs. Temperature V GS = 0V, f = 1 MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd C iss V DS = 32V V DS = 24V C oss 6.0 C rss V DS, DraintoSource Voltage (V) Q G, Total Gate Charge (nc) Fig 5. Typical Capacitance vs. DraintoSource Voltage Fig 6. Typical Gate Charge vs. GatetoSource Voltage 3

4 Energy (µj) E AS, Single Pulse Avalanche Energy (mj) V (BR)DSS, I D, Drain Current (A) DraintoSource Breakdown Voltage (V) I SD, Reverse Drain Current (A) I D, DraintoSource Current (A) 0 T J = 175 C 00 0 OPERATION IN THIS AREA LIMITED BY R DS (on) µsec 1msec 1 V GS = 0V V SD, SourcetoDrain Voltage (V) Fig 7. Typical SourceDrain Diode Forward Voltage msec Tc = 25 C Tj = 175 C DC Single Pulse 1 1 V DS, DraintoSource Voltage (V) Fig 8. Maximum Safe Operating Area 350 Limited By Package Id = 5.0mA T C, Case Temperature ( C) Fig 9. Maximum Drain Current vs. Case Temperature T J, Temperature ( C ) Fig. DraintoSource Breakdown Voltage I D TOP 36A 73A BOTTOM 195A V DS, DraintoSource Voltage (V) Starting T J, Junction Temperature ( C) Fig 11. Typical C OSS Stored Energy Fig 12. Maximum Avalanche Energy vs. DrainCurrent 4

5 E AR, Avalanche Energy (mj) Avalanche Current (A) 1 Thermal Response ( Z thjc ) C/W D = R 1 R 2 R 3 R 1 R 2 R 3 τ J τ J τ 1 τ 1 τ 2 τ 2 τ 3 τ 3 Ci= τi/ri Ci i Ri R 4 Ri ( C/W) τi (sec) R Notes: SINGLE PULSE 1. Duty Factor D = t1/t2 ( THERMAL RESPONSE ) 2. Peak Tj = P dm x Zthjc Tc E006 1E t 1, Rectangular Pulse Duration (sec) 0 Fig 13. Maximum Effective Transient Thermal Impedance, JunctiontoCase τ 4 τ 4 τ C τ Duty Cycle = Single Pulse 0.01 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 150 C and Tstart =25 C (Single Pulse) Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Τj = 25 C and Tstart = 150 C E06 1.0E05 1.0E04 1.0E03 1.0E02 1.0E01 tav (sec) TOP Single Pulse BOTTOM 1.0% Duty Cycle Starting T J, Junction Temperature ( C) Fig 15. Maximum Avalanche Energy vs. Temperature Fig 14. Typical Avalanche Current vs.pulsewidth Notes on Repetitive Avalanche Curves, Figures 14, 15: (For further info, see AN5 at 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long ast jmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. P D (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. I av = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed T jmax (assumed as 25 C in Figure 14, 15). t av = Average time in avalanche. D = Duty cycle in avalanche = t av f Z thjc (D, t av ) = Transient thermal resistance, see Figures 13) P D (ave) = 1/2 ( 1.3 BV I av ) = DT/ Z thjc I av = 2DT/ [1.3 BV Z th ] E AS (AR) = P D (ave) t av 5

6 Q RR (A) I RR (A) Q RR (A) V GS(th), Gate threshold Voltage (V) I RR (A) I F = 78A V R = 34V T J = 125 C I D = 250µA I D = 1.0mA I D = 1.0A T J, Temperature ( C ) Fig 16. Threshold Voltage vs. Temperature di F /dt (A/µs) Fig. 17 Typical Recovery Current vs. di f /dt I F = 117A V R = 34V T J = 125 C I F = 78A V R = 34V T J = 125 C di F /dt (A/µs) di F /dt (A/µs) Fig. 18 Typical Recovery Current vs. di f /dt Fig. 19 Typical Stored Charge vs. di f /dt I F = 117A V R = 34V T J = 125 C di F /dt (A/µs) Fig. 20 Typical Stored Charge vs. di f /dt 6

7 D.U.T ƒ Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer Reverse Recovery Current Driver Gate Drive Period P.W. D.U.T. I SD Waveform Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt D = P.W. Period V GS =V V DD * R G dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. Device Under Test V DD ReApplied Voltage Body Diode Inductor Curent Current Forward Drop Ripple 5% I SD * V GS = 5V for Logic Level Devices Fig 20. Peak Diode Recovery dv/dt Test Circuit for NChannel HEXFET Power MOSFETs 15V tp V (BR)DSS V DS L DRIVER R G 20V V GS tp D.U.T I AS 0.01Ω V DD A I AS Fig 21a. Unclamped Inductive Test Circuit Fig 21b. Unclamped Inductive Waveforms L D V DS V DD V DS 90% D.U.T % V GS Pulse Width < 1µs Duty Factor < 0.1% V GS t d(on) t r t d(off) t f Fig 22a. Switching Time Test Circuit Fig 22b. Switching Time Waveforms Vds Id Vgs 0 1K DUT L VCC Vgs(th) Qgs1 Qgs2 Qgd Qgodr Fig 23a. Gate Charge Test Circuit Fig 23b. Gate Charge Waveform 7

8 TO247AC Package Outline Dimensions are shown in millimeters (inches) TO247AC Part Marking Information I r)qv h r iy yv rƒ v v v qvph r GrhqA rr DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G` GPU8P9@,5)3( Q6SUIVH7@S 96U@8P9@ `@6S 2! X@@F"$ GDI@C TO247AC package is not recommended for Surface Mount Application. Note: For the most current drawing please refer to IR website at Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (3) TAC Fax: (3) Visit us at for sales contact information. 06/08 8