IRLR8729PbF IRLU8729PbF HEXFET Power MOSFET

Transcription

1 Applications l High Frequency Synchronous Buck Converters for Computer Processor Power l High Frequency Isolated DC-DC Converters with Synchronous Rectification for Telecom and Industrial Use Benefits l Very Low RDS(on) at 4.5V l Ultra-Low Gate Impedance l Fully Characterized Avalanche Voltage and Current l Lead-Free l RoHS compliant IRLR8729PbF IRLU8729PbF HEXFET Power MOSFET D G S D-Pak IRLR8729PbF G DS I-Pak IRLU8729PbF G D S PD B V DSS R DS(on) max Qg 30V 8.9mΩ 0nC Gate Drain Source Absolute Maximum Ratings Parameter Max. Units V DS Drain-to-Source Voltage 30 V Gate-to-Source Voltage ± 20 I T C = 25 C Continuous Drain 0V 58f I T C = C Continuous Drain 0V 4f A I DM Pulsed Drain Current c 260 P C = 25 C Maximum Power Dissipation g 55 W P C = C Maximum Power Dissipation g 27 Linear Derating Factor 0.37 W/ C T J Operating Junction and -55 to 75 C T STG Storage Temperature Range Soldering Temperature, for 0 seconds 300 (.6mm from case) Thermal Resistance Parameter Typ. Max. Units R θjc Junction-to-Case 2.73 R θja Junction-to-Ambient (PCB Mount) g 50 C/W R θja Junction-to-Ambient 0 ORDERING INFORMATION: See detailed ordering and shipping information on the last page of this data sheet. Notes through are on page /23/09

2 T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units BV DSS Drain-to-Source Breakdown Voltage 30 V ΒV DSS / T J Breakdown Voltage Temp. Coefficient 2 mv/ C R DS(on) Static Drain-to-Source On-Resistance mω = 4.5V, I D = 20A e (th) Gate Threshold Voltage V V DS =, I D = 25µA (th) / T J Gate Threshold Voltage Coefficient -6.2 mv/ C I DSS Drain-to-Source Leakage Current.0 V DS = 24V, = 0V µa 50 V DS = 24V, = 0V, T J = 25 C I GSS Gate-to-Source Forward Leakage = 20V na Gate-to-Source Reverse Leakage - = -20V gfs Forward Transconductance 9 S V DS = 5V, I D = 20A Q g Total Gate Charge 0 6 Q gs Pre-Vth Gate-to-Source Charge 2. V DS = 5V Q gs2 Post-Vth Gate-to-Source Charge.3 nc = 4.5V Q gd Gate-to-Drain Charge 4.0 I D = 20A Q godr Gate Charge Overdrive 2.6 See Fig. 6 Q sw Switch Charge (Q gs2 Q gd ) 4.8 Q oss Output Charge 6.3 nc V DS = 6V, = 0V R G Gate Resistance Ω t d(on) Turn-On Delay Time 0 V DD = 5V, = 4.5Ve t r Rise Time 47 I D = 20A ns t d(off) Turn-Off Delay Time R G =.8Ω t f Fall Time 0 See Fig. 4 C iss Input Capacitance 350 = 0V C oss Output Capacitance 280 pf V DS = 5V C rss Reverse Transfer Capacitance 20 ƒ =.0MHz Avalanche Characteristics Parameter Typ. Max. Units E AS Single Pulse Avalanche Energyd 74 mj I AR Avalanche Currentc 20 A E AR Repetitive Avalanche Energy c 5.5 mj Diode Characteristics Parameter Min. Typ. Max. Units Conditions = 0V, I D = 250µA Reference to 25 C, I D = ma = 0V, I D = 25A e Conditions I S Continuous Source Current MOSFET symbol 58f (Body Diode) showing the A I SM Pulsed Source Current integral reverse 260 (Body Diode)c p-n junction diode. V SD Diode Forward Voltage.0 V T J = 25 C, I S = 20A, = 0V e t rr Reverse Recovery Time 6 24 ns T J = 25 C, I F = 20A, V DD = 5V Q rr Reverse Recovery Charge 9 29 nc di/dt = 300A/µs e t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LSLD) 2

3 I D, Drain-to-Source Current (A) R DS(on), Drain-to-Source On Resistance (Normalized) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) IRLR/U8729PbF 0 VGS TOP 0V 4.5V 3.7V 3.5V 3.3V 3.0V 2.7V BOTTOM 2.5V 0 VGS TOP 0V 4.5V 3.7V 3.5V 3.3V 3.0V 2.7V BOTTOM 2.5V 0 2.5V 60µs PULSE WIDTH Tj = 25 C V DS, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics 0 2.5V 60µs PULSE WIDTH Tj = 75 C 0. 0 V DS, Drain-to-Source Voltage (V) Fig 2. Typical Output Characteristics I D = 25A = 0V 0 T J = 75 C.5 0. T J = 25 C V DS = 5V 60µs PULSE WIDTH , Gate-to-Source Voltage (V) T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature 3

4 I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) C, Capacitance (pf), Gate-to-Source Voltage (V) IRLR/U8729PbF 00 = 0V, f = MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd I D = 20A V DS = 24V V DS = 5V C iss C oss C rss V DS, Drain-to-Source Voltage (V) Q G, Total Gate Charge (nc) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 0 0 OPERATION IN THIS AREA LIMITED BY R DS (on) T J = 75 C msec µsec 0 T J = 25 C = 0V V SD, Source-to-Drain Voltage (V) 0 Tc = 25 C Tj = 75 C Single Pulse 0msec 0 0 V DS, Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4

5 (th), I D, Drain Current (A) Gate threshold Voltage (V) IRLR/U8729PbF 60 Limited By Package I D = 25µA I D = 50µA I D = µa T C, Case Temperature ( C) Fig 9. Maximum Drain Current vs. Case Temperature T J, Temperature ( C ) Fig 0. Threshold Voltage vs. Temperature 0 Thermal Response ( Z thjc ) C/W D = SINGLE PULSE ( THERMAL RESPONSE ) R R 2 R R 2 τ J τ J τ τ τ 2 τ 2 Ci= τi/ri Ci= τi/ri Ri ( C/W) τi (sec) Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc Tc 0.00 E-006 E t, Rectangular Pulse Duration (sec) τ C τ C Fig. Maximum Effective Transient Thermal Impedance, Junction-to-Case 5

6 E AS, Single Pulse Avalanche Energy (mj) IRLR/U8729PbF V DS L 5V DRIVER I D TOP 4.4A 6.5A BOTTOM 20A R G 20V tp D.U.T IAS 0.0Ω - V DD A 50 Fig 2a. Unclamped Inductive Test Circuit 50 tp V (BR)DSS Starting T J, Junction Temperature ( C) Fig 2c. Maximum Avalanche Energy vs. Drain Current I AS Fig 2b. Unclamped Inductive Waveforms V DS R D D.U.T. R G - V DD Current Regulator Same Type as D.U.T. Pulse Width µs Duty Factor 0. % 2V.2µF 50KΩ.3µF Fig 4a. Switching Time Test Circuit D.U.T. V - DS V DS 90% 3mA I G I D Current Sampling Resistors Fig 3. Gate Charge Test Circuit 0% t d(on) t r t d(off) t f Fig 4b. Switching Time Waveforms 6

7 Driver Gate Drive Period P.W. D = P.W. Period - R G D.U.T - ƒ Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - Reverse Recovery Current D.U.T. I SD Waveform Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt Re-Applied dv/dt controlled by R G VVoltage DD Body Diode Driver same type as D.U.T. I SD controlled by Duty Factor "D" - Inductor Curent D.U.T. - Device Under Test Ripple 5% Forward Drop * = 5V for Logic Level Devices =0V * V DD I SD Fig 5. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs Id Vds Vgs Vgs(th) Qgodr Qgd Qgs2 Qgs Fig 6. Gate Charge Waveform 7

8 D-Pak (TO-252AA) Package Outline Dimensions are shown in millimeters (inches) D-Pak (TO-252AA) Part Marking Information (;$03/( 7,6,6$,5)5 :,7$66(0%/< $66(0%/('2::,7($66(0%/</,($ RWH3LQDVVHPEO\OLQHSRVLWLRQ LQGLFDWHV/HDG)UHH,7(5$7,2$/ 5(&7,),(5 /2*2 $66(0%/<,5)5 $ 3$5780%(5 '$7(&2'( <($5 :((. /,($ 3LQDVVHPEO\OLQHSRVLWLRQLQGLFDWHV /HDG)UHHTXDOLILFDWLRQWRWKHFRQVXPHUOHYHO 25,7(5$7,2$/ 5(&7,),(5 /2*2 $66(0%/<,5)5 3$5780%(5 '$7(&2'( 3 '(6,*$7(6/($')5(( 352'8&7237,2$/ 3 '(6,*$7(6/($')5(( 352'8&748$/,),('727( &2680(5/(9(/237,2$/ <($5 :((. $ $66(0%/<6,7(&2'( Note: For the most current drawing please refer to IR website at 8

9 I-Pak (TO-25AA) Package Outline Dimensions are shown in millimeters (inches) I-Pak (TO-25AA) Part Marking Information (;$03/( 7,6,6$,5)8 :,7$66(0%/< $66(0%/('2::,7($66(0%/</,($ RWH3LQDVVHPEO\OLQHSRVLWLRQ LQGLFDWHV/HDG)UHH,7(5$7,2$/ 5(&7,),(5 /2*2 $66(0%/<,5)8 $ 3$5780%(5 '$7(&2'( <($5 :((. /,($ 25,7(5$7,2$/ 5(&7,),(5 /2*2 $66(0%/<,5)8 3$5780%(5 '$7(&2'( 3 '(6,*$7(6/($')5(( 352'8&7237,2$/ <($5 :((. $ $66(0%/<6,7(&2'( Note: For the most current drawing please refer to IR website at 9

10 D-Pak (TO-252AA) Tape & Reel Information Dimensions are shown in millimeters (inches) TR TRR TRL 6.3 (.64 ) 5.7 (.69 ) 6.3 (.64 ) 5.7 (.69 ) 2. (.476 ).9 (.469 ) FEED DIRECTION 8. (.38 ) 7.9 (.32 ) FEED DIRECTION NOTES :. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-48 & EIA INCH NOTES :. OUTLINE CONFORMS TO EIA mm Note: For the most current drawing please refer to IR website at 0

11 Orderable part number Package Type Standard Pack Form Quantity IRLR8729PBF D-PAK Tube/Bulk 75 IRLR8729TRPBF D-PAK Tape and 2000 Reel IRLU8729PBF I-PAK Tube/Bulk 75 Note Qualification information D-PAK Qualification level Consumer Moisture Sensitivity Level RoHS compliant MS L (per JEDEC J-S T D-020D ) Yes I-PAK Qualification level Moisture Sensitivity Level RoHS compliant Industrial Not applicable Yes Qualification standards can be found at International Rectifier s web site Higher qualification ratings may be available should the user have such requirements. Please contact your International Rectifier sales representative for further information: Notes: Repetitive rating; pulse width limited by max. junction temperature. Starting T J = 25 C, L = 0.37mH, R G = 25Ω, I AS = 20A. ƒ Pulse width 400µs; duty cycle 2%. Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 50A. When mounted on " square PCB (FR-4 or G-0 Material).For recommended footprint and soldering techniques refer to application note #AN-994. Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (30) TAC Fax: (30) Visit us at for sales contact information./2009